2 * sh7372 Power management support
4 * Copyright (C) 2011 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/suspend.h>
13 #include <linux/cpuidle.h>
14 #include <linux/module.h>
15 #include <linux/list.h>
16 #include <linux/err.h>
17 #include <linux/slab.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <asm/system.h>
23 #include <asm/tlbflush.h>
24 #include <mach/common.h>
25 #include <mach/sh7372.h>
27 #define SMFRAM 0xe6a70000
28 #define SYSTBCR 0xe6150024
29 #define SBAR 0xe6180020
30 #define APARMBAREA 0xe6f10020
32 #define SPDCR 0xe6180008
33 #define SWUCR 0xe6180014
34 #define PSTR 0xe6180080
36 #define PSTR_RETRIES 100
37 #define PSTR_DELAY_US 10
41 static int pd_power_down(struct generic_pm_domain
*genpd
)
43 struct sh7372_pm_domain
*sh7372_pd
= to_sh7372_pd(genpd
);
44 unsigned int mask
= 1 << sh7372_pd
->bit_shift
;
46 if (__raw_readl(PSTR
) & mask
) {
47 unsigned int retry_count
;
49 __raw_writel(mask
, SPDCR
);
51 for (retry_count
= PSTR_RETRIES
; retry_count
; retry_count
--) {
52 if (!(__raw_readl(SPDCR
) & mask
))
58 pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n",
59 mask
, __raw_readl(PSTR
));
64 static int pd_power_up(struct generic_pm_domain
*genpd
)
66 struct sh7372_pm_domain
*sh7372_pd
= to_sh7372_pd(genpd
);
67 unsigned int mask
= 1 << sh7372_pd
->bit_shift
;
68 unsigned int retry_count
;
71 if (__raw_readl(PSTR
) & mask
)
74 __raw_writel(mask
, SWUCR
);
76 for (retry_count
= 2 * PSTR_RETRIES
; retry_count
; retry_count
--) {
77 if (!(__raw_readl(SWUCR
) & mask
))
79 if (retry_count
> PSTR_RETRIES
)
80 udelay(PSTR_DELAY_US
);
84 if (__raw_readl(SWUCR
) & mask
)
88 pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n",
89 mask
, __raw_readl(PSTR
));
94 static bool pd_active_wakeup(struct device
*dev
)
99 void sh7372_init_pm_domain(struct sh7372_pm_domain
*sh7372_pd
)
101 struct generic_pm_domain
*genpd
= &sh7372_pd
->genpd
;
103 pm_genpd_init(genpd
, NULL
, false);
104 genpd
->stop_device
= pm_clk_suspend
;
105 genpd
->start_device
= pm_clk_resume
;
106 genpd
->active_wakeup
= pd_active_wakeup
;
107 genpd
->power_off
= pd_power_down
;
108 genpd
->power_on
= pd_power_up
;
109 pd_power_up(&sh7372_pd
->genpd
);
112 void sh7372_add_device_to_domain(struct sh7372_pm_domain
*sh7372_pd
,
113 struct platform_device
*pdev
)
115 struct device
*dev
= &pdev
->dev
;
117 if (!dev
->power
.subsys_data
) {
119 pm_clk_add(dev
, NULL
);
121 pm_genpd_add_device(&sh7372_pd
->genpd
, dev
);
124 struct sh7372_pm_domain sh7372_a4lc
= {
128 struct sh7372_pm_domain sh7372_a3rv
= {
132 struct sh7372_pm_domain sh7372_a3ri
= {
136 #endif /* CONFIG_PM */
138 static void sh7372_enter_core_standby(void)
140 void __iomem
*smfram
= (void __iomem
*)SMFRAM
;
142 __raw_writel(0, APARMBAREA
); /* translate 4k */
143 __raw_writel(__pa(sh7372_cpu_resume
), SBAR
); /* set reset vector */
144 __raw_writel(0x10, SYSTBCR
); /* enable core standby */
146 __raw_writel(0, smfram
+ 0x3c); /* clear page table address */
148 sh7372_cpu_suspend();
151 /* if page table address is non-NULL then we have been powered down */
152 if (__raw_readl(smfram
+ 0x3c)) {
153 __raw_writel(__raw_readl(smfram
+ 0x40),
154 __va(__raw_readl(smfram
+ 0x3c)));
157 set_cr(__raw_readl(smfram
+ 0x38));
160 __raw_writel(0, SYSTBCR
); /* disable core standby */
161 __raw_writel(0, SBAR
); /* disable reset vector translation */
164 #ifdef CONFIG_CPU_IDLE
165 static void sh7372_cpuidle_setup(struct cpuidle_device
*dev
)
167 struct cpuidle_state
*state
;
168 int i
= dev
->state_count
;
170 state
= &dev
->states
[i
];
171 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C2");
172 strncpy(state
->desc
, "Core Standby Mode", CPUIDLE_DESC_LEN
);
173 state
->exit_latency
= 10;
174 state
->target_residency
= 20 + 10;
175 state
->power_usage
= 1; /* perhaps not */
177 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
178 shmobile_cpuidle_modes
[i
] = sh7372_enter_core_standby
;
180 dev
->state_count
= i
+ 1;
183 static void sh7372_cpuidle_init(void)
185 shmobile_cpuidle_setup
= sh7372_cpuidle_setup
;
188 static void sh7372_cpuidle_init(void) {}
191 #ifdef CONFIG_SUSPEND
192 static int sh7372_enter_suspend(suspend_state_t suspend_state
)
194 sh7372_enter_core_standby();
198 static void sh7372_suspend_init(void)
200 shmobile_suspend_ops
.enter
= sh7372_enter_suspend
;
203 static void sh7372_suspend_init(void) {}
206 #define DBGREG1 0xe6100020
207 #define DBGREG9 0xe6100040
209 void __init
sh7372_pm_init(void)
211 /* enable DBG hardware block to kick SYSC */
212 __raw_writel(0x0000a500, DBGREG9
);
213 __raw_writel(0x0000a501, DBGREG9
);
214 __raw_writel(0x00000000, DBGREG1
);
216 sh7372_suspend_init();
217 sh7372_cpuidle_init();