b48a4b049c32d5fd6a44fd3f78dd4257fb80755d
[deliverable/linux.git] / arch / arm / mach-shmobile / setup-r8a7779.c
1 /*
2 * r8a7779 processor support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
26 #include <linux/input.h>
27 #include <linux/io.h>
28 #include <linux/serial_sci.h>
29 #include <linux/sh_intc.h>
30 #include <linux/sh_timer.h>
31 #include <mach/hardware.h>
32 #include <mach/r8a7779.h>
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
35
36 static struct plat_sci_port scif0_platform_data = {
37 .mapbase = 0xffe40000,
38 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
40 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCIF,
42 .irqs = { gic_spi(88), gic_spi(88),
43 gic_spi(88), gic_spi(88) },
44 };
45
46 static struct platform_device scif0_device = {
47 .name = "sh-sci",
48 .id = 0,
49 .dev = {
50 .platform_data = &scif0_platform_data,
51 },
52 };
53
54 static struct plat_sci_port scif1_platform_data = {
55 .mapbase = 0xffe41000,
56 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
58 .scbrr_algo_id = SCBRR_ALGO_2,
59 .type = PORT_SCIF,
60 .irqs = { gic_spi(89), gic_spi(89),
61 gic_spi(89), gic_spi(89) },
62 };
63
64 static struct platform_device scif1_device = {
65 .name = "sh-sci",
66 .id = 1,
67 .dev = {
68 .platform_data = &scif1_platform_data,
69 },
70 };
71
72 static struct plat_sci_port scif2_platform_data = {
73 .mapbase = 0xffe42000,
74 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
75 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
76 .scbrr_algo_id = SCBRR_ALGO_2,
77 .type = PORT_SCIF,
78 .irqs = { gic_spi(90), gic_spi(90),
79 gic_spi(90), gic_spi(90) },
80 };
81
82 static struct platform_device scif2_device = {
83 .name = "sh-sci",
84 .id = 2,
85 .dev = {
86 .platform_data = &scif2_platform_data,
87 },
88 };
89
90 static struct plat_sci_port scif3_platform_data = {
91 .mapbase = 0xffe43000,
92 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
93 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
94 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF,
96 .irqs = { gic_spi(91), gic_spi(91),
97 gic_spi(91), gic_spi(91) },
98 };
99
100 static struct platform_device scif3_device = {
101 .name = "sh-sci",
102 .id = 3,
103 .dev = {
104 .platform_data = &scif3_platform_data,
105 },
106 };
107
108 static struct plat_sci_port scif4_platform_data = {
109 .mapbase = 0xffe44000,
110 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
111 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
112 .scbrr_algo_id = SCBRR_ALGO_2,
113 .type = PORT_SCIF,
114 .irqs = { gic_spi(92), gic_spi(92),
115 gic_spi(92), gic_spi(92) },
116 };
117
118 static struct platform_device scif4_device = {
119 .name = "sh-sci",
120 .id = 4,
121 .dev = {
122 .platform_data = &scif4_platform_data,
123 },
124 };
125
126 static struct plat_sci_port scif5_platform_data = {
127 .mapbase = 0xffe45000,
128 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
129 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
130 .scbrr_algo_id = SCBRR_ALGO_2,
131 .type = PORT_SCIF,
132 .irqs = { gic_spi(93), gic_spi(93),
133 gic_spi(93), gic_spi(93) },
134 };
135
136 static struct platform_device scif5_device = {
137 .name = "sh-sci",
138 .id = 5,
139 .dev = {
140 .platform_data = &scif5_platform_data,
141 },
142 };
143
144 /* TMU */
145 static struct sh_timer_config tmu00_platform_data = {
146 .name = "TMU00",
147 .channel_offset = 0x4,
148 .timer_bit = 0,
149 .clockevent_rating = 200,
150 };
151
152 static struct resource tmu00_resources[] = {
153 [0] = {
154 .name = "TMU00",
155 .start = 0xffd80008,
156 .end = 0xffd80013,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = gic_spi(32),
161 .flags = IORESOURCE_IRQ,
162 },
163 };
164
165 static struct platform_device tmu00_device = {
166 .name = "sh_tmu",
167 .id = 0,
168 .dev = {
169 .platform_data = &tmu00_platform_data,
170 },
171 .resource = tmu00_resources,
172 .num_resources = ARRAY_SIZE(tmu00_resources),
173 };
174
175 static struct sh_timer_config tmu01_platform_data = {
176 .name = "TMU01",
177 .channel_offset = 0x10,
178 .timer_bit = 1,
179 .clocksource_rating = 200,
180 };
181
182 static struct resource tmu01_resources[] = {
183 [0] = {
184 .name = "TMU01",
185 .start = 0xffd80014,
186 .end = 0xffd8001f,
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = gic_spi(33),
191 .flags = IORESOURCE_IRQ,
192 },
193 };
194
195 static struct platform_device tmu01_device = {
196 .name = "sh_tmu",
197 .id = 1,
198 .dev = {
199 .platform_data = &tmu01_platform_data,
200 },
201 .resource = tmu01_resources,
202 .num_resources = ARRAY_SIZE(tmu01_resources),
203 };
204
205 static struct platform_device *r8a7779_early_devices[] __initdata = {
206 &scif0_device,
207 &scif1_device,
208 &scif2_device,
209 &scif3_device,
210 &scif4_device,
211 &scif5_device,
212 &tmu00_device,
213 &tmu01_device,
214 };
215
216 static struct platform_device *r8a7779_late_devices[] __initdata = {
217 };
218
219 void __init r8a7779_add_standard_devices(void)
220 {
221 platform_add_devices(r8a7779_early_devices,
222 ARRAY_SIZE(r8a7779_early_devices));
223 platform_add_devices(r8a7779_late_devices,
224 ARRAY_SIZE(r8a7779_late_devices));
225 }
226
227 void __init r8a7779_add_early_devices(void)
228 {
229 early_platform_add_devices(r8a7779_early_devices,
230 ARRAY_SIZE(r8a7779_early_devices));
231 }
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