2 * r8a7779 processor support
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/of_platform.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/input.h>
29 #include <linux/serial_sci.h>
30 #include <linux/sh_intc.h>
31 #include <linux/sh_timer.h>
32 #include <linux/dma-mapping.h>
33 #include <mach/hardware.h>
34 #include <mach/irqs.h>
35 #include <mach/r8a7779.h>
36 #include <mach/common.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/time.h>
40 #include <asm/mach/map.h>
41 #include <asm/hardware/cache-l2x0.h>
43 static struct map_desc r8a7779_io_desc
[] __initdata
= {
44 /* 2M entity map for 0xf0000000 (MPCORE) */
46 .virtual = 0xf0000000,
47 .pfn
= __phys_to_pfn(0xf0000000),
49 .type
= MT_DEVICE_NONSHARED
51 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
53 .virtual = 0xfe000000,
54 .pfn
= __phys_to_pfn(0xfe000000),
56 .type
= MT_DEVICE_NONSHARED
60 void __init
r8a7779_map_io(void)
62 iotable_init(r8a7779_io_desc
, ARRAY_SIZE(r8a7779_io_desc
));
65 static struct resource r8a7779_pfc_resources
[] = {
69 .flags
= IORESOURCE_MEM
,
74 .flags
= IORESOURCE_MEM
,
78 static struct platform_device r8a7779_pfc_device
= {
79 .name
= "pfc-r8a7779",
81 .resource
= r8a7779_pfc_resources
,
82 .num_resources
= ARRAY_SIZE(r8a7779_pfc_resources
),
85 void __init
r8a7779_pinmux_init(void)
87 platform_device_register(&r8a7779_pfc_device
);
90 static struct plat_sci_port scif0_platform_data
= {
91 .mapbase
= 0xffe40000,
92 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
93 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
94 .scbrr_algo_id
= SCBRR_ALGO_2
,
96 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x78)),
99 static struct platform_device scif0_device
= {
103 .platform_data
= &scif0_platform_data
,
107 static struct plat_sci_port scif1_platform_data
= {
108 .mapbase
= 0xffe41000,
109 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
110 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
111 .scbrr_algo_id
= SCBRR_ALGO_2
,
113 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x79)),
116 static struct platform_device scif1_device
= {
120 .platform_data
= &scif1_platform_data
,
124 static struct plat_sci_port scif2_platform_data
= {
125 .mapbase
= 0xffe42000,
126 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
127 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
128 .scbrr_algo_id
= SCBRR_ALGO_2
,
130 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7a)),
133 static struct platform_device scif2_device
= {
137 .platform_data
= &scif2_platform_data
,
141 static struct plat_sci_port scif3_platform_data
= {
142 .mapbase
= 0xffe43000,
143 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
144 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
145 .scbrr_algo_id
= SCBRR_ALGO_2
,
147 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7b)),
150 static struct platform_device scif3_device
= {
154 .platform_data
= &scif3_platform_data
,
158 static struct plat_sci_port scif4_platform_data
= {
159 .mapbase
= 0xffe44000,
160 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
161 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
162 .scbrr_algo_id
= SCBRR_ALGO_2
,
164 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7c)),
167 static struct platform_device scif4_device
= {
171 .platform_data
= &scif4_platform_data
,
175 static struct plat_sci_port scif5_platform_data
= {
176 .mapbase
= 0xffe45000,
177 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
,
178 .scscr
= SCSCR_RE
| SCSCR_TE
| SCSCR_CKE1
,
179 .scbrr_algo_id
= SCBRR_ALGO_2
,
181 .irqs
= SCIx_IRQ_MUXED(gic_iid(0x7d)),
184 static struct platform_device scif5_device
= {
188 .platform_data
= &scif5_platform_data
,
193 static struct sh_timer_config tmu00_platform_data
= {
195 .channel_offset
= 0x4,
197 .clockevent_rating
= 200,
200 static struct resource tmu00_resources
[] = {
205 .flags
= IORESOURCE_MEM
,
208 .start
= gic_iid(0x40),
209 .flags
= IORESOURCE_IRQ
,
213 static struct platform_device tmu00_device
= {
217 .platform_data
= &tmu00_platform_data
,
219 .resource
= tmu00_resources
,
220 .num_resources
= ARRAY_SIZE(tmu00_resources
),
223 static struct sh_timer_config tmu01_platform_data
= {
225 .channel_offset
= 0x10,
227 .clocksource_rating
= 200,
230 static struct resource tmu01_resources
[] = {
235 .flags
= IORESOURCE_MEM
,
238 .start
= gic_iid(0x41),
239 .flags
= IORESOURCE_IRQ
,
243 static struct platform_device tmu01_device
= {
247 .platform_data
= &tmu01_platform_data
,
249 .resource
= tmu01_resources
,
250 .num_resources
= ARRAY_SIZE(tmu01_resources
),
254 static struct resource rcar_i2c0_res
[] = {
258 .flags
= IORESOURCE_MEM
,
260 .start
= gic_iid(0x6f),
261 .flags
= IORESOURCE_IRQ
,
265 static struct platform_device i2c0_device
= {
268 .resource
= rcar_i2c0_res
,
269 .num_resources
= ARRAY_SIZE(rcar_i2c0_res
),
272 static struct resource rcar_i2c1_res
[] = {
276 .flags
= IORESOURCE_MEM
,
278 .start
= gic_iid(0x72),
279 .flags
= IORESOURCE_IRQ
,
283 static struct platform_device i2c1_device
= {
286 .resource
= rcar_i2c1_res
,
287 .num_resources
= ARRAY_SIZE(rcar_i2c1_res
),
290 static struct resource rcar_i2c2_res
[] = {
294 .flags
= IORESOURCE_MEM
,
296 .start
= gic_iid(0x70),
297 .flags
= IORESOURCE_IRQ
,
301 static struct platform_device i2c2_device
= {
304 .resource
= rcar_i2c2_res
,
305 .num_resources
= ARRAY_SIZE(rcar_i2c2_res
),
308 static struct resource rcar_i2c3_res
[] = {
312 .flags
= IORESOURCE_MEM
,
314 .start
= gic_iid(0x71),
315 .flags
= IORESOURCE_IRQ
,
319 static struct platform_device i2c3_device
= {
322 .resource
= rcar_i2c3_res
,
323 .num_resources
= ARRAY_SIZE(rcar_i2c3_res
),
326 static struct resource sata_resources
[] = {
331 .flags
= IORESOURCE_MEM
,
334 .start
= gic_iid(0x84),
335 .flags
= IORESOURCE_IRQ
,
339 static struct platform_device sata_device
= {
342 .resource
= sata_resources
,
343 .num_resources
= ARRAY_SIZE(sata_resources
),
345 .dma_mask
= &sata_device
.dev
.coherent_dma_mask
,
346 .coherent_dma_mask
= DMA_BIT_MASK(32),
350 static struct platform_device
*r8a7779_devices_dt
[] __initdata
= {
361 static struct platform_device
*r8a7779_late_devices
[] __initdata
= {
369 void __init
r8a7779_add_standard_devices(void)
371 #ifdef CONFIG_CACHE_L2X0
372 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
373 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
377 r8a7779_init_pm_domains();
379 platform_add_devices(r8a7779_devices_dt
,
380 ARRAY_SIZE(r8a7779_devices_dt
));
381 platform_add_devices(r8a7779_late_devices
,
382 ARRAY_SIZE(r8a7779_late_devices
));
385 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
386 void __init __weak
r8a7779_register_twd(void) { }
388 void __init
r8a7779_earlytimer_init(void)
390 r8a7779_clock_init();
391 shmobile_earlytimer_init();
392 r8a7779_register_twd();
395 void __init
r8a7779_add_early_devices(void)
397 early_platform_add_devices(r8a7779_devices_dt
,
398 ARRAY_SIZE(r8a7779_devices_dt
));
400 /* Early serial console setup is not included here due to
401 * memory map collisions. The SCIF serial ports in r8a7779
402 * are difficult to entity map 1:1 due to collision with the
403 * virtual memory range used by the coherent DMA code on ARM.
405 * Anyone wanting to debug early can remove UPF_IOREMAP from
406 * the sh-sci serial console platform data, adjust mapbase
407 * to a static M:N virt:phys mapping that needs to be added to
408 * the mappings passed with iotable_init() above.
410 * Then add a call to shmobile_setup_console() from this function.
412 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
413 * command line in case of the marzen board.
418 void __init
r8a7779_init_delay(void)
420 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
423 static const struct of_dev_auxdata r8a7779_auxdata_lookup
[] __initconst
= {
427 void __init
r8a7779_add_standard_devices_dt(void)
429 /* clocks are setup late during boot in the case of DT */
430 r8a7779_clock_init();
432 platform_add_devices(r8a7779_devices_dt
,
433 ARRAY_SIZE(r8a7779_devices_dt
));
434 of_platform_populate(NULL
, of_default_bus_match_table
,
435 r8a7779_auxdata_lookup
, NULL
);
438 static const char *r8a7779_compat_dt
[] __initdata
= {
443 DT_MACHINE_START(R8A7779_DT
, "Generic R8A7779 (Flattened Device Tree)")
444 .map_io
= r8a7779_map_io
,
445 .init_early
= r8a7779_init_delay
,
446 .nr_irqs
= NR_IRQS_LEGACY
,
447 .init_irq
= r8a7779_init_irq_dt
,
448 .init_machine
= r8a7779_add_standard_devices_dt
,
449 .init_time
= shmobile_timer_init
,
450 .dt_compat
= r8a7779_compat_dt
,
452 #endif /* CONFIG_USE_OF */