arch/arm/mach-shmobile/setup-r8a7790.c

   1 /*
   2  * r8a7790 processor support
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Magnus Damm
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/irq.h>
  22 #include <linux/kernel.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/platform_data/gpio-rcar.h>
  25 #include <linux/platform_data/irq-renesas-irqc.h>
  26 #include <linux/serial_sci.h>
  27 #include <linux/sh_timer.h>
  28 #include <mach/common.h>
  29 #include <mach/irqs.h>
  30 #include <mach/r8a7790.h>
  31 #include <asm/mach/arch.h>
  32
  33 static const struct resource pfc_resources[] __initconst = {
  34         DEFINE_RES_MEM(0xe6060000, 0x250),
  35 };
  36
  37 #define R8A7790_GPIO(idx)                                               \
  38 static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
  39         DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),              \
  40         DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
  41 };                                                                      \
  42                                                                         \
  43 static const struct gpio_rcar_config                                    \
  44 r8a7790_gpio##idx##_platform_data __initconst = {                       \
  45         .gpio_base      = 32 * (idx),                                   \
  46         .irq_base       = 0,                                            \
  47         .number_of_pins = 32,                                           \
  48         .pctl_name      = "pfc-r8a7790",                                \
  49         .has_both_edge_trigger = 1,                                     \
  50 };                                                                      \
  51
  52 R8A7790_GPIO(0);
  53 R8A7790_GPIO(1);
  54 R8A7790_GPIO(2);
  55 R8A7790_GPIO(3);
  56 R8A7790_GPIO(4);
  57 R8A7790_GPIO(5);
  58
  59 #define r8a7790_register_gpio(idx)                                      \
  60         platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
  61                 r8a7790_gpio##idx##_resources,                          \
  62                 ARRAY_SIZE(r8a7790_gpio##idx##_resources),              \
  63                 &r8a7790_gpio##idx##_platform_data,                     \
  64                 sizeof(r8a7790_gpio##idx##_platform_data))
  65
  66 static struct resource i2c_resources[] __initdata = {
  67         /* I2C0 */
  68         DEFINE_RES_MEM(0xE6508000, 0x40),
  69         DEFINE_RES_IRQ(gic_spi(287)),
  70         /* I2C1 */
  71         DEFINE_RES_MEM(0xE6518000, 0x40),
  72         DEFINE_RES_IRQ(gic_spi(288)),
  73         /* I2C2 */
  74         DEFINE_RES_MEM(0xE6530000, 0x40),
  75         DEFINE_RES_IRQ(gic_spi(286)),
  76         /* I2C3 */
  77         DEFINE_RES_MEM(0xE6540000, 0x40),
  78         DEFINE_RES_IRQ(gic_spi(290)),
  79
  80 };
  81
  82 #define r8a7790_register_i2c(idx)               \
  83         platform_device_register_simple(        \
  84                 "i2c-rcar", idx,                \
  85                 i2c_resources + (2 * idx), 2);  \
  86
  87 void __init r8a7790_pinmux_init(void)
  88 {
  89         platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
  90                                         ARRAY_SIZE(pfc_resources));
  91         r8a7790_register_gpio(0);
  92         r8a7790_register_gpio(1);
  93         r8a7790_register_gpio(2);
  94         r8a7790_register_gpio(3);
  95         r8a7790_register_gpio(4);
  96         r8a7790_register_gpio(5);
  97         r8a7790_register_i2c(0);
  98         r8a7790_register_i2c(1);
  99         r8a7790_register_i2c(2);
 100         r8a7790_register_i2c(3);
 101 }
 102
 103 #define SCIF_COMMON(scif_type, baseaddr, irq)                   \
 104         .type           = scif_type,                            \
 105         .mapbase        = baseaddr,                             \
 106         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,      \
 107         .irqs           = SCIx_IRQ_MUXED(irq)
 108
 109 #define SCIFA_DATA(index, baseaddr, irq)                \
 110 [index] = {                                             \
 111         SCIF_COMMON(PORT_SCIFA, baseaddr, irq),         \
 112         .scbrr_algo_id  = SCBRR_ALGO_4,                 \
 113         .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0,      \
 114 }
 115
 116 #define SCIFB_DATA(index, baseaddr, irq)        \
 117 [index] = {                                     \
 118         SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
 119         .scbrr_algo_id  = SCBRR_ALGO_4,         \
 120         .scscr = SCSCR_RE | SCSCR_TE,           \
 121 }
 122
 123 #define SCIF_DATA(index, baseaddr, irq)         \
 124 [index] = {                                             \
 125         SCIF_COMMON(PORT_SCIF, baseaddr, irq),          \
 126         .scbrr_algo_id  = SCBRR_ALGO_2,                 \
 127         .scscr = SCSCR_RE | SCSCR_TE,   \
 128 }
 129
 130 #define HSCIF_DATA(index, baseaddr, irq)                \
 131 [index] = {                                             \
 132         SCIF_COMMON(PORT_HSCIF, baseaddr, irq),         \
 133         .scbrr_algo_id  = SCBRR_ALGO_6,                 \
 134         .scscr = SCSCR_RE | SCSCR_TE,   \
 135 }
 136
 137 enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
 138        HSCIF0, HSCIF1 };
 139
 140 static const struct plat_sci_port scif[] __initconst = {
 141         SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
 142         SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
 143         SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
 144         SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
 145         SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
 146         SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
 147         SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
 148         SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
 149         HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
 150         HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
 151 };
 152
 153 static inline void r8a7790_register_scif(int idx)
 154 {
 155         platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
 156                                       sizeof(struct plat_sci_port));
 157 }
 158
 159 static const struct renesas_irqc_config irqc0_data __initconst = {
 160         .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
 161 };
 162
 163 static const struct resource irqc0_resources[] __initconst = {
 164         DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
 165         DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
 166         DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
 167         DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
 168         DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
 169 };
 170
 171 #define r8a7790_register_irqc(idx)                                      \
 172         platform_device_register_resndata(&platform_bus, "renesas_irqc", \
 173                                           idx, irqc##idx##_resources,   \
 174                                           ARRAY_SIZE(irqc##idx##_resources), \
 175                                           &irqc##idx##_data,            \
 176                                           sizeof(struct renesas_irqc_config))
 177
 178 static const struct resource thermal_resources[] __initconst = {
 179         DEFINE_RES_MEM(0xe61f0000, 0x14),
 180         DEFINE_RES_MEM(0xe61f0100, 0x38),
 181         DEFINE_RES_IRQ(gic_spi(69)),
 182 };
 183
 184 #define r8a7790_register_thermal()                                      \
 185         platform_device_register_simple("rcar_thermal", -1,             \
 186                                         thermal_resources,              \
 187                                         ARRAY_SIZE(thermal_resources))
 188
 189 static const struct sh_timer_config cmt00_platform_data __initconst = {
 190         .name = "CMT00",
 191         .timer_bit = 0,
 192         .clockevent_rating = 80,
 193 };
 194
 195 static const struct resource cmt00_resources[] __initconst = {
 196         DEFINE_RES_MEM(0xffca0510, 0x0c),
 197         DEFINE_RES_MEM(0xffca0500, 0x04),
 198         DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
 199 };
 200
 201 #define r8a7790_register_cmt(idx)                                       \
 202         platform_device_register_resndata(&platform_bus, "sh_cmt",      \
 203                                           idx, cmt##idx##_resources,    \
 204                                           ARRAY_SIZE(cmt##idx##_resources), \
 205                                           &cmt##idx##_platform_data,    \
 206                                           sizeof(struct sh_timer_config))
 207
 208 void __init r8a7790_add_dt_devices(void)
 209 {
 210         r8a7790_register_scif(SCIFA0);
 211         r8a7790_register_scif(SCIFA1);
 212         r8a7790_register_scif(SCIFB0);
 213         r8a7790_register_scif(SCIFB1);
 214         r8a7790_register_scif(SCIFB2);
 215         r8a7790_register_scif(SCIFA2);
 216         r8a7790_register_scif(SCIF0);
 217         r8a7790_register_scif(SCIF1);
 218         r8a7790_register_scif(HSCIF0);
 219         r8a7790_register_scif(HSCIF1);
 220         r8a7790_register_cmt(00);
 221 }
 222
 223 void __init r8a7790_add_standard_devices(void)
 224 {
 225         r8a7790_add_dt_devices();
 226         r8a7790_register_irqc(0);
 227         r8a7790_register_thermal();
 228 }
 229
 230 void __init r8a7790_init_early(void)
 231 {
 232 #ifndef CONFIG_ARM_ARCH_TIMER
 233         shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
 234 #endif
 235 }
 236
 237 #ifdef CONFIG_USE_OF
 238
 239 static const char * const r8a7790_boards_compat_dt[] __initconst = {
 240         "renesas,r8a7790",
 241         NULL,
 242 };
 243
 244 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
 245         .smp            = smp_ops(r8a7790_smp_ops),
 246         .init_early     = r8a7790_init_early,
 247         .init_time      = rcar_gen2_timer_init,
 248         .dt_compat      = r8a7790_boards_compat_dt,
 249 MACHINE_END
 250 #endif /* CONFIG_USE_OF */