ARM: ux500: add an SMP enablement type and move cpu nodes
[deliverable/linux.git] / arch / arm / mach-shmobile / smp-r8a7779.c
1 /*
2 * SMP support for R-Mobile / SH-Mobile - r8a7779 portion
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/spinlock.h>
20 #include <linux/io.h>
21 #include <linux/delay.h>
22
23 #include <asm/cacheflush.h>
24 #include <asm/smp_plat.h>
25 #include <asm/smp_scu.h>
26 #include <asm/smp_twd.h>
27
28 #include "common.h"
29 #include "pm-rcar.h"
30 #include "r8a7779.h"
31
32 #define AVECR IOMEM(0xfe700040)
33 #define R8A7779_SCU_BASE 0xf0000000
34
35 static struct rcar_sysc_ch r8a7779_ch_cpu1 = {
36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
37 .chan_bit = 1, /* ARM1 */
38 .isr_bit = 1, /* ARM1 */
39 };
40
41 static struct rcar_sysc_ch r8a7779_ch_cpu2 = {
42 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
43 .chan_bit = 2, /* ARM2 */
44 .isr_bit = 2, /* ARM2 */
45 };
46
47 static struct rcar_sysc_ch r8a7779_ch_cpu3 = {
48 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
49 .chan_bit = 3, /* ARM3 */
50 .isr_bit = 3, /* ARM3 */
51 };
52
53 static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = {
54 [1] = &r8a7779_ch_cpu1,
55 [2] = &r8a7779_ch_cpu2,
56 [3] = &r8a7779_ch_cpu3,
57 };
58
59 #if defined(CONFIG_HAVE_ARM_TWD) && !defined(CONFIG_ARCH_MULTIPLATFORM)
60 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29);
61 void __init r8a7779_register_twd(void)
62 {
63 twd_local_timer_register(&twd_local_timer);
64 }
65 #endif
66
67 static int r8a7779_platform_cpu_kill(unsigned int cpu)
68 {
69 struct rcar_sysc_ch *ch = NULL;
70 int ret = -EIO;
71
72 cpu = cpu_logical_map(cpu);
73
74 if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
75 ch = r8a7779_ch_cpu[cpu];
76
77 if (ch)
78 ret = rcar_sysc_power_down(ch);
79
80 return ret ? ret : 1;
81 }
82
83 static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
84 {
85 struct rcar_sysc_ch *ch = NULL;
86 unsigned int lcpu = cpu_logical_map(cpu);
87 int ret;
88
89 if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
90 ch = r8a7779_ch_cpu[lcpu];
91
92 if (ch)
93 ret = rcar_sysc_power_up(ch);
94 else
95 ret = -EIO;
96
97 return ret;
98 }
99
100 static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
101 {
102 /* Map the reset vector (in headsmp-scu.S, headsmp.S) */
103 __raw_writel(__pa(shmobile_boot_vector), AVECR);
104 shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
105 shmobile_boot_arg = (unsigned long)shmobile_scu_base;
106
107 /* setup r8a7779 specific SCU bits */
108 shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
109 shmobile_smp_scu_prepare_cpus(max_cpus);
110
111 r8a7779_pm_init();
112
113 /* power off secondary CPUs */
114 r8a7779_platform_cpu_kill(1);
115 r8a7779_platform_cpu_kill(2);
116 r8a7779_platform_cpu_kill(3);
117 }
118
119 #ifdef CONFIG_HOTPLUG_CPU
120 static int r8a7779_cpu_kill(unsigned int cpu)
121 {
122 if (shmobile_smp_scu_cpu_kill(cpu))
123 return r8a7779_platform_cpu_kill(cpu);
124
125 return 0;
126 }
127 #endif /* CONFIG_HOTPLUG_CPU */
128
129 struct smp_operations r8a7779_smp_ops __initdata = {
130 .smp_prepare_cpus = r8a7779_smp_prepare_cpus,
131 .smp_boot_secondary = r8a7779_boot_secondary,
132 #ifdef CONFIG_HOTPLUG_CPU
133 .cpu_die = shmobile_smp_scu_cpu_die,
134 .cpu_kill = r8a7779_cpu_kill,
135 #endif
136 };
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