arch/arm/mach-sunxi/sunxi.c

   1 /*
   2  * Device Tree support for Allwinner A1X SoCs
   3  *
   4  * Copyright (C) 2012 Maxime Ripard
   5  *
   6  * Maxime Ripard <maxime.ripard@free-electrons.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/clocksource.h>
  14 #include <linux/delay.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/io.h>
  21
  22 #include <linux/clk/sunxi.h>
  23
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/system_misc.h>
  27
  28 #include "sunxi.h"
  29
  30 #define SUN4I_WATCHDOG_CTRL_REG         0x00
  31 #define SUN4I_WATCHDOG_CTRL_RESTART             (1 << 0)
  32 #define SUN4I_WATCHDOG_MODE_REG         0x04
  33 #define SUN4I_WATCHDOG_MODE_ENABLE              (1 << 0)
  34 #define SUN4I_WATCHDOG_MODE_RESET_ENABLE        (1 << 1)
  35
  36 static void __iomem *wdt_base;
  37
  38 static void sun4i_restart(char mode, const char *cmd)
  39 {
  40         if (!wdt_base)
  41                 return;
  42
  43         /* Enable timer and set reset bit in the watchdog */
  44         writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
  45                wdt_base + SUN4I_WATCHDOG_MODE_REG);
  46
  47         /*
  48          * Restart the watchdog. The default (and lowest) interval
  49          * value for the watchdog is 0.5s.
  50          */
  51         writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
  52
  53         while (1) {
  54                 mdelay(5);
  55                 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
  56                        wdt_base + SUN4I_WATCHDOG_MODE_REG);
  57         }
  58 }
  59
  60 static struct of_device_id sunxi_restart_ids[] = {
  61         { .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
  62         { /*sentinel*/ }
  63 };
  64
  65 static void sunxi_setup_restart(void)
  66 {
  67         const struct of_device_id *of_id;
  68         struct device_node *np;
  69
  70         np = of_find_matching_node(NULL, sunxi_restart_ids);
  71         if (WARN(!np, "unable to setup watchdog restart"))
  72                 return;
  73
  74         wdt_base = of_iomap(np, 0);
  75         WARN(!wdt_base, "failed to map watchdog base address");
  76
  77         of_id = of_match_node(sunxi_restart_ids, np);
  78         WARN(!of_id, "restart function not available");
  79
  80         arm_pm_restart = of_id->data;
  81 }
  82
  83 static struct map_desc sunxi_io_desc[] __initdata = {
  84         {
  85                 .virtual        = (unsigned long) SUNXI_REGS_VIRT_BASE,
  86                 .pfn            = __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
  87                 .length         = SUNXI_REGS_SIZE,
  88                 .type           = MT_DEVICE,
  89         },
  90 };
  91
  92 void __init sunxi_map_io(void)
  93 {
  94         iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
  95 }
  96
  97 static void __init sunxi_timer_init(void)
  98 {
  99         sunxi_init_clocks();
 100         clocksource_of_init();
 101 }
 102
 103 static void __init sunxi_dt_init(void)
 104 {
 105         sunxi_setup_restart();
 106
 107         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 108 }
 109
 110 static const char * const sunxi_board_dt_compat[] = {
 111         "allwinner,sun4i-a10",
 112         "allwinner,sun5i-a10s",
 113         "allwinner,sun5i-a13",
 114         NULL,
 115 };
 116
 117 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
 118         .init_machine   = sunxi_dt_init,
 119         .map_io         = sunxi_map_io,
 120         .init_time      = sunxi_timer_init,
 121         .dt_compat      = sunxi_board_dt_compat,
 122 MACHINE_END