arch/arm/mach-sunxi/sunxi.c

   1 /*
   2  * Device Tree support for Allwinner A1X SoCs
   3  *
   4  * Copyright (C) 2012 Maxime Ripard
   5  *
   6  * Maxime Ripard <maxime.ripard@free-electrons.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/clocksource.h>
  14 #include <linux/delay.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/io.h>
  21 #include <linux/reboot.h>
  22
  23 #include <linux/clk/sunxi.h>
  24
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/system_misc.h>
  28
  29 #define SUN4I_WATCHDOG_CTRL_REG         0x00
  30 #define SUN4I_WATCHDOG_CTRL_RESTART             BIT(0)
  31 #define SUN4I_WATCHDOG_MODE_REG         0x04
  32 #define SUN4I_WATCHDOG_MODE_ENABLE              BIT(0)
  33 #define SUN4I_WATCHDOG_MODE_RESET_ENABLE        BIT(1)
  34
  35 #define SUN6I_WATCHDOG1_IRQ_REG         0x00
  36 #define SUN6I_WATCHDOG1_CTRL_REG        0x10
  37 #define SUN6I_WATCHDOG1_CTRL_RESTART            BIT(0)
  38 #define SUN6I_WATCHDOG1_CONFIG_REG      0x14
  39 #define SUN6I_WATCHDOG1_CONFIG_RESTART          BIT(0)
  40 #define SUN6I_WATCHDOG1_CONFIG_IRQ              BIT(1)
  41 #define SUN6I_WATCHDOG1_MODE_REG        0x18
  42 #define SUN6I_WATCHDOG1_MODE_ENABLE             BIT(0)
  43
  44 static void __iomem *wdt_base;
  45
  46 static void sun4i_restart(enum reboot_mode mode, const char *cmd)
  47 {
  48         if (!wdt_base)
  49                 return;
  50
  51         /* Enable timer and set reset bit in the watchdog */
  52         writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
  53                wdt_base + SUN4I_WATCHDOG_MODE_REG);
  54
  55         /*
  56          * Restart the watchdog. The default (and lowest) interval
  57          * value for the watchdog is 0.5s.
  58          */
  59         writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
  60
  61         while (1) {
  62                 mdelay(5);
  63                 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
  64                        wdt_base + SUN4I_WATCHDOG_MODE_REG);
  65         }
  66 }
  67
  68 static void sun6i_restart(enum reboot_mode mode, const char *cmd)
  69 {
  70         if (!wdt_base)
  71                 return;
  72
  73         /* Disable interrupts */
  74         writel(0, wdt_base + SUN6I_WATCHDOG1_IRQ_REG);
  75
  76         /* We want to disable the IRQ and just reset the whole system */
  77         writel(SUN6I_WATCHDOG1_CONFIG_RESTART,
  78                 wdt_base + SUN6I_WATCHDOG1_CONFIG_REG);
  79
  80         /* Enable timer. The default and lowest interval value is 0.5s */
  81         writel(SUN6I_WATCHDOG1_MODE_ENABLE,
  82                 wdt_base + SUN6I_WATCHDOG1_MODE_REG);
  83
  84         /* Restart the watchdog. */
  85         writel(SUN6I_WATCHDOG1_CTRL_RESTART,
  86                 wdt_base + SUN6I_WATCHDOG1_CTRL_REG);
  87
  88         while (1) {
  89                 mdelay(5);
  90                 writel(SUN6I_WATCHDOG1_MODE_ENABLE,
  91                         wdt_base + SUN6I_WATCHDOG1_MODE_REG);
  92         }
  93 }
  94
  95 static struct of_device_id sunxi_restart_ids[] = {
  96         { .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
  97         { .compatible = "allwinner,sun6i-wdt", .data = sun6i_restart },
  98         { /*sentinel*/ }
  99 };
 100
 101 static void sunxi_setup_restart(void)
 102 {
 103         const struct of_device_id *of_id;
 104         struct device_node *np;
 105
 106         np = of_find_matching_node(NULL, sunxi_restart_ids);
 107         if (WARN(!np, "unable to setup watchdog restart"))
 108                 return;
 109
 110         wdt_base = of_iomap(np, 0);
 111         WARN(!wdt_base, "failed to map watchdog base address");
 112
 113         of_id = of_match_node(sunxi_restart_ids, np);
 114         WARN(!of_id, "restart function not available");
 115
 116         arm_pm_restart = of_id->data;
 117 }
 118
 119 static void __init sunxi_timer_init(void)
 120 {
 121         sunxi_init_clocks();
 122         clocksource_of_init();
 123 }
 124
 125 static void __init sunxi_dt_init(void)
 126 {
 127         sunxi_setup_restart();
 128
 129         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 130 }
 131
 132 static const char * const sunxi_board_dt_compat[] = {
 133         "allwinner,sun4i-a10",
 134         "allwinner,sun5i-a10s",
 135         "allwinner,sun5i-a13",
 136         NULL,
 137 };
 138
 139 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
 140         .init_machine   = sunxi_dt_init,
 141         .init_time      = sunxi_timer_init,
 142         .dt_compat      = sunxi_board_dt_compat,
 143 MACHINE_END
 144
 145 static const char * const sun6i_board_dt_compat[] = {
 146         "allwinner,sun6i-a31",
 147         NULL,
 148 };
 149
 150 DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
 151         .init_machine   = sunxi_dt_init,
 152         .init_time      = sunxi_timer_init,
 153         .dt_compat      = sun6i_board_dt_compat,
 154 MACHINE_END
 155
 156 static const char * const sun7i_board_dt_compat[] = {
 157         "allwinner,sun7i-a20",
 158         NULL,
 159 };
 160
 161 DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
 162         .init_machine   = sunxi_dt_init,
 163         .init_time      = sunxi_timer_init,
 164         .dt_compat      = sun7i_board_dt_compat,
 165 MACHINE_END