ARM: use menuconfig for sub-arch menus
[deliverable/linux.git] / arch / arm / mach-tegra / Kconfig
1 menuconfig ARCH_TEGRA
2 bool "NVIDIA Tegra" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB
4 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
5 select ARM_GIC
6 select CLKSRC_MMIO
7 select HAVE_ARM_SCU if SMP
8 select HAVE_ARM_TWD if SMP
9 select PINCTRL
10 select ARCH_HAS_RESET_CONTROLLER
11 select RESET_CONTROLLER
12 select SOC_BUS
13 select USB_ULPI if USB_PHY
14 select USB_ULPI_VIEWPORT if USB_PHY
15 help
16 This enables support for NVIDIA Tegra based systems.
17
18 if ARCH_TEGRA
19
20 config ARCH_TEGRA_2x_SOC
21 bool "Enable support for Tegra20 family"
22 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
23 select ARM_ERRATA_720789
24 select ARM_ERRATA_754327 if SMP
25 select ARM_ERRATA_764369 if SMP
26 select PINCTRL_TEGRA20
27 select PL310_ERRATA_727915 if CACHE_L2X0
28 select PL310_ERRATA_769419 if CACHE_L2X0
29 help
30 Support for NVIDIA Tegra AP20 and T20 processors, based on the
31 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
32
33 config ARCH_TEGRA_3x_SOC
34 bool "Enable support for Tegra30 family"
35 select ARM_ERRATA_754322
36 select ARM_ERRATA_764369 if SMP
37 select PINCTRL_TEGRA30
38 select PL310_ERRATA_769419 if CACHE_L2X0
39 help
40 Support for NVIDIA Tegra T30 processor family, based on the
41 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
42
43 config ARCH_TEGRA_114_SOC
44 bool "Enable support for Tegra114 family"
45 select ARM_ERRATA_798181 if SMP
46 select ARM_L1_CACHE_SHIFT_6
47 select HAVE_ARM_ARCH_TIMER
48 select PINCTRL_TEGRA114
49 help
50 Support for NVIDIA Tegra T114 processor family, based on the
51 ARM CortexA15MP CPU
52
53 config ARCH_TEGRA_124_SOC
54 bool "Enable support for Tegra124 family"
55 select ARM_L1_CACHE_SHIFT_6
56 select HAVE_ARM_ARCH_TIMER
57 select PINCTRL_TEGRA124
58 help
59 Support for NVIDIA Tegra T124 processor family, based on the
60 ARM CortexA15MP CPU
61
62 config TEGRA_AHB
63 bool "Enable AHB driver for NVIDIA Tegra SoCs"
64 default y
65 help
66 Adds AHB configuration functionality for NVIDIA Tegra SoCs,
67 which controls AHB bus master arbitration and some
68 performance parameters(priority, prefech size).
69
70 endif
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