arch/arm/mach-tegra/include/mach/dma.h

   1 /*
   2  * arch/arm/mach-tegra/include/mach/dma.h
   3  *
   4  * Copyright (c) 2008-2009, NVIDIA Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  19  */
  20
  21 #ifndef __MACH_TEGRA_DMA_H
  22 #define __MACH_TEGRA_DMA_H
  23
  24 #include <linux/list.h>
  25
  26 #define TEGRA_DMA_REQ_SEL_CNTR                  0
  27 #define TEGRA_DMA_REQ_SEL_I2S_2                 1
  28 #define TEGRA_DMA_REQ_SEL_I2S_1                 2
  29 #define TEGRA_DMA_REQ_SEL_SPD_I                 3
  30 #define TEGRA_DMA_REQ_SEL_UI_I                  4
  31 #define TEGRA_DMA_REQ_SEL_MIPI                  5
  32 #define TEGRA_DMA_REQ_SEL_I2S2_2                6
  33 #define TEGRA_DMA_REQ_SEL_I2S2_1                7
  34 #define TEGRA_DMA_REQ_SEL_UARTA                 8
  35 #define TEGRA_DMA_REQ_SEL_UARTB                 9
  36 #define TEGRA_DMA_REQ_SEL_UARTC                 10
  37 #define TEGRA_DMA_REQ_SEL_SPI                   11
  38 #define TEGRA_DMA_REQ_SEL_AC97                  12
  39 #define TEGRA_DMA_REQ_SEL_ACMODEM               13
  40 #define TEGRA_DMA_REQ_SEL_SL4B                  14
  41 #define TEGRA_DMA_REQ_SEL_SL2B1                 15
  42 #define TEGRA_DMA_REQ_SEL_SL2B2                 16
  43 #define TEGRA_DMA_REQ_SEL_SL2B3                 17
  44 #define TEGRA_DMA_REQ_SEL_SL2B4                 18
  45 #define TEGRA_DMA_REQ_SEL_UARTD                 19
  46 #define TEGRA_DMA_REQ_SEL_UARTE                 20
  47 #define TEGRA_DMA_REQ_SEL_I2C                   21
  48 #define TEGRA_DMA_REQ_SEL_I2C2                  22
  49 #define TEGRA_DMA_REQ_SEL_I2C3                  23
  50 #define TEGRA_DMA_REQ_SEL_DVC_I2C               24
  51 #define TEGRA_DMA_REQ_SEL_OWR                   25
  52 #define TEGRA_DMA_REQ_SEL_INVALID               31
  53
  54 #endif