2 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
8 #include <linux/kernel.h>
9 #include <linux/platform_device.h>
10 #include <linux/interrupt.h>
12 #include <linux/gpio.h>
13 #include <linux/amba/bus.h>
15 #include <plat/ste_dma40.h>
17 #include <mach/hardware.h>
18 #include <mach/setup.h>
20 #include "ste-dma40-db8500.h"
22 static struct nmk_gpio_platform_data u8500_gpio_data
[] = {
23 GPIO_DATA("GPIO-0-31", 0),
24 GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
25 GPIO_DATA("GPIO-64-95", 64),
26 GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
27 GPIO_DATA("GPIO-128-159", 128),
28 GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
29 GPIO_DATA("GPIO-192-223", 192),
30 GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
31 GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
34 static struct resource u8500_gpio_resources
[] = {
46 struct platform_device u8500_gpio_devs
[] = {
58 struct amba_device u8500_ssp0_device
= {
60 .coherent_dma_mask
= ~0,
64 .start
= U8500_SSP0_BASE
,
65 .end
= U8500_SSP0_BASE
+ SZ_4K
- 1,
66 .flags
= IORESOURCE_MEM
,
68 .irq
= {IRQ_DB8500_SSP0
, NO_IRQ
},
69 /* ST-Ericsson modified id */
70 .periphid
= SSP_PER_ID
,
73 static struct resource u8500_i2c0_resources
[] = {
75 .start
= U8500_I2C0_BASE
,
76 .end
= U8500_I2C0_BASE
+ SZ_4K
- 1,
77 .flags
= IORESOURCE_MEM
,
80 .start
= IRQ_DB8500_I2C0
,
81 .end
= IRQ_DB8500_I2C0
,
82 .flags
= IORESOURCE_IRQ
,
86 struct platform_device u8500_i2c0_device
= {
89 .resource
= u8500_i2c0_resources
,
90 .num_resources
= ARRAY_SIZE(u8500_i2c0_resources
),
93 static struct resource u8500_i2c4_resources
[] = {
95 .start
= U8500_I2C4_BASE
,
96 .end
= U8500_I2C4_BASE
+ SZ_4K
- 1,
97 .flags
= IORESOURCE_MEM
,
100 .start
= IRQ_DB8500_I2C4
,
101 .end
= IRQ_DB8500_I2C4
,
102 .flags
= IORESOURCE_IRQ
,
106 struct platform_device u8500_i2c4_device
= {
109 .resource
= u8500_i2c4_resources
,
110 .num_resources
= ARRAY_SIZE(u8500_i2c4_resources
),
113 static struct resource dma40_resources
[] = {
115 .start
= U8500_DMA_BASE
,
116 .end
= U8500_DMA_BASE
+ SZ_4K
- 1,
117 .flags
= IORESOURCE_MEM
,
121 .start
= U8500_DMA_LCPA_BASE
,
122 .end
= U8500_DMA_LCPA_BASE
+ 2 * SZ_1K
- 1,
123 .flags
= IORESOURCE_MEM
,
127 .start
= IRQ_DB8500_DMA
,
128 .end
= IRQ_DB8500_DMA
,
129 .flags
= IORESOURCE_IRQ
,
133 /* Default configuration for physcial memcpy */
134 struct stedma40_chan_cfg dma40_memcpy_conf_phy
= {
135 .channel_type
= (STEDMA40_CHANNEL_IN_PHY_MODE
|
136 STEDMA40_PCHAN_BASIC_MODE
),
137 .dir
= STEDMA40_MEM_TO_MEM
,
139 .src_info
.endianess
= STEDMA40_LITTLE_ENDIAN
,
140 .src_info
.data_width
= STEDMA40_BYTE_WIDTH
,
141 .src_info
.psize
= STEDMA40_PSIZE_PHY_1
,
142 .src_info
.flow_ctrl
= STEDMA40_NO_FLOW_CTRL
,
144 .dst_info
.endianess
= STEDMA40_LITTLE_ENDIAN
,
145 .dst_info
.data_width
= STEDMA40_BYTE_WIDTH
,
146 .dst_info
.psize
= STEDMA40_PSIZE_PHY_1
,
147 .dst_info
.flow_ctrl
= STEDMA40_NO_FLOW_CTRL
,
149 /* Default configuration for logical memcpy */
150 struct stedma40_chan_cfg dma40_memcpy_conf_log
= {
151 .channel_type
= (STEDMA40_CHANNEL_IN_LOG_MODE
|
152 STEDMA40_LCHAN_SRC_LOG_DST_LOG
|
153 STEDMA40_NO_TIM_FOR_LINK
),
154 .dir
= STEDMA40_MEM_TO_MEM
,
156 .src_info
.endianess
= STEDMA40_LITTLE_ENDIAN
,
157 .src_info
.data_width
= STEDMA40_BYTE_WIDTH
,
158 .src_info
.psize
= STEDMA40_PSIZE_LOG_1
,
159 .src_info
.flow_ctrl
= STEDMA40_NO_FLOW_CTRL
,
161 .dst_info
.endianess
= STEDMA40_LITTLE_ENDIAN
,
162 .dst_info
.data_width
= STEDMA40_BYTE_WIDTH
,
163 .dst_info
.psize
= STEDMA40_PSIZE_LOG_1
,
164 .dst_info
.flow_ctrl
= STEDMA40_NO_FLOW_CTRL
,
168 * Mapping between destination event lines and physical device address.
169 * The event line is tied to a device and therefor the address is constant.
171 static const dma_addr_t dma40_tx_map
[STEDMA40_NR_DEV
];
173 /* Mapping between source event lines and physical device address */
174 static const dma_addr_t dma40_rx_map
[STEDMA40_NR_DEV
];
176 /* Reserved event lines for memcpy only */
177 static int dma40_memcpy_event
[] = {
178 STEDMA40_MEMCPY_TX_0
,
179 STEDMA40_MEMCPY_TX_1
,
180 STEDMA40_MEMCPY_TX_2
,
181 STEDMA40_MEMCPY_TX_3
,
182 STEDMA40_MEMCPY_TX_4
,
183 STEDMA40_MEMCPY_TX_5
,
186 static struct stedma40_platform_data dma40_plat_data
= {
187 .dev_len
= STEDMA40_NR_DEV
,
188 .dev_rx
= dma40_rx_map
,
189 .dev_tx
= dma40_tx_map
,
190 .memcpy
= dma40_memcpy_event
,
191 .memcpy_len
= ARRAY_SIZE(dma40_memcpy_event
),
192 .memcpy_conf_phy
= &dma40_memcpy_conf_phy
,
193 .memcpy_conf_log
= &dma40_memcpy_conf_log
,
194 .disabled_channels
= {-1},
197 struct platform_device u8500_dma40_device
= {
199 .platform_data
= &dma40_plat_data
,
203 .num_resources
= ARRAY_SIZE(dma40_resources
),
204 .resource
= dma40_resources
207 void dma40_u8500ed_fixup(void)
209 dma40_plat_data
.memcpy
= NULL
;
210 dma40_plat_data
.memcpy_len
= 0;
211 dma40_resources
[0].start
= U8500_DMA_BASE_ED
;
212 dma40_resources
[0].end
= U8500_DMA_BASE_ED
+ SZ_4K
- 1;
213 dma40_resources
[1].start
= U8500_DMA_LCPA_BASE_ED
;
214 dma40_resources
[1].end
= U8500_DMA_LCPA_BASE_ED
+ 2 * SZ_1K
- 1;