Merge branch 'acpica'
[deliverable/linux.git] / arch / arm / mach-zynq / common.c
1 /*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/cpumask.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
22 #include <linux/clk/zynq.h>
23 #include <linux/clocksource.h>
24 #include <linux/of_address.h>
25 #include <linux/of_irq.h>
26 #include <linux/of_platform.h>
27 #include <linux/of.h>
28 #include <linux/memblock.h>
29 #include <linux/irqchip.h>
30 #include <linux/irqchip/arm-gic.h>
31
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/time.h>
35 #include <asm/mach-types.h>
36 #include <asm/page.h>
37 #include <asm/pgtable.h>
38 #include <asm/smp_scu.h>
39 #include <asm/hardware/cache-l2x0.h>
40
41 #include "common.h"
42
43 void __iomem *zynq_scu_base;
44
45 /**
46 * zynq_memory_init - Initialize special memory
47 *
48 * We need to stop things allocating the low memory as DMA can't work in
49 * the 1st 512K of memory.
50 */
51 static void __init zynq_memory_init(void)
52 {
53 if (!__pa(PAGE_OFFSET))
54 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
55 }
56
57 static struct platform_device zynq_cpuidle_device = {
58 .name = "cpuidle-zynq",
59 };
60
61 /**
62 * zynq_init_machine - System specific initialization, intended to be
63 * called from board specific initialization.
64 */
65 static void __init zynq_init_machine(void)
66 {
67 /*
68 * 64KB way size, 8-way associativity, parity disabled
69 */
70 l2x0_of_init(0x02060000, 0xF0F0FFFF);
71
72 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
73
74 platform_device_register(&zynq_cpuidle_device);
75 }
76
77 static void __init zynq_timer_init(void)
78 {
79 zynq_slcr_init();
80 clocksource_of_init();
81 }
82
83 static struct map_desc zynq_cortex_a9_scu_map __initdata = {
84 .length = SZ_256,
85 .type = MT_DEVICE,
86 };
87
88 static void __init zynq_scu_map_io(void)
89 {
90 unsigned long base;
91
92 base = scu_a9_get_base();
93 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
94 /* Expected address is in vmalloc area that's why simple assign here */
95 zynq_cortex_a9_scu_map.virtual = base;
96 iotable_init(&zynq_cortex_a9_scu_map, 1);
97 zynq_scu_base = (void __iomem *)base;
98 BUG_ON(!zynq_scu_base);
99 }
100
101 /**
102 * zynq_map_io - Create memory mappings needed for early I/O.
103 */
104 static void __init zynq_map_io(void)
105 {
106 debug_ll_io_init();
107 zynq_scu_map_io();
108 }
109
110 static void __init zynq_irq_init(void)
111 {
112 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
113 irqchip_init();
114 }
115
116 static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
117 {
118 zynq_slcr_system_reset();
119 }
120
121 static const char * const zynq_dt_match[] = {
122 "xlnx,zynq-7000",
123 NULL
124 };
125
126 DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
127 .smp = smp_ops(zynq_smp_ops),
128 .map_io = zynq_map_io,
129 .init_irq = zynq_irq_init,
130 .init_machine = zynq_init_machine,
131 .init_time = zynq_timer_init,
132 .dt_compat = zynq_dt_match,
133 .reserve = zynq_memory_init,
134 .restart = zynq_system_reset,
135 MACHINE_END
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