2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page
*, unsigned long,
54 size_t, enum dma_data_direction
);
55 static void __dma_page_dev_to_cpu(struct page
*, unsigned long,
56 size_t, enum dma_data_direction
);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t
arm_dma_map_page(struct device
*dev
, struct page
*page
,
73 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
74 struct dma_attrs
*attrs
)
76 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
77 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
78 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
81 static dma_addr_t
arm_coherent_dma_map_page(struct device
*dev
, struct page
*page
,
82 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
83 struct dma_attrs
*attrs
)
85 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
89 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
90 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
91 * @handle: DMA address of buffer
92 * @size: size of buffer (same as passed to dma_map_page)
93 * @dir: DMA transfer direction (same as passed to dma_map_page)
95 * Unmap a page streaming mode DMA translation. The handle and size
96 * must match what was provided in the previous dma_map_page() call.
97 * All other usages are undefined.
99 * After this call, reads by the CPU to the buffer are guaranteed to see
100 * whatever the device wrote there.
102 static void arm_dma_unmap_page(struct device
*dev
, dma_addr_t handle
,
103 size_t size
, enum dma_data_direction dir
,
104 struct dma_attrs
*attrs
)
106 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
107 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev
, handle
)),
108 handle
& ~PAGE_MASK
, size
, dir
);
111 static void arm_dma_sync_single_for_cpu(struct device
*dev
,
112 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
114 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
115 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
116 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
119 static void arm_dma_sync_single_for_device(struct device
*dev
,
120 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
122 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
123 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
124 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
127 struct dma_map_ops arm_dma_ops
= {
128 .alloc
= arm_dma_alloc
,
129 .free
= arm_dma_free
,
130 .mmap
= arm_dma_mmap
,
131 .get_sgtable
= arm_dma_get_sgtable
,
132 .map_page
= arm_dma_map_page
,
133 .unmap_page
= arm_dma_unmap_page
,
134 .map_sg
= arm_dma_map_sg
,
135 .unmap_sg
= arm_dma_unmap_sg
,
136 .sync_single_for_cpu
= arm_dma_sync_single_for_cpu
,
137 .sync_single_for_device
= arm_dma_sync_single_for_device
,
138 .sync_sg_for_cpu
= arm_dma_sync_sg_for_cpu
,
139 .sync_sg_for_device
= arm_dma_sync_sg_for_device
,
140 .set_dma_mask
= arm_dma_set_mask
,
142 EXPORT_SYMBOL(arm_dma_ops
);
144 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
145 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
);
146 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
147 dma_addr_t handle
, struct dma_attrs
*attrs
);
149 struct dma_map_ops arm_coherent_dma_ops
= {
150 .alloc
= arm_coherent_dma_alloc
,
151 .free
= arm_coherent_dma_free
,
152 .mmap
= arm_dma_mmap
,
153 .get_sgtable
= arm_dma_get_sgtable
,
154 .map_page
= arm_coherent_dma_map_page
,
155 .map_sg
= arm_dma_map_sg
,
156 .set_dma_mask
= arm_dma_set_mask
,
158 EXPORT_SYMBOL(arm_coherent_dma_ops
);
160 static u64
get_coherent_dma_mask(struct device
*dev
)
162 u64 mask
= (u64
)arm_dma_limit
;
165 mask
= dev
->coherent_dma_mask
;
168 * Sanity check the DMA mask - it must be non-zero, and
169 * must be able to be satisfied by a DMA allocation.
172 dev_warn(dev
, "coherent DMA mask is unset\n");
176 if ((~mask
) & (u64
)arm_dma_limit
) {
177 dev_warn(dev
, "coherent DMA mask %#llx is smaller "
178 "than system GFP_DMA mask %#llx\n",
179 mask
, (u64
)arm_dma_limit
);
187 static void __dma_clear_buffer(struct page
*page
, size_t size
)
190 * Ensure that the allocated pages are zeroed, and that any data
191 * lurking in the kernel direct-mapped region is invalidated.
193 if (PageHighMem(page
)) {
194 phys_addr_t base
= __pfn_to_phys(page_to_pfn(page
));
195 phys_addr_t end
= base
+ size
;
197 void *ptr
= kmap_atomic(page
);
198 memset(ptr
, 0, PAGE_SIZE
);
199 dmac_flush_range(ptr
, ptr
+ PAGE_SIZE
);
204 outer_flush_range(base
, end
);
206 void *ptr
= page_address(page
);
207 memset(ptr
, 0, size
);
208 dmac_flush_range(ptr
, ptr
+ size
);
209 outer_flush_range(__pa(ptr
), __pa(ptr
) + size
);
214 * Allocate a DMA buffer for 'dev' of size 'size' using the
215 * specified gfp mask. Note that 'size' must be page aligned.
217 static struct page
*__dma_alloc_buffer(struct device
*dev
, size_t size
, gfp_t gfp
)
219 unsigned long order
= get_order(size
);
220 struct page
*page
, *p
, *e
;
222 page
= alloc_pages(gfp
, order
);
227 * Now split the huge page and free the excess pages
229 split_page(page
, order
);
230 for (p
= page
+ (size
>> PAGE_SHIFT
), e
= page
+ (1 << order
); p
< e
; p
++)
233 __dma_clear_buffer(page
, size
);
239 * Free a DMA buffer. 'size' must be page aligned.
241 static void __dma_free_buffer(struct page
*page
, size_t size
)
243 struct page
*e
= page
+ (size
>> PAGE_SHIFT
);
252 #ifdef CONFIG_HUGETLB_PAGE
253 #error ARM Coherent DMA allocator does not (yet) support huge TLB
256 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
257 pgprot_t prot
, struct page
**ret_page
,
260 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
261 pgprot_t prot
, struct page
**ret_page
,
265 __dma_alloc_remap(struct page
*page
, size_t size
, gfp_t gfp
, pgprot_t prot
,
268 struct vm_struct
*area
;
272 * DMA allocation can be mapped to user space, so lets
273 * set VM_USERMAP flags too.
275 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
279 addr
= (unsigned long)area
->addr
;
280 area
->phys_addr
= __pfn_to_phys(page_to_pfn(page
));
282 if (ioremap_page_range(addr
, addr
+ size
, area
->phys_addr
, prot
)) {
283 vunmap((void *)addr
);
289 static void __dma_free_remap(void *cpu_addr
, size_t size
)
291 unsigned int flags
= VM_ARM_DMA_CONSISTENT
| VM_USERMAP
;
292 struct vm_struct
*area
= find_vm_area(cpu_addr
);
293 if (!area
|| (area
->flags
& flags
) != flags
) {
294 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
297 unmap_kernel_range((unsigned long)cpu_addr
, size
);
301 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
306 unsigned long *bitmap
;
307 unsigned long nr_pages
;
312 static struct dma_pool atomic_pool
= {
313 .size
= DEFAULT_DMA_COHERENT_POOL_SIZE
,
316 static int __init
early_coherent_pool(char *p
)
318 atomic_pool
.size
= memparse(p
, &p
);
321 early_param("coherent_pool", early_coherent_pool
);
323 void __init
init_dma_coherent_pool_size(unsigned long size
)
326 * Catch any attempt to set the pool size too late.
328 BUG_ON(atomic_pool
.vaddr
);
331 * Set architecture specific coherent pool size only if
332 * it has not been changed by kernel command line parameter.
334 if (atomic_pool
.size
== DEFAULT_DMA_COHERENT_POOL_SIZE
)
335 atomic_pool
.size
= size
;
339 * Initialise the coherent pool for atomic allocations.
341 static int __init
atomic_pool_init(void)
343 struct dma_pool
*pool
= &atomic_pool
;
344 pgprot_t prot
= pgprot_dmacoherent(pgprot_kernel
);
345 gfp_t gfp
= GFP_KERNEL
| GFP_DMA
;
346 unsigned long nr_pages
= pool
->size
>> PAGE_SHIFT
;
347 unsigned long *bitmap
;
351 int bitmap_size
= BITS_TO_LONGS(nr_pages
) * sizeof(long);
353 bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
357 pages
= kzalloc(nr_pages
* sizeof(struct page
*), GFP_KERNEL
);
361 if (IS_ENABLED(CONFIG_CMA
))
362 ptr
= __alloc_from_contiguous(NULL
, pool
->size
, prot
, &page
,
365 ptr
= __alloc_remap_buffer(NULL
, pool
->size
, gfp
, prot
, &page
,
370 for (i
= 0; i
< nr_pages
; i
++)
373 spin_lock_init(&pool
->lock
);
376 pool
->bitmap
= bitmap
;
377 pool
->nr_pages
= nr_pages
;
378 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
379 (unsigned)pool
->size
/ 1024);
387 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
388 (unsigned)pool
->size
/ 1024);
392 * CMA is activated by core_initcall, so we must be called after it.
394 postcore_initcall(atomic_pool_init
);
396 struct dma_contig_early_reserve
{
401 static struct dma_contig_early_reserve dma_mmu_remap
[MAX_CMA_AREAS
] __initdata
;
403 static int dma_mmu_remap_num __initdata
;
405 void __init
dma_contiguous_early_fixup(phys_addr_t base
, unsigned long size
)
407 dma_mmu_remap
[dma_mmu_remap_num
].base
= base
;
408 dma_mmu_remap
[dma_mmu_remap_num
].size
= size
;
412 void __init
dma_contiguous_remap(void)
415 for (i
= 0; i
< dma_mmu_remap_num
; i
++) {
416 phys_addr_t start
= dma_mmu_remap
[i
].base
;
417 phys_addr_t end
= start
+ dma_mmu_remap
[i
].size
;
421 if (end
> arm_lowmem_limit
)
422 end
= arm_lowmem_limit
;
426 map
.pfn
= __phys_to_pfn(start
);
427 map
.virtual = __phys_to_virt(start
);
428 map
.length
= end
- start
;
429 map
.type
= MT_MEMORY_DMA_READY
;
432 * Clear previous low-memory mapping
434 for (addr
= __phys_to_virt(start
); addr
< __phys_to_virt(end
);
436 pmd_clear(pmd_off_k(addr
));
438 iotable_init(&map
, 1);
442 static int __dma_update_pte(pte_t
*pte
, pgtable_t token
, unsigned long addr
,
445 struct page
*page
= virt_to_page(addr
);
446 pgprot_t prot
= *(pgprot_t
*)data
;
448 set_pte_ext(pte
, mk_pte(page
, prot
), 0);
452 static void __dma_remap(struct page
*page
, size_t size
, pgprot_t prot
)
454 unsigned long start
= (unsigned long) page_address(page
);
455 unsigned end
= start
+ size
;
457 apply_to_page_range(&init_mm
, start
, size
, __dma_update_pte
, &prot
);
459 flush_tlb_kernel_range(start
, end
);
462 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
463 pgprot_t prot
, struct page
**ret_page
,
468 page
= __dma_alloc_buffer(dev
, size
, gfp
);
472 ptr
= __dma_alloc_remap(page
, size
, gfp
, prot
, caller
);
474 __dma_free_buffer(page
, size
);
482 static void *__alloc_from_pool(size_t size
, struct page
**ret_page
)
484 struct dma_pool
*pool
= &atomic_pool
;
485 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
489 unsigned long align_mask
;
492 WARN(1, "coherent pool not initialised!\n");
497 * Align the region allocation - allocations from pool are rather
498 * small, so align them to their order in pages, minimum is a page
499 * size. This helps reduce fragmentation of the DMA space.
501 align_mask
= (1 << get_order(size
)) - 1;
503 spin_lock_irqsave(&pool
->lock
, flags
);
504 pageno
= bitmap_find_next_zero_area(pool
->bitmap
, pool
->nr_pages
,
505 0, count
, align_mask
);
506 if (pageno
< pool
->nr_pages
) {
507 bitmap_set(pool
->bitmap
, pageno
, count
);
508 ptr
= pool
->vaddr
+ PAGE_SIZE
* pageno
;
509 *ret_page
= pool
->pages
[pageno
];
511 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
512 "Please increase it with coherent_pool= kernel parameter!\n",
513 (unsigned)pool
->size
/ 1024);
515 spin_unlock_irqrestore(&pool
->lock
, flags
);
520 static bool __in_atomic_pool(void *start
, size_t size
)
522 struct dma_pool
*pool
= &atomic_pool
;
523 void *end
= start
+ size
;
524 void *pool_start
= pool
->vaddr
;
525 void *pool_end
= pool
->vaddr
+ pool
->size
;
527 if (start
< pool_start
|| start
>= pool_end
)
533 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
534 start
, end
- 1, pool_start
, pool_end
- 1);
539 static int __free_from_pool(void *start
, size_t size
)
541 struct dma_pool
*pool
= &atomic_pool
;
542 unsigned long pageno
, count
;
545 if (!__in_atomic_pool(start
, size
))
548 pageno
= (start
- pool
->vaddr
) >> PAGE_SHIFT
;
549 count
= size
>> PAGE_SHIFT
;
551 spin_lock_irqsave(&pool
->lock
, flags
);
552 bitmap_clear(pool
->bitmap
, pageno
, count
);
553 spin_unlock_irqrestore(&pool
->lock
, flags
);
558 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
559 pgprot_t prot
, struct page
**ret_page
,
562 unsigned long order
= get_order(size
);
563 size_t count
= size
>> PAGE_SHIFT
;
567 page
= dma_alloc_from_contiguous(dev
, count
, order
);
571 __dma_clear_buffer(page
, size
);
573 if (PageHighMem(page
)) {
574 ptr
= __dma_alloc_remap(page
, size
, GFP_KERNEL
, prot
, caller
);
576 dma_release_from_contiguous(dev
, page
, count
);
580 __dma_remap(page
, size
, prot
);
581 ptr
= page_address(page
);
587 static void __free_from_contiguous(struct device
*dev
, struct page
*page
,
588 void *cpu_addr
, size_t size
)
590 if (PageHighMem(page
))
591 __dma_free_remap(cpu_addr
, size
);
593 __dma_remap(page
, size
, pgprot_kernel
);
594 dma_release_from_contiguous(dev
, page
, size
>> PAGE_SHIFT
);
597 static inline pgprot_t
__get_dma_pgprot(struct dma_attrs
*attrs
, pgprot_t prot
)
599 prot
= dma_get_attr(DMA_ATTR_WRITE_COMBINE
, attrs
) ?
600 pgprot_writecombine(prot
) :
601 pgprot_dmacoherent(prot
);
607 #else /* !CONFIG_MMU */
611 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
612 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
613 #define __alloc_from_pool(size, ret_page) NULL
614 #define __alloc_from_contiguous(dev, size, prot, ret, c) NULL
615 #define __free_from_pool(cpu_addr, size) 0
616 #define __free_from_contiguous(dev, page, cpu_addr, size) do { } while (0)
617 #define __dma_free_remap(cpu_addr, size) do { } while (0)
619 #endif /* CONFIG_MMU */
621 static void *__alloc_simple_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
622 struct page
**ret_page
)
625 page
= __dma_alloc_buffer(dev
, size
, gfp
);
630 return page_address(page
);
635 static void *__dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
636 gfp_t gfp
, pgprot_t prot
, bool is_coherent
, const void *caller
)
638 u64 mask
= get_coherent_dma_mask(dev
);
639 struct page
*page
= NULL
;
642 #ifdef CONFIG_DMA_API_DEBUG
643 u64 limit
= (mask
+ 1) & ~mask
;
644 if (limit
&& size
>= limit
) {
645 dev_warn(dev
, "coherent allocation too big (requested %#x mask %#llx)\n",
654 if (mask
< 0xffffffffULL
)
658 * Following is a work-around (a.k.a. hack) to prevent pages
659 * with __GFP_COMP being passed to split_page() which cannot
660 * handle them. The real problem is that this flag probably
661 * should be 0 on ARM as it is not supported on this
662 * platform; see CONFIG_HUGETLBFS.
664 gfp
&= ~(__GFP_COMP
);
666 *handle
= DMA_ERROR_CODE
;
667 size
= PAGE_ALIGN(size
);
669 if (is_coherent
|| nommu())
670 addr
= __alloc_simple_buffer(dev
, size
, gfp
, &page
);
671 else if (!(gfp
& __GFP_WAIT
))
672 addr
= __alloc_from_pool(size
, &page
);
673 else if (!IS_ENABLED(CONFIG_CMA
))
674 addr
= __alloc_remap_buffer(dev
, size
, gfp
, prot
, &page
, caller
);
676 addr
= __alloc_from_contiguous(dev
, size
, prot
, &page
, caller
);
679 *handle
= pfn_to_dma(dev
, page_to_pfn(page
));
685 * Allocate DMA-coherent memory space and return both the kernel remapped
686 * virtual and bus address for that space.
688 void *arm_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
689 gfp_t gfp
, struct dma_attrs
*attrs
)
691 pgprot_t prot
= __get_dma_pgprot(attrs
, pgprot_kernel
);
694 if (dma_alloc_from_coherent(dev
, size
, handle
, &memory
))
697 return __dma_alloc(dev
, size
, handle
, gfp
, prot
, false,
698 __builtin_return_address(0));
701 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
702 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
704 pgprot_t prot
= __get_dma_pgprot(attrs
, pgprot_kernel
);
707 if (dma_alloc_from_coherent(dev
, size
, handle
, &memory
))
710 return __dma_alloc(dev
, size
, handle
, gfp
, prot
, true,
711 __builtin_return_address(0));
715 * Create userspace mapping for the DMA-coherent memory.
717 int arm_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
718 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
719 struct dma_attrs
*attrs
)
723 unsigned long nr_vma_pages
= (vma
->vm_end
- vma
->vm_start
) >> PAGE_SHIFT
;
724 unsigned long nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
725 unsigned long pfn
= dma_to_pfn(dev
, dma_addr
);
726 unsigned long off
= vma
->vm_pgoff
;
728 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
730 if (dma_mmap_from_coherent(dev
, vma
, cpu_addr
, size
, &ret
))
733 if (off
< nr_pages
&& nr_vma_pages
<= (nr_pages
- off
)) {
734 ret
= remap_pfn_range(vma
, vma
->vm_start
,
736 vma
->vm_end
- vma
->vm_start
,
739 #endif /* CONFIG_MMU */
745 * Free a buffer as defined by the above mapping.
747 static void __arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
748 dma_addr_t handle
, struct dma_attrs
*attrs
,
751 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
753 if (dma_release_from_coherent(dev
, get_order(size
), cpu_addr
))
756 size
= PAGE_ALIGN(size
);
758 if (is_coherent
|| nommu()) {
759 __dma_free_buffer(page
, size
);
760 } else if (__free_from_pool(cpu_addr
, size
)) {
762 } else if (!IS_ENABLED(CONFIG_CMA
)) {
763 __dma_free_remap(cpu_addr
, size
);
764 __dma_free_buffer(page
, size
);
767 * Non-atomic allocations cannot be freed with IRQs disabled
769 WARN_ON(irqs_disabled());
770 __free_from_contiguous(dev
, page
, cpu_addr
, size
);
774 void arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
775 dma_addr_t handle
, struct dma_attrs
*attrs
)
777 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, false);
780 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
781 dma_addr_t handle
, struct dma_attrs
*attrs
)
783 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, true);
786 int arm_dma_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
787 void *cpu_addr
, dma_addr_t handle
, size_t size
,
788 struct dma_attrs
*attrs
)
790 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
793 ret
= sg_alloc_table(sgt
, 1, GFP_KERNEL
);
797 sg_set_page(sgt
->sgl
, page
, PAGE_ALIGN(size
), 0);
801 static void dma_cache_maint_page(struct page
*page
, unsigned long offset
,
802 size_t size
, enum dma_data_direction dir
,
803 void (*op
)(const void *, size_t, int))
808 pfn
= page_to_pfn(page
) + offset
/ PAGE_SIZE
;
812 * A single sg entry may refer to multiple physically contiguous
813 * pages. But we still need to process highmem pages individually.
814 * If highmem is not configured then the bulk of this loop gets
821 page
= pfn_to_page(pfn
);
823 if (PageHighMem(page
)) {
824 if (len
+ offset
> PAGE_SIZE
)
825 len
= PAGE_SIZE
- offset
;
826 vaddr
= kmap_high_get(page
);
831 } else if (cache_is_vipt()) {
832 /* unmapped pages might still be cached */
833 vaddr
= kmap_atomic(page
);
834 op(vaddr
+ offset
, len
, dir
);
835 kunmap_atomic(vaddr
);
838 vaddr
= page_address(page
) + offset
;
848 * Make an area consistent for devices.
849 * Note: Drivers should NOT use this function directly, as it will break
850 * platforms with CONFIG_DMABOUNCE.
851 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
853 static void __dma_page_cpu_to_dev(struct page
*page
, unsigned long off
,
854 size_t size
, enum dma_data_direction dir
)
858 dma_cache_maint_page(page
, off
, size
, dir
, dmac_map_area
);
860 paddr
= page_to_phys(page
) + off
;
861 if (dir
== DMA_FROM_DEVICE
) {
862 outer_inv_range(paddr
, paddr
+ size
);
864 outer_clean_range(paddr
, paddr
+ size
);
866 /* FIXME: non-speculating: flush on bidirectional mappings? */
869 static void __dma_page_dev_to_cpu(struct page
*page
, unsigned long off
,
870 size_t size
, enum dma_data_direction dir
)
872 unsigned long paddr
= page_to_phys(page
) + off
;
874 /* FIXME: non-speculating: not required */
875 /* don't bother invalidating if DMA to device */
876 if (dir
!= DMA_TO_DEVICE
)
877 outer_inv_range(paddr
, paddr
+ size
);
879 dma_cache_maint_page(page
, off
, size
, dir
, dmac_unmap_area
);
882 * Mark the D-cache clean for this page to avoid extra flushing.
884 if (dir
!= DMA_TO_DEVICE
&& off
== 0 && size
>= PAGE_SIZE
)
885 set_bit(PG_dcache_clean
, &page
->flags
);
889 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
890 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
891 * @sg: list of buffers
892 * @nents: number of buffers to map
893 * @dir: DMA transfer direction
895 * Map a set of buffers described by scatterlist in streaming mode for DMA.
896 * This is the scatter-gather version of the dma_map_single interface.
897 * Here the scatter gather list elements are each tagged with the
898 * appropriate dma address and length. They are obtained via
899 * sg_dma_{address,length}.
901 * Device ownership issues as mentioned for dma_map_single are the same
904 int arm_dma_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
905 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
907 struct dma_map_ops
*ops
= get_dma_ops(dev
);
908 struct scatterlist
*s
;
911 for_each_sg(sg
, s
, nents
, i
) {
912 #ifdef CONFIG_NEED_SG_DMA_LENGTH
913 s
->dma_length
= s
->length
;
915 s
->dma_address
= ops
->map_page(dev
, sg_page(s
), s
->offset
,
916 s
->length
, dir
, attrs
);
917 if (dma_mapping_error(dev
, s
->dma_address
))
923 for_each_sg(sg
, s
, i
, j
)
924 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
929 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
930 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
931 * @sg: list of buffers
932 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
933 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
935 * Unmap a set of streaming mode DMA translations. Again, CPU access
936 * rules concerning calls here are the same as for dma_unmap_single().
938 void arm_dma_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
939 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
941 struct dma_map_ops
*ops
= get_dma_ops(dev
);
942 struct scatterlist
*s
;
946 for_each_sg(sg
, s
, nents
, i
)
947 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
951 * arm_dma_sync_sg_for_cpu
952 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
953 * @sg: list of buffers
954 * @nents: number of buffers to map (returned from dma_map_sg)
955 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
957 void arm_dma_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
958 int nents
, enum dma_data_direction dir
)
960 struct dma_map_ops
*ops
= get_dma_ops(dev
);
961 struct scatterlist
*s
;
964 for_each_sg(sg
, s
, nents
, i
)
965 ops
->sync_single_for_cpu(dev
, sg_dma_address(s
), s
->length
,
970 * arm_dma_sync_sg_for_device
971 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
972 * @sg: list of buffers
973 * @nents: number of buffers to map (returned from dma_map_sg)
974 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
976 void arm_dma_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
977 int nents
, enum dma_data_direction dir
)
979 struct dma_map_ops
*ops
= get_dma_ops(dev
);
980 struct scatterlist
*s
;
983 for_each_sg(sg
, s
, nents
, i
)
984 ops
->sync_single_for_device(dev
, sg_dma_address(s
), s
->length
,
989 * Return whether the given device DMA address mask can be supported
990 * properly. For example, if your device can only drive the low 24-bits
991 * during bus mastering, then you would pass 0x00ffffff as the mask
994 int dma_supported(struct device
*dev
, u64 mask
)
996 if (mask
< (u64
)arm_dma_limit
)
1000 EXPORT_SYMBOL(dma_supported
);
1002 int arm_dma_set_mask(struct device
*dev
, u64 dma_mask
)
1004 if (!dev
->dma_mask
|| !dma_supported(dev
, dma_mask
))
1007 *dev
->dma_mask
= dma_mask
;
1012 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1014 static int __init
dma_debug_do_init(void)
1016 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
1019 fs_initcall(dma_debug_do_init
);
1021 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1025 static inline dma_addr_t
__alloc_iova(struct dma_iommu_mapping
*mapping
,
1028 unsigned int order
= get_order(size
);
1029 unsigned int align
= 0;
1030 unsigned int count
, start
;
1031 unsigned long flags
;
1033 if (order
> CONFIG_ARM_DMA_IOMMU_ALIGNMENT
)
1034 order
= CONFIG_ARM_DMA_IOMMU_ALIGNMENT
;
1036 count
= ((PAGE_ALIGN(size
) >> PAGE_SHIFT
) +
1037 (1 << mapping
->order
) - 1) >> mapping
->order
;
1039 if (order
> mapping
->order
)
1040 align
= (1 << (order
- mapping
->order
)) - 1;
1042 spin_lock_irqsave(&mapping
->lock
, flags
);
1043 start
= bitmap_find_next_zero_area(mapping
->bitmap
, mapping
->bits
, 0,
1045 if (start
> mapping
->bits
) {
1046 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1047 return DMA_ERROR_CODE
;
1050 bitmap_set(mapping
->bitmap
, start
, count
);
1051 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1053 return mapping
->base
+ (start
<< (mapping
->order
+ PAGE_SHIFT
));
1056 static inline void __free_iova(struct dma_iommu_mapping
*mapping
,
1057 dma_addr_t addr
, size_t size
)
1059 unsigned int start
= (addr
- mapping
->base
) >>
1060 (mapping
->order
+ PAGE_SHIFT
);
1061 unsigned int count
= ((size
>> PAGE_SHIFT
) +
1062 (1 << mapping
->order
) - 1) >> mapping
->order
;
1063 unsigned long flags
;
1065 spin_lock_irqsave(&mapping
->lock
, flags
);
1066 bitmap_clear(mapping
->bitmap
, start
, count
);
1067 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1070 static struct page
**__iommu_alloc_buffer(struct device
*dev
, size_t size
,
1071 gfp_t gfp
, struct dma_attrs
*attrs
)
1073 struct page
**pages
;
1074 int count
= size
>> PAGE_SHIFT
;
1075 int array_size
= count
* sizeof(struct page
*);
1078 if (array_size
<= PAGE_SIZE
)
1079 pages
= kzalloc(array_size
, gfp
);
1081 pages
= vzalloc(array_size
);
1085 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
))
1087 unsigned long order
= get_order(size
);
1090 page
= dma_alloc_from_contiguous(dev
, count
, order
);
1094 __dma_clear_buffer(page
, size
);
1096 for (i
= 0; i
< count
; i
++)
1097 pages
[i
] = page
+ i
;
1103 * IOMMU can map any pages, so himem can also be used here
1105 gfp
|= __GFP_NOWARN
| __GFP_HIGHMEM
;
1108 int j
, order
= __fls(count
);
1110 pages
[i
] = alloc_pages(gfp
, order
);
1111 while (!pages
[i
] && order
)
1112 pages
[i
] = alloc_pages(gfp
, --order
);
1117 split_page(pages
[i
], order
);
1120 pages
[i
+ j
] = pages
[i
] + j
;
1123 __dma_clear_buffer(pages
[i
], PAGE_SIZE
<< order
);
1125 count
-= 1 << order
;
1132 __free_pages(pages
[i
], 0);
1133 if (array_size
<= PAGE_SIZE
)
1140 static int __iommu_free_buffer(struct device
*dev
, struct page
**pages
,
1141 size_t size
, struct dma_attrs
*attrs
)
1143 int count
= size
>> PAGE_SHIFT
;
1144 int array_size
= count
* sizeof(struct page
*);
1147 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
)) {
1148 dma_release_from_contiguous(dev
, pages
[0], count
);
1150 for (i
= 0; i
< count
; i
++)
1152 __free_pages(pages
[i
], 0);
1155 if (array_size
<= PAGE_SIZE
)
1163 * Create a CPU mapping for a specified pages
1166 __iommu_alloc_remap(struct page
**pages
, size_t size
, gfp_t gfp
, pgprot_t prot
,
1169 unsigned int i
, nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1170 struct vm_struct
*area
;
1173 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
1178 area
->pages
= pages
;
1179 area
->nr_pages
= nr_pages
;
1180 p
= (unsigned long)area
->addr
;
1182 for (i
= 0; i
< nr_pages
; i
++) {
1183 phys_addr_t phys
= __pfn_to_phys(page_to_pfn(pages
[i
]));
1184 if (ioremap_page_range(p
, p
+ PAGE_SIZE
, phys
, prot
))
1190 unmap_kernel_range((unsigned long)area
->addr
, size
);
1196 * Create a mapping in device IO address space for specified pages
1199 __iommu_create_mapping(struct device
*dev
, struct page
**pages
, size_t size
)
1201 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1202 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1203 dma_addr_t dma_addr
, iova
;
1204 int i
, ret
= DMA_ERROR_CODE
;
1206 dma_addr
= __alloc_iova(mapping
, size
);
1207 if (dma_addr
== DMA_ERROR_CODE
)
1211 for (i
= 0; i
< count
; ) {
1212 unsigned int next_pfn
= page_to_pfn(pages
[i
]) + 1;
1213 phys_addr_t phys
= page_to_phys(pages
[i
]);
1214 unsigned int len
, j
;
1216 for (j
= i
+ 1; j
< count
; j
++, next_pfn
++)
1217 if (page_to_pfn(pages
[j
]) != next_pfn
)
1220 len
= (j
- i
) << PAGE_SHIFT
;
1221 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, 0);
1229 iommu_unmap(mapping
->domain
, dma_addr
, iova
-dma_addr
);
1230 __free_iova(mapping
, dma_addr
, size
);
1231 return DMA_ERROR_CODE
;
1234 static int __iommu_remove_mapping(struct device
*dev
, dma_addr_t iova
, size_t size
)
1236 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1239 * add optional in-page offset from iova to size and align
1240 * result to page size
1242 size
= PAGE_ALIGN((iova
& ~PAGE_MASK
) + size
);
1245 iommu_unmap(mapping
->domain
, iova
, size
);
1246 __free_iova(mapping
, iova
, size
);
1250 static struct page
**__atomic_get_pages(void *addr
)
1252 struct dma_pool
*pool
= &atomic_pool
;
1253 struct page
**pages
= pool
->pages
;
1254 int offs
= (addr
- pool
->vaddr
) >> PAGE_SHIFT
;
1256 return pages
+ offs
;
1259 static struct page
**__iommu_get_pages(void *cpu_addr
, struct dma_attrs
*attrs
)
1261 struct vm_struct
*area
;
1263 if (__in_atomic_pool(cpu_addr
, PAGE_SIZE
))
1264 return __atomic_get_pages(cpu_addr
);
1266 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1269 area
= find_vm_area(cpu_addr
);
1270 if (area
&& (area
->flags
& VM_ARM_DMA_CONSISTENT
))
1275 static void *__iommu_alloc_atomic(struct device
*dev
, size_t size
,
1281 addr
= __alloc_from_pool(size
, &page
);
1285 *handle
= __iommu_create_mapping(dev
, &page
, size
);
1286 if (*handle
== DMA_ERROR_CODE
)
1292 __free_from_pool(addr
, size
);
1296 static void __iommu_free_atomic(struct device
*dev
, void *cpu_addr
,
1297 dma_addr_t handle
, size_t size
)
1299 __iommu_remove_mapping(dev
, handle
, size
);
1300 __free_from_pool(cpu_addr
, size
);
1303 static void *arm_iommu_alloc_attrs(struct device
*dev
, size_t size
,
1304 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
1306 pgprot_t prot
= __get_dma_pgprot(attrs
, pgprot_kernel
);
1307 struct page
**pages
;
1310 *handle
= DMA_ERROR_CODE
;
1311 size
= PAGE_ALIGN(size
);
1313 if (gfp
& GFP_ATOMIC
)
1314 return __iommu_alloc_atomic(dev
, size
, handle
);
1316 pages
= __iommu_alloc_buffer(dev
, size
, gfp
, attrs
);
1320 *handle
= __iommu_create_mapping(dev
, pages
, size
);
1321 if (*handle
== DMA_ERROR_CODE
)
1324 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1327 addr
= __iommu_alloc_remap(pages
, size
, gfp
, prot
,
1328 __builtin_return_address(0));
1335 __iommu_remove_mapping(dev
, *handle
, size
);
1337 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1341 static int arm_iommu_mmap_attrs(struct device
*dev
, struct vm_area_struct
*vma
,
1342 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
1343 struct dma_attrs
*attrs
)
1345 unsigned long uaddr
= vma
->vm_start
;
1346 unsigned long usize
= vma
->vm_end
- vma
->vm_start
;
1347 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1349 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
1355 int ret
= vm_insert_page(vma
, uaddr
, *pages
++);
1357 pr_err("Remapping memory failed: %d\n", ret
);
1362 } while (usize
> 0);
1368 * free a page as defined by the above mapping.
1369 * Must not be called with IRQs disabled.
1371 void arm_iommu_free_attrs(struct device
*dev
, size_t size
, void *cpu_addr
,
1372 dma_addr_t handle
, struct dma_attrs
*attrs
)
1374 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1375 size
= PAGE_ALIGN(size
);
1378 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
1382 if (__in_atomic_pool(cpu_addr
, size
)) {
1383 __iommu_free_atomic(dev
, cpu_addr
, handle
, size
);
1387 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
)) {
1388 unmap_kernel_range((unsigned long)cpu_addr
, size
);
1392 __iommu_remove_mapping(dev
, handle
, size
);
1393 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1396 static int arm_iommu_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
1397 void *cpu_addr
, dma_addr_t dma_addr
,
1398 size_t size
, struct dma_attrs
*attrs
)
1400 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1401 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1406 return sg_alloc_table_from_pages(sgt
, pages
, count
, 0, size
,
1411 * Map a part of the scatter-gather list into contiguous io address space
1413 static int __map_sg_chunk(struct device
*dev
, struct scatterlist
*sg
,
1414 size_t size
, dma_addr_t
*handle
,
1415 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1418 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1419 dma_addr_t iova
, iova_base
;
1422 struct scatterlist
*s
;
1424 size
= PAGE_ALIGN(size
);
1425 *handle
= DMA_ERROR_CODE
;
1427 iova_base
= iova
= __alloc_iova(mapping
, size
);
1428 if (iova
== DMA_ERROR_CODE
)
1431 for (count
= 0, s
= sg
; count
< (size
>> PAGE_SHIFT
); s
= sg_next(s
)) {
1432 phys_addr_t phys
= page_to_phys(sg_page(s
));
1433 unsigned int len
= PAGE_ALIGN(s
->offset
+ s
->length
);
1436 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1437 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1439 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, 0);
1442 count
+= len
>> PAGE_SHIFT
;
1445 *handle
= iova_base
;
1449 iommu_unmap(mapping
->domain
, iova_base
, count
* PAGE_SIZE
);
1450 __free_iova(mapping
, iova_base
, size
);
1454 static int __iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1455 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1458 struct scatterlist
*s
= sg
, *dma
= sg
, *start
= sg
;
1460 unsigned int offset
= s
->offset
;
1461 unsigned int size
= s
->offset
+ s
->length
;
1462 unsigned int max
= dma_get_max_seg_size(dev
);
1464 for (i
= 1; i
< nents
; i
++) {
1467 s
->dma_address
= DMA_ERROR_CODE
;
1470 if (s
->offset
|| (size
& ~PAGE_MASK
) || size
+ s
->length
> max
) {
1471 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
,
1472 dir
, attrs
, is_coherent
) < 0)
1475 dma
->dma_address
+= offset
;
1476 dma
->dma_length
= size
- offset
;
1478 size
= offset
= s
->offset
;
1485 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
, dir
, attrs
,
1489 dma
->dma_address
+= offset
;
1490 dma
->dma_length
= size
- offset
;
1495 for_each_sg(sg
, s
, count
, i
)
1496 __iommu_remove_mapping(dev
, sg_dma_address(s
), sg_dma_len(s
));
1501 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1502 * @dev: valid struct device pointer
1503 * @sg: list of buffers
1504 * @nents: number of buffers to map
1505 * @dir: DMA transfer direction
1507 * Map a set of i/o coherent buffers described by scatterlist in streaming
1508 * mode for DMA. The scatter gather list elements are merged together (if
1509 * possible) and tagged with the appropriate dma address and length. They are
1510 * obtained via sg_dma_{address,length}.
1512 int arm_coherent_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1513 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1515 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, true);
1519 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1520 * @dev: valid struct device pointer
1521 * @sg: list of buffers
1522 * @nents: number of buffers to map
1523 * @dir: DMA transfer direction
1525 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1526 * The scatter gather list elements are merged together (if possible) and
1527 * tagged with the appropriate dma address and length. They are obtained via
1528 * sg_dma_{address,length}.
1530 int arm_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1531 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1533 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, false);
1536 static void __iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1537 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1540 struct scatterlist
*s
;
1543 for_each_sg(sg
, s
, nents
, i
) {
1545 __iommu_remove_mapping(dev
, sg_dma_address(s
),
1548 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1549 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
,
1555 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1556 * @dev: valid struct device pointer
1557 * @sg: list of buffers
1558 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1559 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1561 * Unmap a set of streaming mode DMA translations. Again, CPU access
1562 * rules concerning calls here are the same as for dma_unmap_single().
1564 void arm_coherent_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1565 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1567 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, true);
1571 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1572 * @dev: valid struct device pointer
1573 * @sg: list of buffers
1574 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1575 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1577 * Unmap a set of streaming mode DMA translations. Again, CPU access
1578 * rules concerning calls here are the same as for dma_unmap_single().
1580 void arm_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1581 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1583 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, false);
1587 * arm_iommu_sync_sg_for_cpu
1588 * @dev: valid struct device pointer
1589 * @sg: list of buffers
1590 * @nents: number of buffers to map (returned from dma_map_sg)
1591 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1593 void arm_iommu_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1594 int nents
, enum dma_data_direction dir
)
1596 struct scatterlist
*s
;
1599 for_each_sg(sg
, s
, nents
, i
)
1600 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
, s
->length
, dir
);
1605 * arm_iommu_sync_sg_for_device
1606 * @dev: valid struct device pointer
1607 * @sg: list of buffers
1608 * @nents: number of buffers to map (returned from dma_map_sg)
1609 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1611 void arm_iommu_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1612 int nents
, enum dma_data_direction dir
)
1614 struct scatterlist
*s
;
1617 for_each_sg(sg
, s
, nents
, i
)
1618 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1623 * arm_coherent_iommu_map_page
1624 * @dev: valid struct device pointer
1625 * @page: page that buffer resides in
1626 * @offset: offset into page for start of buffer
1627 * @size: size of buffer to map
1628 * @dir: DMA transfer direction
1630 * Coherent IOMMU aware version of arm_dma_map_page()
1632 static dma_addr_t
arm_coherent_iommu_map_page(struct device
*dev
, struct page
*page
,
1633 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1634 struct dma_attrs
*attrs
)
1636 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1637 dma_addr_t dma_addr
;
1638 int ret
, len
= PAGE_ALIGN(size
+ offset
);
1640 dma_addr
= __alloc_iova(mapping
, len
);
1641 if (dma_addr
== DMA_ERROR_CODE
)
1644 ret
= iommu_map(mapping
->domain
, dma_addr
, page_to_phys(page
), len
, 0);
1648 return dma_addr
+ offset
;
1650 __free_iova(mapping
, dma_addr
, len
);
1651 return DMA_ERROR_CODE
;
1655 * arm_iommu_map_page
1656 * @dev: valid struct device pointer
1657 * @page: page that buffer resides in
1658 * @offset: offset into page for start of buffer
1659 * @size: size of buffer to map
1660 * @dir: DMA transfer direction
1662 * IOMMU aware version of arm_dma_map_page()
1664 static dma_addr_t
arm_iommu_map_page(struct device
*dev
, struct page
*page
,
1665 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1666 struct dma_attrs
*attrs
)
1668 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1669 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1671 return arm_coherent_iommu_map_page(dev
, page
, offset
, size
, dir
, attrs
);
1675 * arm_coherent_iommu_unmap_page
1676 * @dev: valid struct device pointer
1677 * @handle: DMA address of buffer
1678 * @size: size of buffer (same as passed to dma_map_page)
1679 * @dir: DMA transfer direction (same as passed to dma_map_page)
1681 * Coherent IOMMU aware version of arm_dma_unmap_page()
1683 static void arm_coherent_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1684 size_t size
, enum dma_data_direction dir
,
1685 struct dma_attrs
*attrs
)
1687 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1688 dma_addr_t iova
= handle
& PAGE_MASK
;
1689 int offset
= handle
& ~PAGE_MASK
;
1690 int len
= PAGE_ALIGN(size
+ offset
);
1695 iommu_unmap(mapping
->domain
, iova
, len
);
1696 __free_iova(mapping
, iova
, len
);
1700 * arm_iommu_unmap_page
1701 * @dev: valid struct device pointer
1702 * @handle: DMA address of buffer
1703 * @size: size of buffer (same as passed to dma_map_page)
1704 * @dir: DMA transfer direction (same as passed to dma_map_page)
1706 * IOMMU aware version of arm_dma_unmap_page()
1708 static void arm_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1709 size_t size
, enum dma_data_direction dir
,
1710 struct dma_attrs
*attrs
)
1712 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1713 dma_addr_t iova
= handle
& PAGE_MASK
;
1714 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1715 int offset
= handle
& ~PAGE_MASK
;
1716 int len
= PAGE_ALIGN(size
+ offset
);
1721 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1722 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1724 iommu_unmap(mapping
->domain
, iova
, len
);
1725 __free_iova(mapping
, iova
, len
);
1728 static void arm_iommu_sync_single_for_cpu(struct device
*dev
,
1729 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1731 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1732 dma_addr_t iova
= handle
& PAGE_MASK
;
1733 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1734 unsigned int offset
= handle
& ~PAGE_MASK
;
1739 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1742 static void arm_iommu_sync_single_for_device(struct device
*dev
,
1743 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1745 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1746 dma_addr_t iova
= handle
& PAGE_MASK
;
1747 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1748 unsigned int offset
= handle
& ~PAGE_MASK
;
1753 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1756 struct dma_map_ops iommu_ops
= {
1757 .alloc
= arm_iommu_alloc_attrs
,
1758 .free
= arm_iommu_free_attrs
,
1759 .mmap
= arm_iommu_mmap_attrs
,
1760 .get_sgtable
= arm_iommu_get_sgtable
,
1762 .map_page
= arm_iommu_map_page
,
1763 .unmap_page
= arm_iommu_unmap_page
,
1764 .sync_single_for_cpu
= arm_iommu_sync_single_for_cpu
,
1765 .sync_single_for_device
= arm_iommu_sync_single_for_device
,
1767 .map_sg
= arm_iommu_map_sg
,
1768 .unmap_sg
= arm_iommu_unmap_sg
,
1769 .sync_sg_for_cpu
= arm_iommu_sync_sg_for_cpu
,
1770 .sync_sg_for_device
= arm_iommu_sync_sg_for_device
,
1772 .set_dma_mask
= arm_dma_set_mask
,
1775 struct dma_map_ops iommu_coherent_ops
= {
1776 .alloc
= arm_iommu_alloc_attrs
,
1777 .free
= arm_iommu_free_attrs
,
1778 .mmap
= arm_iommu_mmap_attrs
,
1779 .get_sgtable
= arm_iommu_get_sgtable
,
1781 .map_page
= arm_coherent_iommu_map_page
,
1782 .unmap_page
= arm_coherent_iommu_unmap_page
,
1784 .map_sg
= arm_coherent_iommu_map_sg
,
1785 .unmap_sg
= arm_coherent_iommu_unmap_sg
,
1787 .set_dma_mask
= arm_dma_set_mask
,
1791 * arm_iommu_create_mapping
1792 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1793 * @base: start address of the valid IO address space
1794 * @size: size of the valid IO address space
1795 * @order: accuracy of the IO addresses allocations
1797 * Creates a mapping structure which holds information about used/unused
1798 * IO address ranges, which is required to perform memory allocation and
1799 * mapping with IOMMU aware functions.
1801 * The client device need to be attached to the mapping with
1802 * arm_iommu_attach_device function.
1804 struct dma_iommu_mapping
*
1805 arm_iommu_create_mapping(struct bus_type
*bus
, dma_addr_t base
, size_t size
,
1808 unsigned int count
= size
>> (PAGE_SHIFT
+ order
);
1809 unsigned int bitmap_size
= BITS_TO_LONGS(count
) * sizeof(long);
1810 struct dma_iommu_mapping
*mapping
;
1814 return ERR_PTR(-EINVAL
);
1816 mapping
= kzalloc(sizeof(struct dma_iommu_mapping
), GFP_KERNEL
);
1820 mapping
->bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
1821 if (!mapping
->bitmap
)
1824 mapping
->base
= base
;
1825 mapping
->bits
= BITS_PER_BYTE
* bitmap_size
;
1826 mapping
->order
= order
;
1827 spin_lock_init(&mapping
->lock
);
1829 mapping
->domain
= iommu_domain_alloc(bus
);
1830 if (!mapping
->domain
)
1833 kref_init(&mapping
->kref
);
1836 kfree(mapping
->bitmap
);
1840 return ERR_PTR(err
);
1842 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping
);
1844 static void release_iommu_mapping(struct kref
*kref
)
1846 struct dma_iommu_mapping
*mapping
=
1847 container_of(kref
, struct dma_iommu_mapping
, kref
);
1849 iommu_domain_free(mapping
->domain
);
1850 kfree(mapping
->bitmap
);
1854 void arm_iommu_release_mapping(struct dma_iommu_mapping
*mapping
)
1857 kref_put(&mapping
->kref
, release_iommu_mapping
);
1859 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping
);
1862 * arm_iommu_attach_device
1863 * @dev: valid struct device pointer
1864 * @mapping: io address space mapping structure (returned from
1865 * arm_iommu_create_mapping)
1867 * Attaches specified io address space mapping to the provided device,
1868 * this replaces the dma operations (dma_map_ops pointer) with the
1869 * IOMMU aware version. More than one client might be attached to
1870 * the same io address space mapping.
1872 int arm_iommu_attach_device(struct device
*dev
,
1873 struct dma_iommu_mapping
*mapping
)
1877 err
= iommu_attach_device(mapping
->domain
, dev
);
1881 kref_get(&mapping
->kref
);
1882 dev
->archdata
.mapping
= mapping
;
1883 set_dma_ops(dev
, &iommu_ops
);
1885 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev
));
1888 EXPORT_SYMBOL_GPL(arm_iommu_attach_device
);
1891 * arm_iommu_detach_device
1892 * @dev: valid struct device pointer
1894 * Detaches the provided device from a previously attached map.
1895 * This voids the dma operations (dma_map_ops pointer)
1897 void arm_iommu_detach_device(struct device
*dev
)
1899 struct dma_iommu_mapping
*mapping
;
1901 mapping
= to_dma_iommu_mapping(dev
);
1903 dev_warn(dev
, "Not attached\n");
1907 iommu_detach_device(mapping
->domain
, dev
);
1908 kref_put(&mapping
->kref
, release_iommu_mapping
);
1910 set_dma_ops(dev
, NULL
);
1912 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev
));
1914 EXPORT_SYMBOL_GPL(arm_iommu_detach_device
);