2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/genalloc.h>
16 #include <linux/gfp.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/dma-contiguous.h>
23 #include <linux/highmem.h>
24 #include <linux/memblock.h>
25 #include <linux/slab.h>
26 #include <linux/iommu.h>
28 #include <linux/vmalloc.h>
29 #include <linux/sizes.h>
30 #include <linux/cma.h>
32 #include <asm/memory.h>
33 #include <asm/highmem.h>
34 #include <asm/cacheflush.h>
35 #include <asm/tlbflush.h>
36 #include <asm/mach/arch.h>
37 #include <asm/dma-iommu.h>
38 #include <asm/mach/map.h>
39 #include <asm/system_info.h>
40 #include <asm/dma-contiguous.h>
45 struct arm_dma_alloc_args
{
54 struct arm_dma_free_args
{
62 struct arm_dma_allocator
{
63 void *(*alloc
)(struct arm_dma_alloc_args
*args
,
64 struct page
**ret_page
);
65 void (*free
)(struct arm_dma_free_args
*args
);
68 struct arm_dma_buffer
{
69 struct list_head list
;
71 struct arm_dma_allocator
*allocator
;
74 static LIST_HEAD(arm_dma_bufs
);
75 static DEFINE_SPINLOCK(arm_dma_bufs_lock
);
77 static struct arm_dma_buffer
*arm_dma_buffer_find(void *virt
)
79 struct arm_dma_buffer
*buf
, *found
= NULL
;
82 spin_lock_irqsave(&arm_dma_bufs_lock
, flags
);
83 list_for_each_entry(buf
, &arm_dma_bufs
, list
) {
84 if (buf
->virt
== virt
) {
90 spin_unlock_irqrestore(&arm_dma_bufs_lock
, flags
);
95 * The DMA API is built upon the notion of "buffer ownership". A buffer
96 * is either exclusively owned by the CPU (and therefore may be accessed
97 * by it) or exclusively owned by the DMA device. These helper functions
98 * represent the transitions between these two ownership states.
100 * Note, however, that on later ARMs, this notion does not work due to
101 * speculative prefetches. We model our approach on the assumption that
102 * the CPU does do speculative prefetches, which means we clean caches
103 * before transfers and delay cache invalidation until transfer completion.
106 static void __dma_page_cpu_to_dev(struct page
*, unsigned long,
107 size_t, enum dma_data_direction
);
108 static void __dma_page_dev_to_cpu(struct page
*, unsigned long,
109 size_t, enum dma_data_direction
);
112 * arm_dma_map_page - map a portion of a page for streaming DMA
113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
114 * @page: page that buffer resides in
115 * @offset: offset into page for start of buffer
116 * @size: size of buffer to map
117 * @dir: DMA transfer direction
119 * Ensure that any data held in the cache is appropriately discarded
122 * The device owns this memory once this call has completed. The CPU
123 * can regain ownership by calling dma_unmap_page().
125 static dma_addr_t
arm_dma_map_page(struct device
*dev
, struct page
*page
,
126 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
127 struct dma_attrs
*attrs
)
129 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
130 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
131 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
134 static dma_addr_t
arm_coherent_dma_map_page(struct device
*dev
, struct page
*page
,
135 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
136 struct dma_attrs
*attrs
)
138 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
142 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
143 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
144 * @handle: DMA address of buffer
145 * @size: size of buffer (same as passed to dma_map_page)
146 * @dir: DMA transfer direction (same as passed to dma_map_page)
148 * Unmap a page streaming mode DMA translation. The handle and size
149 * must match what was provided in the previous dma_map_page() call.
150 * All other usages are undefined.
152 * After this call, reads by the CPU to the buffer are guaranteed to see
153 * whatever the device wrote there.
155 static void arm_dma_unmap_page(struct device
*dev
, dma_addr_t handle
,
156 size_t size
, enum dma_data_direction dir
,
157 struct dma_attrs
*attrs
)
159 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
160 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev
, handle
)),
161 handle
& ~PAGE_MASK
, size
, dir
);
164 static void arm_dma_sync_single_for_cpu(struct device
*dev
,
165 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
167 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
168 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
169 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
172 static void arm_dma_sync_single_for_device(struct device
*dev
,
173 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
175 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
176 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
177 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
180 struct dma_map_ops arm_dma_ops
= {
181 .alloc
= arm_dma_alloc
,
182 .free
= arm_dma_free
,
183 .mmap
= arm_dma_mmap
,
184 .get_sgtable
= arm_dma_get_sgtable
,
185 .map_page
= arm_dma_map_page
,
186 .unmap_page
= arm_dma_unmap_page
,
187 .map_sg
= arm_dma_map_sg
,
188 .unmap_sg
= arm_dma_unmap_sg
,
189 .sync_single_for_cpu
= arm_dma_sync_single_for_cpu
,
190 .sync_single_for_device
= arm_dma_sync_single_for_device
,
191 .sync_sg_for_cpu
= arm_dma_sync_sg_for_cpu
,
192 .sync_sg_for_device
= arm_dma_sync_sg_for_device
,
194 EXPORT_SYMBOL(arm_dma_ops
);
196 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
197 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
);
198 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
199 dma_addr_t handle
, struct dma_attrs
*attrs
);
200 static int arm_coherent_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
201 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
202 struct dma_attrs
*attrs
);
204 struct dma_map_ops arm_coherent_dma_ops
= {
205 .alloc
= arm_coherent_dma_alloc
,
206 .free
= arm_coherent_dma_free
,
207 .mmap
= arm_coherent_dma_mmap
,
208 .get_sgtable
= arm_dma_get_sgtable
,
209 .map_page
= arm_coherent_dma_map_page
,
210 .map_sg
= arm_dma_map_sg
,
212 EXPORT_SYMBOL(arm_coherent_dma_ops
);
214 static int __dma_supported(struct device
*dev
, u64 mask
, bool warn
)
216 unsigned long max_dma_pfn
;
219 * If the mask allows for more memory than we can address,
220 * and we actually have that much memory, then we must
221 * indicate that DMA to this device is not supported.
223 if (sizeof(mask
) != sizeof(dma_addr_t
) &&
224 mask
> (dma_addr_t
)~0 &&
225 dma_to_pfn(dev
, ~0) < max_pfn
- 1) {
227 dev_warn(dev
, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
229 dev_warn(dev
, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
234 max_dma_pfn
= min(max_pfn
, arm_dma_pfn_limit
);
237 * Translate the device's DMA mask to a PFN limit. This
238 * PFN number includes the page which we can DMA to.
240 if (dma_to_pfn(dev
, mask
) < max_dma_pfn
) {
242 dev_warn(dev
, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
244 dma_to_pfn(dev
, 0), dma_to_pfn(dev
, mask
) + 1,
252 static u64
get_coherent_dma_mask(struct device
*dev
)
254 u64 mask
= (u64
)DMA_BIT_MASK(32);
257 mask
= dev
->coherent_dma_mask
;
260 * Sanity check the DMA mask - it must be non-zero, and
261 * must be able to be satisfied by a DMA allocation.
264 dev_warn(dev
, "coherent DMA mask is unset\n");
268 if (!__dma_supported(dev
, mask
, true))
275 static void __dma_clear_buffer(struct page
*page
, size_t size
)
278 * Ensure that the allocated pages are zeroed, and that any data
279 * lurking in the kernel direct-mapped region is invalidated.
281 if (PageHighMem(page
)) {
282 phys_addr_t base
= __pfn_to_phys(page_to_pfn(page
));
283 phys_addr_t end
= base
+ size
;
285 void *ptr
= kmap_atomic(page
);
286 memset(ptr
, 0, PAGE_SIZE
);
287 dmac_flush_range(ptr
, ptr
+ PAGE_SIZE
);
292 outer_flush_range(base
, end
);
294 void *ptr
= page_address(page
);
295 memset(ptr
, 0, size
);
296 dmac_flush_range(ptr
, ptr
+ size
);
297 outer_flush_range(__pa(ptr
), __pa(ptr
) + size
);
302 * Allocate a DMA buffer for 'dev' of size 'size' using the
303 * specified gfp mask. Note that 'size' must be page aligned.
305 static struct page
*__dma_alloc_buffer(struct device
*dev
, size_t size
, gfp_t gfp
)
307 unsigned long order
= get_order(size
);
308 struct page
*page
, *p
, *e
;
310 page
= alloc_pages(gfp
, order
);
315 * Now split the huge page and free the excess pages
317 split_page(page
, order
);
318 for (p
= page
+ (size
>> PAGE_SHIFT
), e
= page
+ (1 << order
); p
< e
; p
++)
321 __dma_clear_buffer(page
, size
);
327 * Free a DMA buffer. 'size' must be page aligned.
329 static void __dma_free_buffer(struct page
*page
, size_t size
)
331 struct page
*e
= page
+ (size
>> PAGE_SHIFT
);
341 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
342 pgprot_t prot
, struct page
**ret_page
,
343 const void *caller
, bool want_vaddr
);
345 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
346 pgprot_t prot
, struct page
**ret_page
,
347 const void *caller
, bool want_vaddr
);
350 __dma_alloc_remap(struct page
*page
, size_t size
, gfp_t gfp
, pgprot_t prot
,
354 * DMA allocation can be mapped to user space, so lets
355 * set VM_USERMAP flags too.
357 return dma_common_contiguous_remap(page
, size
,
358 VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
362 static void __dma_free_remap(void *cpu_addr
, size_t size
)
364 dma_common_free_remap(cpu_addr
, size
,
365 VM_ARM_DMA_CONSISTENT
| VM_USERMAP
);
368 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
369 static struct gen_pool
*atomic_pool
;
371 static size_t atomic_pool_size
= DEFAULT_DMA_COHERENT_POOL_SIZE
;
373 static int __init
early_coherent_pool(char *p
)
375 atomic_pool_size
= memparse(p
, &p
);
378 early_param("coherent_pool", early_coherent_pool
);
380 void __init
init_dma_coherent_pool_size(unsigned long size
)
383 * Catch any attempt to set the pool size too late.
388 * Set architecture specific coherent pool size only if
389 * it has not been changed by kernel command line parameter.
391 if (atomic_pool_size
== DEFAULT_DMA_COHERENT_POOL_SIZE
)
392 atomic_pool_size
= size
;
396 * Initialise the coherent pool for atomic allocations.
398 static int __init
atomic_pool_init(void)
400 pgprot_t prot
= pgprot_dmacoherent(PAGE_KERNEL
);
401 gfp_t gfp
= GFP_KERNEL
| GFP_DMA
;
405 atomic_pool
= gen_pool_create(PAGE_SHIFT
, -1);
409 if (dev_get_cma_area(NULL
))
410 ptr
= __alloc_from_contiguous(NULL
, atomic_pool_size
, prot
,
411 &page
, atomic_pool_init
, true);
413 ptr
= __alloc_remap_buffer(NULL
, atomic_pool_size
, gfp
, prot
,
414 &page
, atomic_pool_init
, true);
418 ret
= gen_pool_add_virt(atomic_pool
, (unsigned long)ptr
,
420 atomic_pool_size
, -1);
422 goto destroy_genpool
;
424 gen_pool_set_algo(atomic_pool
,
425 gen_pool_first_fit_order_align
,
427 pr_info("DMA: preallocated %zd KiB pool for atomic coherent allocations\n",
428 atomic_pool_size
/ 1024);
433 gen_pool_destroy(atomic_pool
);
436 pr_err("DMA: failed to allocate %zx KiB pool for atomic coherent allocation\n",
437 atomic_pool_size
/ 1024);
441 * CMA is activated by core_initcall, so we must be called after it.
443 postcore_initcall(atomic_pool_init
);
445 struct dma_contig_early_reserve
{
450 static struct dma_contig_early_reserve dma_mmu_remap
[MAX_CMA_AREAS
] __initdata
;
452 static int dma_mmu_remap_num __initdata
;
454 void __init
dma_contiguous_early_fixup(phys_addr_t base
, unsigned long size
)
456 dma_mmu_remap
[dma_mmu_remap_num
].base
= base
;
457 dma_mmu_remap
[dma_mmu_remap_num
].size
= size
;
461 void __init
dma_contiguous_remap(void)
464 for (i
= 0; i
< dma_mmu_remap_num
; i
++) {
465 phys_addr_t start
= dma_mmu_remap
[i
].base
;
466 phys_addr_t end
= start
+ dma_mmu_remap
[i
].size
;
470 if (end
> arm_lowmem_limit
)
471 end
= arm_lowmem_limit
;
475 map
.pfn
= __phys_to_pfn(start
);
476 map
.virtual = __phys_to_virt(start
);
477 map
.length
= end
- start
;
478 map
.type
= MT_MEMORY_DMA_READY
;
481 * Clear previous low-memory mapping to ensure that the
482 * TLB does not see any conflicting entries, then flush
483 * the TLB of the old entries before creating new mappings.
485 * This ensures that any speculatively loaded TLB entries
486 * (even though they may be rare) can not cause any problems,
487 * and ensures that this code is architecturally compliant.
489 for (addr
= __phys_to_virt(start
); addr
< __phys_to_virt(end
);
491 pmd_clear(pmd_off_k(addr
));
493 flush_tlb_kernel_range(__phys_to_virt(start
),
494 __phys_to_virt(end
));
496 iotable_init(&map
, 1);
500 static int __dma_update_pte(pte_t
*pte
, pgtable_t token
, unsigned long addr
,
503 struct page
*page
= virt_to_page(addr
);
504 pgprot_t prot
= *(pgprot_t
*)data
;
506 set_pte_ext(pte
, mk_pte(page
, prot
), 0);
510 static void __dma_remap(struct page
*page
, size_t size
, pgprot_t prot
)
512 unsigned long start
= (unsigned long) page_address(page
);
513 unsigned end
= start
+ size
;
515 apply_to_page_range(&init_mm
, start
, size
, __dma_update_pte
, &prot
);
516 flush_tlb_kernel_range(start
, end
);
519 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
520 pgprot_t prot
, struct page
**ret_page
,
521 const void *caller
, bool want_vaddr
)
525 page
= __dma_alloc_buffer(dev
, size
, gfp
);
531 ptr
= __dma_alloc_remap(page
, size
, gfp
, prot
, caller
);
533 __dma_free_buffer(page
, size
);
542 static void *__alloc_from_pool(size_t size
, struct page
**ret_page
)
548 WARN(1, "coherent pool not initialised!\n");
552 val
= gen_pool_alloc(atomic_pool
, size
);
554 phys_addr_t phys
= gen_pool_virt_to_phys(atomic_pool
, val
);
556 *ret_page
= phys_to_page(phys
);
563 static bool __in_atomic_pool(void *start
, size_t size
)
565 return addr_in_gen_pool(atomic_pool
, (unsigned long)start
, size
);
568 static int __free_from_pool(void *start
, size_t size
)
570 if (!__in_atomic_pool(start
, size
))
573 gen_pool_free(atomic_pool
, (unsigned long)start
, size
);
578 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
579 pgprot_t prot
, struct page
**ret_page
,
580 const void *caller
, bool want_vaddr
)
582 unsigned long order
= get_order(size
);
583 size_t count
= size
>> PAGE_SHIFT
;
587 page
= dma_alloc_from_contiguous(dev
, count
, order
);
591 __dma_clear_buffer(page
, size
);
596 if (PageHighMem(page
)) {
597 ptr
= __dma_alloc_remap(page
, size
, GFP_KERNEL
, prot
, caller
);
599 dma_release_from_contiguous(dev
, page
, count
);
603 __dma_remap(page
, size
, prot
);
604 ptr
= page_address(page
);
612 static void __free_from_contiguous(struct device
*dev
, struct page
*page
,
613 void *cpu_addr
, size_t size
, bool want_vaddr
)
616 if (PageHighMem(page
))
617 __dma_free_remap(cpu_addr
, size
);
619 __dma_remap(page
, size
, PAGE_KERNEL
);
621 dma_release_from_contiguous(dev
, page
, size
>> PAGE_SHIFT
);
624 static inline pgprot_t
__get_dma_pgprot(struct dma_attrs
*attrs
, pgprot_t prot
)
626 prot
= dma_get_attr(DMA_ATTR_WRITE_COMBINE
, attrs
) ?
627 pgprot_writecombine(prot
) :
628 pgprot_dmacoherent(prot
);
634 #else /* !CONFIG_MMU */
638 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
639 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv) NULL
640 #define __alloc_from_pool(size, ret_page) NULL
641 #define __alloc_from_contiguous(dev, size, prot, ret, c, wv) NULL
642 #define __free_from_pool(cpu_addr, size) do { } while (0)
643 #define __free_from_contiguous(dev, page, cpu_addr, size, wv) do { } while (0)
644 #define __dma_free_remap(cpu_addr, size) do { } while (0)
646 #endif /* CONFIG_MMU */
648 static void *__alloc_simple_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
649 struct page
**ret_page
)
652 page
= __dma_alloc_buffer(dev
, size
, gfp
);
657 return page_address(page
);
660 static void *simple_allocator_alloc(struct arm_dma_alloc_args
*args
,
661 struct page
**ret_page
)
663 return __alloc_simple_buffer(args
->dev
, args
->size
, args
->gfp
,
667 static void simple_allocator_free(struct arm_dma_free_args
*args
)
669 __dma_free_buffer(args
->page
, args
->size
);
672 static struct arm_dma_allocator simple_allocator
= {
673 .alloc
= simple_allocator_alloc
,
674 .free
= simple_allocator_free
,
677 static void *cma_allocator_alloc(struct arm_dma_alloc_args
*args
,
678 struct page
**ret_page
)
680 return __alloc_from_contiguous(args
->dev
, args
->size
, args
->prot
,
681 ret_page
, args
->caller
,
685 static void cma_allocator_free(struct arm_dma_free_args
*args
)
687 __free_from_contiguous(args
->dev
, args
->page
, args
->cpu_addr
,
688 args
->size
, args
->want_vaddr
);
691 static struct arm_dma_allocator cma_allocator
= {
692 .alloc
= cma_allocator_alloc
,
693 .free
= cma_allocator_free
,
696 static void *pool_allocator_alloc(struct arm_dma_alloc_args
*args
,
697 struct page
**ret_page
)
699 return __alloc_from_pool(args
->size
, ret_page
);
702 static void pool_allocator_free(struct arm_dma_free_args
*args
)
704 __free_from_pool(args
->cpu_addr
, args
->size
);
707 static struct arm_dma_allocator pool_allocator
= {
708 .alloc
= pool_allocator_alloc
,
709 .free
= pool_allocator_free
,
712 static void *remap_allocator_alloc(struct arm_dma_alloc_args
*args
,
713 struct page
**ret_page
)
715 return __alloc_remap_buffer(args
->dev
, args
->size
, args
->gfp
,
716 args
->prot
, ret_page
, args
->caller
,
720 static void remap_allocator_free(struct arm_dma_free_args
*args
)
722 if (args
->want_vaddr
)
723 __dma_free_remap(args
->cpu_addr
, args
->size
);
725 __dma_free_buffer(args
->page
, args
->size
);
728 static struct arm_dma_allocator remap_allocator
= {
729 .alloc
= remap_allocator_alloc
,
730 .free
= remap_allocator_free
,
733 static void *__dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
734 gfp_t gfp
, pgprot_t prot
, bool is_coherent
,
735 struct dma_attrs
*attrs
, const void *caller
)
737 u64 mask
= get_coherent_dma_mask(dev
);
738 struct page
*page
= NULL
;
740 bool allowblock
, cma
;
741 struct arm_dma_buffer
*buf
;
742 struct arm_dma_alloc_args args
= {
744 .size
= PAGE_ALIGN(size
),
748 .want_vaddr
= !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
),
751 #ifdef CONFIG_DMA_API_DEBUG
752 u64 limit
= (mask
+ 1) & ~mask
;
753 if (limit
&& size
>= limit
) {
754 dev_warn(dev
, "coherent allocation too big (requested %#x mask %#llx)\n",
763 buf
= kzalloc(sizeof(*buf
),
764 gfp
& ~(__GFP_DMA
| __GFP_DMA32
| __GFP_HIGHMEM
));
768 if (mask
< 0xffffffffULL
)
772 * Following is a work-around (a.k.a. hack) to prevent pages
773 * with __GFP_COMP being passed to split_page() which cannot
774 * handle them. The real problem is that this flag probably
775 * should be 0 on ARM as it is not supported on this
776 * platform; see CONFIG_HUGETLBFS.
778 gfp
&= ~(__GFP_COMP
);
781 *handle
= DMA_ERROR_CODE
;
782 allowblock
= gfpflags_allow_blocking(gfp
);
783 cma
= allowblock
? dev_get_cma_area(dev
) : false;
786 buf
->allocator
= &cma_allocator
;
787 else if (nommu() || is_coherent
)
788 buf
->allocator
= &simple_allocator
;
790 buf
->allocator
= &remap_allocator
;
792 buf
->allocator
= &pool_allocator
;
794 addr
= buf
->allocator
->alloc(&args
, &page
);
799 *handle
= pfn_to_dma(dev
, page_to_pfn(page
));
800 buf
->virt
= args
.want_vaddr
? addr
: page
;
802 spin_lock_irqsave(&arm_dma_bufs_lock
, flags
);
803 list_add(&buf
->list
, &arm_dma_bufs
);
804 spin_unlock_irqrestore(&arm_dma_bufs_lock
, flags
);
809 return args
.want_vaddr
? addr
: page
;
813 * Allocate DMA-coherent memory space and return both the kernel remapped
814 * virtual and bus address for that space.
816 void *arm_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
817 gfp_t gfp
, struct dma_attrs
*attrs
)
819 pgprot_t prot
= __get_dma_pgprot(attrs
, PAGE_KERNEL
);
821 return __dma_alloc(dev
, size
, handle
, gfp
, prot
, false,
822 attrs
, __builtin_return_address(0));
825 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
826 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
828 return __dma_alloc(dev
, size
, handle
, gfp
, PAGE_KERNEL
, true,
829 attrs
, __builtin_return_address(0));
832 static int __arm_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
833 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
834 struct dma_attrs
*attrs
)
838 unsigned long nr_vma_pages
= (vma
->vm_end
- vma
->vm_start
) >> PAGE_SHIFT
;
839 unsigned long nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
840 unsigned long pfn
= dma_to_pfn(dev
, dma_addr
);
841 unsigned long off
= vma
->vm_pgoff
;
843 if (dma_mmap_from_coherent(dev
, vma
, cpu_addr
, size
, &ret
))
846 if (off
< nr_pages
&& nr_vma_pages
<= (nr_pages
- off
)) {
847 ret
= remap_pfn_range(vma
, vma
->vm_start
,
849 vma
->vm_end
- vma
->vm_start
,
852 #endif /* CONFIG_MMU */
858 * Create userspace mapping for the DMA-coherent memory.
860 static int arm_coherent_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
861 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
862 struct dma_attrs
*attrs
)
864 return __arm_dma_mmap(dev
, vma
, cpu_addr
, dma_addr
, size
, attrs
);
867 int arm_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
868 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
869 struct dma_attrs
*attrs
)
872 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
873 #endif /* CONFIG_MMU */
874 return __arm_dma_mmap(dev
, vma
, cpu_addr
, dma_addr
, size
, attrs
);
878 * Free a buffer as defined by the above mapping.
880 static void __arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
881 dma_addr_t handle
, struct dma_attrs
*attrs
,
884 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
885 struct arm_dma_buffer
*buf
;
886 struct arm_dma_free_args args
= {
888 .size
= PAGE_ALIGN(size
),
889 .cpu_addr
= cpu_addr
,
891 .want_vaddr
= !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
),
894 buf
= arm_dma_buffer_find(cpu_addr
);
895 if (WARN(!buf
, "Freeing invalid buffer %p\n", cpu_addr
))
898 buf
->allocator
->free(&args
);
902 void arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
903 dma_addr_t handle
, struct dma_attrs
*attrs
)
905 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, false);
908 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
909 dma_addr_t handle
, struct dma_attrs
*attrs
)
911 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, true);
914 int arm_dma_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
915 void *cpu_addr
, dma_addr_t handle
, size_t size
,
916 struct dma_attrs
*attrs
)
918 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
921 ret
= sg_alloc_table(sgt
, 1, GFP_KERNEL
);
925 sg_set_page(sgt
->sgl
, page
, PAGE_ALIGN(size
), 0);
929 static void dma_cache_maint_page(struct page
*page
, unsigned long offset
,
930 size_t size
, enum dma_data_direction dir
,
931 void (*op
)(const void *, size_t, int))
936 pfn
= page_to_pfn(page
) + offset
/ PAGE_SIZE
;
940 * A single sg entry may refer to multiple physically contiguous
941 * pages. But we still need to process highmem pages individually.
942 * If highmem is not configured then the bulk of this loop gets
949 page
= pfn_to_page(pfn
);
951 if (PageHighMem(page
)) {
952 if (len
+ offset
> PAGE_SIZE
)
953 len
= PAGE_SIZE
- offset
;
955 if (cache_is_vipt_nonaliasing()) {
956 vaddr
= kmap_atomic(page
);
957 op(vaddr
+ offset
, len
, dir
);
958 kunmap_atomic(vaddr
);
960 vaddr
= kmap_high_get(page
);
962 op(vaddr
+ offset
, len
, dir
);
967 vaddr
= page_address(page
) + offset
;
977 * Make an area consistent for devices.
978 * Note: Drivers should NOT use this function directly, as it will break
979 * platforms with CONFIG_DMABOUNCE.
980 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
982 static void __dma_page_cpu_to_dev(struct page
*page
, unsigned long off
,
983 size_t size
, enum dma_data_direction dir
)
987 dma_cache_maint_page(page
, off
, size
, dir
, dmac_map_area
);
989 paddr
= page_to_phys(page
) + off
;
990 if (dir
== DMA_FROM_DEVICE
) {
991 outer_inv_range(paddr
, paddr
+ size
);
993 outer_clean_range(paddr
, paddr
+ size
);
995 /* FIXME: non-speculating: flush on bidirectional mappings? */
998 static void __dma_page_dev_to_cpu(struct page
*page
, unsigned long off
,
999 size_t size
, enum dma_data_direction dir
)
1001 phys_addr_t paddr
= page_to_phys(page
) + off
;
1003 /* FIXME: non-speculating: not required */
1004 /* in any case, don't bother invalidating if DMA to device */
1005 if (dir
!= DMA_TO_DEVICE
) {
1006 outer_inv_range(paddr
, paddr
+ size
);
1008 dma_cache_maint_page(page
, off
, size
, dir
, dmac_unmap_area
);
1012 * Mark the D-cache clean for these pages to avoid extra flushing.
1014 if (dir
!= DMA_TO_DEVICE
&& size
>= PAGE_SIZE
) {
1018 pfn
= page_to_pfn(page
) + off
/ PAGE_SIZE
;
1022 left
-= PAGE_SIZE
- off
;
1024 while (left
>= PAGE_SIZE
) {
1025 page
= pfn_to_page(pfn
++);
1026 set_bit(PG_dcache_clean
, &page
->flags
);
1033 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1034 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1035 * @sg: list of buffers
1036 * @nents: number of buffers to map
1037 * @dir: DMA transfer direction
1039 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1040 * This is the scatter-gather version of the dma_map_single interface.
1041 * Here the scatter gather list elements are each tagged with the
1042 * appropriate dma address and length. They are obtained via
1043 * sg_dma_{address,length}.
1045 * Device ownership issues as mentioned for dma_map_single are the same
1048 int arm_dma_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1049 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1051 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1052 struct scatterlist
*s
;
1055 for_each_sg(sg
, s
, nents
, i
) {
1056 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1057 s
->dma_length
= s
->length
;
1059 s
->dma_address
= ops
->map_page(dev
, sg_page(s
), s
->offset
,
1060 s
->length
, dir
, attrs
);
1061 if (dma_mapping_error(dev
, s
->dma_address
))
1067 for_each_sg(sg
, s
, i
, j
)
1068 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
1073 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1074 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1075 * @sg: list of buffers
1076 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1077 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1079 * Unmap a set of streaming mode DMA translations. Again, CPU access
1080 * rules concerning calls here are the same as for dma_unmap_single().
1082 void arm_dma_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1083 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1085 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1086 struct scatterlist
*s
;
1090 for_each_sg(sg
, s
, nents
, i
)
1091 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
1095 * arm_dma_sync_sg_for_cpu
1096 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1097 * @sg: list of buffers
1098 * @nents: number of buffers to map (returned from dma_map_sg)
1099 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1101 void arm_dma_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1102 int nents
, enum dma_data_direction dir
)
1104 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1105 struct scatterlist
*s
;
1108 for_each_sg(sg
, s
, nents
, i
)
1109 ops
->sync_single_for_cpu(dev
, sg_dma_address(s
), s
->length
,
1114 * arm_dma_sync_sg_for_device
1115 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1116 * @sg: list of buffers
1117 * @nents: number of buffers to map (returned from dma_map_sg)
1118 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1120 void arm_dma_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1121 int nents
, enum dma_data_direction dir
)
1123 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1124 struct scatterlist
*s
;
1127 for_each_sg(sg
, s
, nents
, i
)
1128 ops
->sync_single_for_device(dev
, sg_dma_address(s
), s
->length
,
1133 * Return whether the given device DMA address mask can be supported
1134 * properly. For example, if your device can only drive the low 24-bits
1135 * during bus mastering, then you would pass 0x00ffffff as the mask
1138 int dma_supported(struct device
*dev
, u64 mask
)
1140 return __dma_supported(dev
, mask
, false);
1142 EXPORT_SYMBOL(dma_supported
);
1144 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1146 static int __init
dma_debug_do_init(void)
1148 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
1151 fs_initcall(dma_debug_do_init
);
1153 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1157 static int extend_iommu_mapping(struct dma_iommu_mapping
*mapping
);
1159 static inline dma_addr_t
__alloc_iova(struct dma_iommu_mapping
*mapping
,
1162 unsigned int order
= get_order(size
);
1163 unsigned int align
= 0;
1164 unsigned int count
, start
;
1165 size_t mapping_size
= mapping
->bits
<< PAGE_SHIFT
;
1166 unsigned long flags
;
1170 if (order
> CONFIG_ARM_DMA_IOMMU_ALIGNMENT
)
1171 order
= CONFIG_ARM_DMA_IOMMU_ALIGNMENT
;
1173 count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1174 align
= (1 << order
) - 1;
1176 spin_lock_irqsave(&mapping
->lock
, flags
);
1177 for (i
= 0; i
< mapping
->nr_bitmaps
; i
++) {
1178 start
= bitmap_find_next_zero_area(mapping
->bitmaps
[i
],
1179 mapping
->bits
, 0, count
, align
);
1181 if (start
> mapping
->bits
)
1184 bitmap_set(mapping
->bitmaps
[i
], start
, count
);
1189 * No unused range found. Try to extend the existing mapping
1190 * and perform a second attempt to reserve an IO virtual
1191 * address range of size bytes.
1193 if (i
== mapping
->nr_bitmaps
) {
1194 if (extend_iommu_mapping(mapping
)) {
1195 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1196 return DMA_ERROR_CODE
;
1199 start
= bitmap_find_next_zero_area(mapping
->bitmaps
[i
],
1200 mapping
->bits
, 0, count
, align
);
1202 if (start
> mapping
->bits
) {
1203 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1204 return DMA_ERROR_CODE
;
1207 bitmap_set(mapping
->bitmaps
[i
], start
, count
);
1209 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1211 iova
= mapping
->base
+ (mapping_size
* i
);
1212 iova
+= start
<< PAGE_SHIFT
;
1217 static inline void __free_iova(struct dma_iommu_mapping
*mapping
,
1218 dma_addr_t addr
, size_t size
)
1220 unsigned int start
, count
;
1221 size_t mapping_size
= mapping
->bits
<< PAGE_SHIFT
;
1222 unsigned long flags
;
1223 dma_addr_t bitmap_base
;
1229 bitmap_index
= (u32
) (addr
- mapping
->base
) / (u32
) mapping_size
;
1230 BUG_ON(addr
< mapping
->base
|| bitmap_index
> mapping
->extensions
);
1232 bitmap_base
= mapping
->base
+ mapping_size
* bitmap_index
;
1234 start
= (addr
- bitmap_base
) >> PAGE_SHIFT
;
1236 if (addr
+ size
> bitmap_base
+ mapping_size
) {
1238 * The address range to be freed reaches into the iova
1239 * range of the next bitmap. This should not happen as
1240 * we don't allow this in __alloc_iova (at the
1245 count
= size
>> PAGE_SHIFT
;
1247 spin_lock_irqsave(&mapping
->lock
, flags
);
1248 bitmap_clear(mapping
->bitmaps
[bitmap_index
], start
, count
);
1249 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1252 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1253 static const int iommu_order_array
[] = { 9, 8, 4, 0 };
1255 static struct page
**__iommu_alloc_buffer(struct device
*dev
, size_t size
,
1256 gfp_t gfp
, struct dma_attrs
*attrs
)
1258 struct page
**pages
;
1259 int count
= size
>> PAGE_SHIFT
;
1260 int array_size
= count
* sizeof(struct page
*);
1264 if (array_size
<= PAGE_SIZE
)
1265 pages
= kzalloc(array_size
, GFP_KERNEL
);
1267 pages
= vzalloc(array_size
);
1271 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
))
1273 unsigned long order
= get_order(size
);
1276 page
= dma_alloc_from_contiguous(dev
, count
, order
);
1280 __dma_clear_buffer(page
, size
);
1282 for (i
= 0; i
< count
; i
++)
1283 pages
[i
] = page
+ i
;
1288 /* Go straight to 4K chunks if caller says it's OK. */
1289 if (dma_get_attr(DMA_ATTR_ALLOC_SINGLE_PAGES
, attrs
))
1290 order_idx
= ARRAY_SIZE(iommu_order_array
) - 1;
1293 * IOMMU can map any pages, so himem can also be used here
1295 gfp
|= __GFP_NOWARN
| __GFP_HIGHMEM
;
1300 order
= iommu_order_array
[order_idx
];
1302 /* Drop down when we get small */
1303 if (__fls(count
) < order
) {
1309 /* See if it's easy to allocate a high-order chunk */
1310 pages
[i
] = alloc_pages(gfp
| __GFP_NORETRY
, order
);
1312 /* Go down a notch at first sign of pressure */
1318 pages
[i
] = alloc_pages(gfp
, 0);
1324 split_page(pages
[i
], order
);
1327 pages
[i
+ j
] = pages
[i
] + j
;
1330 __dma_clear_buffer(pages
[i
], PAGE_SIZE
<< order
);
1332 count
-= 1 << order
;
1339 __free_pages(pages
[i
], 0);
1344 static int __iommu_free_buffer(struct device
*dev
, struct page
**pages
,
1345 size_t size
, struct dma_attrs
*attrs
)
1347 int count
= size
>> PAGE_SHIFT
;
1350 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
)) {
1351 dma_release_from_contiguous(dev
, pages
[0], count
);
1353 for (i
= 0; i
< count
; i
++)
1355 __free_pages(pages
[i
], 0);
1363 * Create a CPU mapping for a specified pages
1366 __iommu_alloc_remap(struct page
**pages
, size_t size
, gfp_t gfp
, pgprot_t prot
,
1369 return dma_common_pages_remap(pages
, size
,
1370 VM_ARM_DMA_CONSISTENT
| VM_USERMAP
, prot
, caller
);
1374 * Create a mapping in device IO address space for specified pages
1377 __iommu_create_mapping(struct device
*dev
, struct page
**pages
, size_t size
)
1379 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1380 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1381 dma_addr_t dma_addr
, iova
;
1384 dma_addr
= __alloc_iova(mapping
, size
);
1385 if (dma_addr
== DMA_ERROR_CODE
)
1389 for (i
= 0; i
< count
; ) {
1392 unsigned int next_pfn
= page_to_pfn(pages
[i
]) + 1;
1393 phys_addr_t phys
= page_to_phys(pages
[i
]);
1394 unsigned int len
, j
;
1396 for (j
= i
+ 1; j
< count
; j
++, next_pfn
++)
1397 if (page_to_pfn(pages
[j
]) != next_pfn
)
1400 len
= (j
- i
) << PAGE_SHIFT
;
1401 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
,
1402 IOMMU_READ
|IOMMU_WRITE
);
1410 iommu_unmap(mapping
->domain
, dma_addr
, iova
-dma_addr
);
1411 __free_iova(mapping
, dma_addr
, size
);
1412 return DMA_ERROR_CODE
;
1415 static int __iommu_remove_mapping(struct device
*dev
, dma_addr_t iova
, size_t size
)
1417 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1420 * add optional in-page offset from iova to size and align
1421 * result to page size
1423 size
= PAGE_ALIGN((iova
& ~PAGE_MASK
) + size
);
1426 iommu_unmap(mapping
->domain
, iova
, size
);
1427 __free_iova(mapping
, iova
, size
);
1431 static struct page
**__atomic_get_pages(void *addr
)
1436 phys
= gen_pool_virt_to_phys(atomic_pool
, (unsigned long)addr
);
1437 page
= phys_to_page(phys
);
1439 return (struct page
**)page
;
1442 static struct page
**__iommu_get_pages(void *cpu_addr
, struct dma_attrs
*attrs
)
1444 struct vm_struct
*area
;
1446 if (__in_atomic_pool(cpu_addr
, PAGE_SIZE
))
1447 return __atomic_get_pages(cpu_addr
);
1449 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1452 area
= find_vm_area(cpu_addr
);
1453 if (area
&& (area
->flags
& VM_ARM_DMA_CONSISTENT
))
1458 static void *__iommu_alloc_atomic(struct device
*dev
, size_t size
,
1464 addr
= __alloc_from_pool(size
, &page
);
1468 *handle
= __iommu_create_mapping(dev
, &page
, size
);
1469 if (*handle
== DMA_ERROR_CODE
)
1475 __free_from_pool(addr
, size
);
1479 static void __iommu_free_atomic(struct device
*dev
, void *cpu_addr
,
1480 dma_addr_t handle
, size_t size
)
1482 __iommu_remove_mapping(dev
, handle
, size
);
1483 __free_from_pool(cpu_addr
, size
);
1486 static void *arm_iommu_alloc_attrs(struct device
*dev
, size_t size
,
1487 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
1489 pgprot_t prot
= __get_dma_pgprot(attrs
, PAGE_KERNEL
);
1490 struct page
**pages
;
1493 *handle
= DMA_ERROR_CODE
;
1494 size
= PAGE_ALIGN(size
);
1496 if (!gfpflags_allow_blocking(gfp
))
1497 return __iommu_alloc_atomic(dev
, size
, handle
);
1500 * Following is a work-around (a.k.a. hack) to prevent pages
1501 * with __GFP_COMP being passed to split_page() which cannot
1502 * handle them. The real problem is that this flag probably
1503 * should be 0 on ARM as it is not supported on this
1504 * platform; see CONFIG_HUGETLBFS.
1506 gfp
&= ~(__GFP_COMP
);
1508 pages
= __iommu_alloc_buffer(dev
, size
, gfp
, attrs
);
1512 *handle
= __iommu_create_mapping(dev
, pages
, size
);
1513 if (*handle
== DMA_ERROR_CODE
)
1516 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1519 addr
= __iommu_alloc_remap(pages
, size
, gfp
, prot
,
1520 __builtin_return_address(0));
1527 __iommu_remove_mapping(dev
, *handle
, size
);
1529 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1533 static int arm_iommu_mmap_attrs(struct device
*dev
, struct vm_area_struct
*vma
,
1534 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
1535 struct dma_attrs
*attrs
)
1537 unsigned long uaddr
= vma
->vm_start
;
1538 unsigned long usize
= vma
->vm_end
- vma
->vm_start
;
1539 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1540 unsigned long nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1541 unsigned long off
= vma
->vm_pgoff
;
1543 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
1548 if (off
>= nr_pages
|| (usize
>> PAGE_SHIFT
) > nr_pages
- off
)
1554 int ret
= vm_insert_page(vma
, uaddr
, *pages
++);
1556 pr_err("Remapping memory failed: %d\n", ret
);
1561 } while (usize
> 0);
1567 * free a page as defined by the above mapping.
1568 * Must not be called with IRQs disabled.
1570 void arm_iommu_free_attrs(struct device
*dev
, size_t size
, void *cpu_addr
,
1571 dma_addr_t handle
, struct dma_attrs
*attrs
)
1573 struct page
**pages
;
1574 size
= PAGE_ALIGN(size
);
1576 if (__in_atomic_pool(cpu_addr
, size
)) {
1577 __iommu_free_atomic(dev
, cpu_addr
, handle
, size
);
1581 pages
= __iommu_get_pages(cpu_addr
, attrs
);
1583 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
1587 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
)) {
1588 dma_common_free_remap(cpu_addr
, size
,
1589 VM_ARM_DMA_CONSISTENT
| VM_USERMAP
);
1592 __iommu_remove_mapping(dev
, handle
, size
);
1593 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1596 static int arm_iommu_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
1597 void *cpu_addr
, dma_addr_t dma_addr
,
1598 size_t size
, struct dma_attrs
*attrs
)
1600 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1601 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1606 return sg_alloc_table_from_pages(sgt
, pages
, count
, 0, size
,
1610 static int __dma_direction_to_prot(enum dma_data_direction dir
)
1615 case DMA_BIDIRECTIONAL
:
1616 prot
= IOMMU_READ
| IOMMU_WRITE
;
1621 case DMA_FROM_DEVICE
:
1632 * Map a part of the scatter-gather list into contiguous io address space
1634 static int __map_sg_chunk(struct device
*dev
, struct scatterlist
*sg
,
1635 size_t size
, dma_addr_t
*handle
,
1636 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1639 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1640 dma_addr_t iova
, iova_base
;
1643 struct scatterlist
*s
;
1646 size
= PAGE_ALIGN(size
);
1647 *handle
= DMA_ERROR_CODE
;
1649 iova_base
= iova
= __alloc_iova(mapping
, size
);
1650 if (iova
== DMA_ERROR_CODE
)
1653 for (count
= 0, s
= sg
; count
< (size
>> PAGE_SHIFT
); s
= sg_next(s
)) {
1654 phys_addr_t phys
= page_to_phys(sg_page(s
));
1655 unsigned int len
= PAGE_ALIGN(s
->offset
+ s
->length
);
1658 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1659 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1661 prot
= __dma_direction_to_prot(dir
);
1663 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, prot
);
1666 count
+= len
>> PAGE_SHIFT
;
1669 *handle
= iova_base
;
1673 iommu_unmap(mapping
->domain
, iova_base
, count
* PAGE_SIZE
);
1674 __free_iova(mapping
, iova_base
, size
);
1678 static int __iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1679 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1682 struct scatterlist
*s
= sg
, *dma
= sg
, *start
= sg
;
1684 unsigned int offset
= s
->offset
;
1685 unsigned int size
= s
->offset
+ s
->length
;
1686 unsigned int max
= dma_get_max_seg_size(dev
);
1688 for (i
= 1; i
< nents
; i
++) {
1691 s
->dma_address
= DMA_ERROR_CODE
;
1694 if (s
->offset
|| (size
& ~PAGE_MASK
) || size
+ s
->length
> max
) {
1695 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
,
1696 dir
, attrs
, is_coherent
) < 0)
1699 dma
->dma_address
+= offset
;
1700 dma
->dma_length
= size
- offset
;
1702 size
= offset
= s
->offset
;
1709 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
, dir
, attrs
,
1713 dma
->dma_address
+= offset
;
1714 dma
->dma_length
= size
- offset
;
1719 for_each_sg(sg
, s
, count
, i
)
1720 __iommu_remove_mapping(dev
, sg_dma_address(s
), sg_dma_len(s
));
1725 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1726 * @dev: valid struct device pointer
1727 * @sg: list of buffers
1728 * @nents: number of buffers to map
1729 * @dir: DMA transfer direction
1731 * Map a set of i/o coherent buffers described by scatterlist in streaming
1732 * mode for DMA. The scatter gather list elements are merged together (if
1733 * possible) and tagged with the appropriate dma address and length. They are
1734 * obtained via sg_dma_{address,length}.
1736 int arm_coherent_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1737 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1739 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, true);
1743 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1744 * @dev: valid struct device pointer
1745 * @sg: list of buffers
1746 * @nents: number of buffers to map
1747 * @dir: DMA transfer direction
1749 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1750 * The scatter gather list elements are merged together (if possible) and
1751 * tagged with the appropriate dma address and length. They are obtained via
1752 * sg_dma_{address,length}.
1754 int arm_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1755 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1757 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, false);
1760 static void __iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1761 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1764 struct scatterlist
*s
;
1767 for_each_sg(sg
, s
, nents
, i
) {
1769 __iommu_remove_mapping(dev
, sg_dma_address(s
),
1772 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1773 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
,
1779 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1780 * @dev: valid struct device pointer
1781 * @sg: list of buffers
1782 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1783 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1785 * Unmap a set of streaming mode DMA translations. Again, CPU access
1786 * rules concerning calls here are the same as for dma_unmap_single().
1788 void arm_coherent_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1789 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1791 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, true);
1795 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1796 * @dev: valid struct device pointer
1797 * @sg: list of buffers
1798 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1799 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1801 * Unmap a set of streaming mode DMA translations. Again, CPU access
1802 * rules concerning calls here are the same as for dma_unmap_single().
1804 void arm_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1805 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1807 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, false);
1811 * arm_iommu_sync_sg_for_cpu
1812 * @dev: valid struct device pointer
1813 * @sg: list of buffers
1814 * @nents: number of buffers to map (returned from dma_map_sg)
1815 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1817 void arm_iommu_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1818 int nents
, enum dma_data_direction dir
)
1820 struct scatterlist
*s
;
1823 for_each_sg(sg
, s
, nents
, i
)
1824 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
, s
->length
, dir
);
1829 * arm_iommu_sync_sg_for_device
1830 * @dev: valid struct device pointer
1831 * @sg: list of buffers
1832 * @nents: number of buffers to map (returned from dma_map_sg)
1833 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1835 void arm_iommu_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1836 int nents
, enum dma_data_direction dir
)
1838 struct scatterlist
*s
;
1841 for_each_sg(sg
, s
, nents
, i
)
1842 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1847 * arm_coherent_iommu_map_page
1848 * @dev: valid struct device pointer
1849 * @page: page that buffer resides in
1850 * @offset: offset into page for start of buffer
1851 * @size: size of buffer to map
1852 * @dir: DMA transfer direction
1854 * Coherent IOMMU aware version of arm_dma_map_page()
1856 static dma_addr_t
arm_coherent_iommu_map_page(struct device
*dev
, struct page
*page
,
1857 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1858 struct dma_attrs
*attrs
)
1860 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1861 dma_addr_t dma_addr
;
1862 int ret
, prot
, len
= PAGE_ALIGN(size
+ offset
);
1864 dma_addr
= __alloc_iova(mapping
, len
);
1865 if (dma_addr
== DMA_ERROR_CODE
)
1868 prot
= __dma_direction_to_prot(dir
);
1870 ret
= iommu_map(mapping
->domain
, dma_addr
, page_to_phys(page
), len
, prot
);
1874 return dma_addr
+ offset
;
1876 __free_iova(mapping
, dma_addr
, len
);
1877 return DMA_ERROR_CODE
;
1881 * arm_iommu_map_page
1882 * @dev: valid struct device pointer
1883 * @page: page that buffer resides in
1884 * @offset: offset into page for start of buffer
1885 * @size: size of buffer to map
1886 * @dir: DMA transfer direction
1888 * IOMMU aware version of arm_dma_map_page()
1890 static dma_addr_t
arm_iommu_map_page(struct device
*dev
, struct page
*page
,
1891 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1892 struct dma_attrs
*attrs
)
1894 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1895 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1897 return arm_coherent_iommu_map_page(dev
, page
, offset
, size
, dir
, attrs
);
1901 * arm_coherent_iommu_unmap_page
1902 * @dev: valid struct device pointer
1903 * @handle: DMA address of buffer
1904 * @size: size of buffer (same as passed to dma_map_page)
1905 * @dir: DMA transfer direction (same as passed to dma_map_page)
1907 * Coherent IOMMU aware version of arm_dma_unmap_page()
1909 static void arm_coherent_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1910 size_t size
, enum dma_data_direction dir
,
1911 struct dma_attrs
*attrs
)
1913 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1914 dma_addr_t iova
= handle
& PAGE_MASK
;
1915 int offset
= handle
& ~PAGE_MASK
;
1916 int len
= PAGE_ALIGN(size
+ offset
);
1921 iommu_unmap(mapping
->domain
, iova
, len
);
1922 __free_iova(mapping
, iova
, len
);
1926 * arm_iommu_unmap_page
1927 * @dev: valid struct device pointer
1928 * @handle: DMA address of buffer
1929 * @size: size of buffer (same as passed to dma_map_page)
1930 * @dir: DMA transfer direction (same as passed to dma_map_page)
1932 * IOMMU aware version of arm_dma_unmap_page()
1934 static void arm_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1935 size_t size
, enum dma_data_direction dir
,
1936 struct dma_attrs
*attrs
)
1938 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1939 dma_addr_t iova
= handle
& PAGE_MASK
;
1940 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1941 int offset
= handle
& ~PAGE_MASK
;
1942 int len
= PAGE_ALIGN(size
+ offset
);
1947 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1948 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1950 iommu_unmap(mapping
->domain
, iova
, len
);
1951 __free_iova(mapping
, iova
, len
);
1954 static void arm_iommu_sync_single_for_cpu(struct device
*dev
,
1955 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1957 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1958 dma_addr_t iova
= handle
& PAGE_MASK
;
1959 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1960 unsigned int offset
= handle
& ~PAGE_MASK
;
1965 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1968 static void arm_iommu_sync_single_for_device(struct device
*dev
,
1969 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1971 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
1972 dma_addr_t iova
= handle
& PAGE_MASK
;
1973 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1974 unsigned int offset
= handle
& ~PAGE_MASK
;
1979 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1982 struct dma_map_ops iommu_ops
= {
1983 .alloc
= arm_iommu_alloc_attrs
,
1984 .free
= arm_iommu_free_attrs
,
1985 .mmap
= arm_iommu_mmap_attrs
,
1986 .get_sgtable
= arm_iommu_get_sgtable
,
1988 .map_page
= arm_iommu_map_page
,
1989 .unmap_page
= arm_iommu_unmap_page
,
1990 .sync_single_for_cpu
= arm_iommu_sync_single_for_cpu
,
1991 .sync_single_for_device
= arm_iommu_sync_single_for_device
,
1993 .map_sg
= arm_iommu_map_sg
,
1994 .unmap_sg
= arm_iommu_unmap_sg
,
1995 .sync_sg_for_cpu
= arm_iommu_sync_sg_for_cpu
,
1996 .sync_sg_for_device
= arm_iommu_sync_sg_for_device
,
1999 struct dma_map_ops iommu_coherent_ops
= {
2000 .alloc
= arm_iommu_alloc_attrs
,
2001 .free
= arm_iommu_free_attrs
,
2002 .mmap
= arm_iommu_mmap_attrs
,
2003 .get_sgtable
= arm_iommu_get_sgtable
,
2005 .map_page
= arm_coherent_iommu_map_page
,
2006 .unmap_page
= arm_coherent_iommu_unmap_page
,
2008 .map_sg
= arm_coherent_iommu_map_sg
,
2009 .unmap_sg
= arm_coherent_iommu_unmap_sg
,
2013 * arm_iommu_create_mapping
2014 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2015 * @base: start address of the valid IO address space
2016 * @size: maximum size of the valid IO address space
2018 * Creates a mapping structure which holds information about used/unused
2019 * IO address ranges, which is required to perform memory allocation and
2020 * mapping with IOMMU aware functions.
2022 * The client device need to be attached to the mapping with
2023 * arm_iommu_attach_device function.
2025 struct dma_iommu_mapping
*
2026 arm_iommu_create_mapping(struct bus_type
*bus
, dma_addr_t base
, u64 size
)
2028 unsigned int bits
= size
>> PAGE_SHIFT
;
2029 unsigned int bitmap_size
= BITS_TO_LONGS(bits
) * sizeof(long);
2030 struct dma_iommu_mapping
*mapping
;
2034 /* currently only 32-bit DMA address space is supported */
2035 if (size
> DMA_BIT_MASK(32) + 1)
2036 return ERR_PTR(-ERANGE
);
2039 return ERR_PTR(-EINVAL
);
2041 if (bitmap_size
> PAGE_SIZE
) {
2042 extensions
= bitmap_size
/ PAGE_SIZE
;
2043 bitmap_size
= PAGE_SIZE
;
2046 mapping
= kzalloc(sizeof(struct dma_iommu_mapping
), GFP_KERNEL
);
2050 mapping
->bitmap_size
= bitmap_size
;
2051 mapping
->bitmaps
= kzalloc(extensions
* sizeof(unsigned long *),
2053 if (!mapping
->bitmaps
)
2056 mapping
->bitmaps
[0] = kzalloc(bitmap_size
, GFP_KERNEL
);
2057 if (!mapping
->bitmaps
[0])
2060 mapping
->nr_bitmaps
= 1;
2061 mapping
->extensions
= extensions
;
2062 mapping
->base
= base
;
2063 mapping
->bits
= BITS_PER_BYTE
* bitmap_size
;
2065 spin_lock_init(&mapping
->lock
);
2067 mapping
->domain
= iommu_domain_alloc(bus
);
2068 if (!mapping
->domain
)
2071 kref_init(&mapping
->kref
);
2074 kfree(mapping
->bitmaps
[0]);
2076 kfree(mapping
->bitmaps
);
2080 return ERR_PTR(err
);
2082 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping
);
2084 static void release_iommu_mapping(struct kref
*kref
)
2087 struct dma_iommu_mapping
*mapping
=
2088 container_of(kref
, struct dma_iommu_mapping
, kref
);
2090 iommu_domain_free(mapping
->domain
);
2091 for (i
= 0; i
< mapping
->nr_bitmaps
; i
++)
2092 kfree(mapping
->bitmaps
[i
]);
2093 kfree(mapping
->bitmaps
);
2097 static int extend_iommu_mapping(struct dma_iommu_mapping
*mapping
)
2101 if (mapping
->nr_bitmaps
>= mapping
->extensions
)
2104 next_bitmap
= mapping
->nr_bitmaps
;
2105 mapping
->bitmaps
[next_bitmap
] = kzalloc(mapping
->bitmap_size
,
2107 if (!mapping
->bitmaps
[next_bitmap
])
2110 mapping
->nr_bitmaps
++;
2115 void arm_iommu_release_mapping(struct dma_iommu_mapping
*mapping
)
2118 kref_put(&mapping
->kref
, release_iommu_mapping
);
2120 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping
);
2122 static int __arm_iommu_attach_device(struct device
*dev
,
2123 struct dma_iommu_mapping
*mapping
)
2127 err
= iommu_attach_device(mapping
->domain
, dev
);
2131 kref_get(&mapping
->kref
);
2132 to_dma_iommu_mapping(dev
) = mapping
;
2134 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev
));
2139 * arm_iommu_attach_device
2140 * @dev: valid struct device pointer
2141 * @mapping: io address space mapping structure (returned from
2142 * arm_iommu_create_mapping)
2144 * Attaches specified io address space mapping to the provided device.
2145 * This replaces the dma operations (dma_map_ops pointer) with the
2146 * IOMMU aware version.
2148 * More than one client might be attached to the same io address space
2151 int arm_iommu_attach_device(struct device
*dev
,
2152 struct dma_iommu_mapping
*mapping
)
2156 err
= __arm_iommu_attach_device(dev
, mapping
);
2160 set_dma_ops(dev
, &iommu_ops
);
2163 EXPORT_SYMBOL_GPL(arm_iommu_attach_device
);
2165 static void __arm_iommu_detach_device(struct device
*dev
)
2167 struct dma_iommu_mapping
*mapping
;
2169 mapping
= to_dma_iommu_mapping(dev
);
2171 dev_warn(dev
, "Not attached\n");
2175 iommu_detach_device(mapping
->domain
, dev
);
2176 kref_put(&mapping
->kref
, release_iommu_mapping
);
2177 to_dma_iommu_mapping(dev
) = NULL
;
2179 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev
));
2183 * arm_iommu_detach_device
2184 * @dev: valid struct device pointer
2186 * Detaches the provided device from a previously attached map.
2187 * This voids the dma operations (dma_map_ops pointer)
2189 void arm_iommu_detach_device(struct device
*dev
)
2191 __arm_iommu_detach_device(dev
);
2192 set_dma_ops(dev
, NULL
);
2194 EXPORT_SYMBOL_GPL(arm_iommu_detach_device
);
2196 static struct dma_map_ops
*arm_get_iommu_dma_map_ops(bool coherent
)
2198 return coherent
? &iommu_coherent_ops
: &iommu_ops
;
2201 static bool arm_setup_iommu_dma_ops(struct device
*dev
, u64 dma_base
, u64 size
,
2202 const struct iommu_ops
*iommu
)
2204 struct dma_iommu_mapping
*mapping
;
2209 mapping
= arm_iommu_create_mapping(dev
->bus
, dma_base
, size
);
2210 if (IS_ERR(mapping
)) {
2211 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2212 size
, dev_name(dev
));
2216 if (__arm_iommu_attach_device(dev
, mapping
)) {
2217 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2219 arm_iommu_release_mapping(mapping
);
2226 static void arm_teardown_iommu_dma_ops(struct device
*dev
)
2228 struct dma_iommu_mapping
*mapping
= to_dma_iommu_mapping(dev
);
2233 __arm_iommu_detach_device(dev
);
2234 arm_iommu_release_mapping(mapping
);
2239 static bool arm_setup_iommu_dma_ops(struct device
*dev
, u64 dma_base
, u64 size
,
2240 const struct iommu_ops
*iommu
)
2245 static void arm_teardown_iommu_dma_ops(struct device
*dev
) { }
2247 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2249 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2251 static struct dma_map_ops
*arm_get_dma_map_ops(bool coherent
)
2253 return coherent
? &arm_coherent_dma_ops
: &arm_dma_ops
;
2256 void arch_setup_dma_ops(struct device
*dev
, u64 dma_base
, u64 size
,
2257 const struct iommu_ops
*iommu
, bool coherent
)
2259 struct dma_map_ops
*dma_ops
;
2261 dev
->archdata
.dma_coherent
= coherent
;
2262 if (arm_setup_iommu_dma_ops(dev
, dma_base
, size
, iommu
))
2263 dma_ops
= arm_get_iommu_dma_map_ops(coherent
);
2265 dma_ops
= arm_get_dma_map_ops(coherent
);
2267 set_dma_ops(dev
, dma_ops
);
2270 void arch_teardown_dma_ops(struct device
*dev
)
2272 arm_teardown_iommu_dma_ops(dev
);