ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookie
[deliverable/linux.git] / arch / arm / plat-mxc / include / mach / iomux-v3.h
1 /*
2 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
3 * <armlinux@phytec.de>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20 #ifndef __MACH_IOMUX_V3_H__
21 #define __MACH_IOMUX_V3_H__
22
23 /*
24 * build IOMUX_PAD structure
25 *
26 * This iomux scheme is based around pads, which are the physical balls
27 * on the processor.
28 *
29 * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
30 * things like driving strength and pullup/pulldown.
31 * - Each pad can have but not necessarily does have an output routing register
32 * (IOMUXC_SW_MUX_CTL_PAD_x).
33 * - Each pad can have but not necessarily does have an input routing register
34 * (IOMUXC_x_SELECT_INPUT)
35 *
36 * The three register sets do not have a fixed offset to each other,
37 * hence we order this table by pad control registers (which all pads
38 * have) and put the optional i/o routing registers into additional
39 * fields.
40 *
41 * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
42 * If <padname> or <padmode> refers to a GPIO, it is named
43 * GPIO_<unit>_<num>
44 *
45 */
46
47 typedef struct deprecated_pad_desc {
48 unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */
49 unsigned mux_mode:8;
50 unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */
51 #define NO_PAD_CTRL (1 << 16)
52 unsigned pad_ctrl:17;
53 unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */
54 unsigned select_input:3;
55 } iomux_v3_cfg_t;
56
57 static inline unsigned int MUX_CTRL_OFS(iomux_v3_cfg_t *pad)
58 {
59 return pad->mux_ctrl_ofs;
60 }
61
62 static inline unsigned int MUX_MODE(iomux_v3_cfg_t *pad)
63 {
64 return pad->mux_mode;
65 }
66
67 static inline unsigned int MUX_SELECT_INPUT_OFS(iomux_v3_cfg_t *pad)
68 {
69 return pad->select_input_ofs;
70 }
71
72 static inline unsigned int MUX_SELECT_INPUT(iomux_v3_cfg_t *pad)
73 {
74 return pad->select_input;
75 }
76
77 static inline unsigned int MUX_PAD_CTRL_OFS(iomux_v3_cfg_t *pad)
78 {
79 return pad->pad_ctrl_ofs;
80 }
81
82 static inline unsigned int MUX_PAD_CTRL(iomux_v3_cfg_t *pad)
83 {
84 return pad->pad_ctrl;
85 }
86
87 #define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \
88 _select_input, _pad_ctrl) \
89 { \
90 .mux_ctrl_ofs = _mux_ctrl_ofs, \
91 .mux_mode = _mux_mode, \
92 .pad_ctrl_ofs = _pad_ctrl_ofs, \
93 .pad_ctrl = _pad_ctrl, \
94 .select_input_ofs = _select_input_ofs, \
95 .select_input = _select_input, \
96 }
97
98 /*
99 * Use to set PAD control
100 */
101
102 #define PAD_CTL_DVS (1 << 13)
103 #define PAD_CTL_HYS (1 << 8)
104
105 #define PAD_CTL_PKE (1 << 7)
106 #define PAD_CTL_PUE (1 << 6)
107 #define PAD_CTL_PUS_100K_DOWN (0 << 4)
108 #define PAD_CTL_PUS_47K_UP (1 << 4)
109 #define PAD_CTL_PUS_100K_UP (2 << 4)
110 #define PAD_CTL_PUS_22K_UP (3 << 4)
111
112 #define PAD_CTL_ODE (1 << 3)
113
114 #define PAD_CTL_DSE_LOW (0 << 1)
115 #define PAD_CTL_DSE_MED (1 << 1)
116 #define PAD_CTL_DSE_HIGH (2 << 1)
117 #define PAD_CTL_DSE_MAX (3 << 1)
118
119 #define PAD_CTL_SRE_FAST (1 << 0)
120 #define PAD_CTL_SRE_SLOW (0 << 0)
121
122
123 #define MX51_NUM_GPIO_PORT 4
124
125 #define GPIO_PIN_MASK 0x1f
126
127 #define GPIO_PORT_SHIFT 5
128 #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
129
130 #define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
131 #define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
132 #define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
133 #define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
134 #define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
135 #define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
136
137 /*
138 * setups a single pad in the iomuxer
139 */
140 int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t *pad);
141
142 /*
143 * setups mutliple pads
144 * convenient way to call the above function with tables
145 */
146 int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count);
147
148 /*
149 * Initialise the iomux controller
150 */
151 void mxc_iomux_v3_init(void __iomem *iomux_v3_base);
152
153 #endif /* __MACH_IOMUX_V3_H__*/
154
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