arch/arm/plat-omap/dmtimer.c

   1 /*
   2  * linux/arch/arm/plat-omap/dmtimer.c
   3  *
   4  * OMAP Dual-Mode Timers
   5  *
   6  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   7  * Tarun Kanti DebBarma <tarun.kanti@ti.com>
   8  * Thara Gopinath <thara@ti.com>
   9  *
  10  * dmtimer adaptation to platform_driver.
  11  *
  12  * Copyright (C) 2005 Nokia Corporation
  13  * OMAP2 support by Juha Yrjola
  14  * API improvements and OMAP2 clock framework support by Timo Teras
  15  *
  16  * Copyright (C) 2009 Texas Instruments
  17  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  18  *
  19  * This program is free software; you can redistribute it and/or modify it
  20  * under the terms of the GNU General Public License as published by the
  21  * Free Software Foundation; either version 2 of the License, or (at your
  22  * option) any later version.
  23  *
  24  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  27  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * You should have received a copy of the  GNU General Public License along
  34  * with this program; if not, write  to the Free Software Foundation, Inc.,
  35  * 675 Mass Ave, Cambridge, MA 02139, USA.
  36  */
  37
  38 #include <linux/module.h>
  39 #include <linux/io.h>
  40 #include <linux/slab.h>
  41 #include <linux/err.h>
  42 #include <linux/pm_runtime.h>
  43
  44 #include <plat/dmtimer.h>
  45 #include <plat/omap-pm.h>
  46
  47 #include <mach/hardware.h>
  48
  49 static u32 omap_reserved_systimers;
  50 static LIST_HEAD(omap_timer_list);
  51 static DEFINE_SPINLOCK(dm_timer_lock);
  52
  53 /**
  54  * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
  55  * @timer:      timer pointer over which read operation to perform
  56  * @reg:        lowest byte holds the register offset
  57  *
  58  * The posted mode bit is encoded in reg. Note that in posted mode write
  59  * pending bit must be checked. Otherwise a read of a non completed write
  60  * will produce an error.
  61  */
  62 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
  63 {
  64         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  65         return __omap_dm_timer_read(timer, reg, timer->posted);
  66 }
  67
  68 /**
  69  * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
  70  * @timer:      timer pointer over which write operation is to perform
  71  * @reg:        lowest byte holds the register offset
  72  * @value:      data to write into the register
  73  *
  74  * The posted mode bit is encoded in reg. Note that in posted mode the write
  75  * pending bit must be checked. Otherwise a write on a register which has a
  76  * pending write will be lost.
  77  */
  78 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
  79                                                 u32 value)
  80 {
  81         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  82         __omap_dm_timer_write(timer, reg, value, timer->posted);
  83 }
  84
  85 static void omap_timer_restore_context(struct omap_dm_timer *timer)
  86 {
  87         if (timer->revision == 1)
  88                 __raw_writel(timer->context.tistat, timer->sys_stat);
  89
  90         __raw_writel(timer->context.tisr, timer->irq_stat);
  91         omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
  92                                 timer->context.twer);
  93         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
  94                                 timer->context.tcrr);
  95         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
  96                                 timer->context.tldr);
  97         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
  98                                 timer->context.tmar);
  99         omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
 100                                 timer->context.tsicr);
 101         __raw_writel(timer->context.tier, timer->irq_ena);
 102         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
 103                                 timer->context.tclr);
 104 }
 105
 106 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 107 {
 108         int c;
 109
 110         if (!timer->sys_stat)
 111                 return;
 112
 113         c = 0;
 114         while (!(__raw_readl(timer->sys_stat) & 1)) {
 115                 c++;
 116                 if (c > 100000) {
 117                         printk(KERN_ERR "Timer failed to reset\n");
 118                         return;
 119                 }
 120         }
 121 }
 122
 123 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 124 {
 125         omap_dm_timer_enable(timer);
 126         if (timer->pdev->id != 1) {
 127                 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
 128                 omap_dm_timer_wait_for_reset(timer);
 129         }
 130
 131         __omap_dm_timer_reset(timer, 0, 0);
 132         omap_dm_timer_disable(timer);
 133         timer->posted = 1;
 134 }
 135
 136 int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 137 {
 138         int ret;
 139
 140         timer->fclk = clk_get(&timer->pdev->dev, "fck");
 141         if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
 142                 timer->fclk = NULL;
 143                 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
 144                 return -EINVAL;
 145         }
 146
 147         if (timer->capability & OMAP_TIMER_NEEDS_RESET)
 148                 omap_dm_timer_reset(timer);
 149
 150         ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 151
 152         timer->posted = 1;
 153         return ret;
 154 }
 155
 156 static inline u32 omap_dm_timer_reserved_systimer(int id)
 157 {
 158         return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
 159 }
 160
 161 int omap_dm_timer_reserve_systimer(int id)
 162 {
 163         if (omap_dm_timer_reserved_systimer(id))
 164                 return -ENODEV;
 165
 166         omap_reserved_systimers |= (1 << (id - 1));
 167
 168         return 0;
 169 }
 170
 171 struct omap_dm_timer *omap_dm_timer_request(void)
 172 {
 173         struct omap_dm_timer *timer = NULL, *t;
 174         unsigned long flags;
 175         int ret = 0;
 176
 177         spin_lock_irqsave(&dm_timer_lock, flags);
 178         list_for_each_entry(t, &omap_timer_list, node) {
 179                 if (t->reserved)
 180                         continue;
 181
 182                 timer = t;
 183                 timer->reserved = 1;
 184                 break;
 185         }
 186
 187         if (timer) {
 188                 ret = omap_dm_timer_prepare(timer);
 189                 if (ret) {
 190                         timer->reserved = 0;
 191                         timer = NULL;
 192                 }
 193         }
 194         spin_unlock_irqrestore(&dm_timer_lock, flags);
 195
 196         if (!timer)
 197                 pr_debug("%s: timer request failed!\n", __func__);
 198
 199         return timer;
 200 }
 201 EXPORT_SYMBOL_GPL(omap_dm_timer_request);
 202
 203 struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 204 {
 205         struct omap_dm_timer *timer = NULL, *t;
 206         unsigned long flags;
 207         int ret = 0;
 208
 209         spin_lock_irqsave(&dm_timer_lock, flags);
 210         list_for_each_entry(t, &omap_timer_list, node) {
 211                 if (t->pdev->id == id && !t->reserved) {
 212                         timer = t;
 213                         timer->reserved = 1;
 214                         break;
 215                 }
 216         }
 217
 218         if (timer) {
 219                 ret = omap_dm_timer_prepare(timer);
 220                 if (ret) {
 221                         timer->reserved = 0;
 222                         timer = NULL;
 223                 }
 224         }
 225         spin_unlock_irqrestore(&dm_timer_lock, flags);
 226
 227         if (!timer)
 228                 pr_debug("%s: timer%d request failed!\n", __func__, id);
 229
 230         return timer;
 231 }
 232 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 233
 234 int omap_dm_timer_free(struct omap_dm_timer *timer)
 235 {
 236         if (unlikely(!timer))
 237                 return -EINVAL;
 238
 239         clk_put(timer->fclk);
 240
 241         WARN_ON(!timer->reserved);
 242         timer->reserved = 0;
 243         return 0;
 244 }
 245 EXPORT_SYMBOL_GPL(omap_dm_timer_free);
 246
 247 void omap_dm_timer_enable(struct omap_dm_timer *timer)
 248 {
 249         pm_runtime_get_sync(&timer->pdev->dev);
 250 }
 251 EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 252
 253 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 254 {
 255         pm_runtime_put(&timer->pdev->dev);
 256 }
 257 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
 258
 259 int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 260 {
 261         if (timer)
 262                 return timer->irq;
 263         return -EINVAL;
 264 }
 265 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 266
 267 #if defined(CONFIG_ARCH_OMAP1)
 268
 269 /**
 270  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
 271  * @inputmask: current value of idlect mask
 272  */
 273 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 274 {
 275         int i = 0;
 276         struct omap_dm_timer *timer = NULL;
 277         unsigned long flags;
 278
 279         /* If ARMXOR cannot be idled this function call is unnecessary */
 280         if (!(inputmask & (1 << 1)))
 281                 return inputmask;
 282
 283         /* If any active timer is using ARMXOR return modified mask */
 284         spin_lock_irqsave(&dm_timer_lock, flags);
 285         list_for_each_entry(timer, &omap_timer_list, node) {
 286                 u32 l;
 287
 288                 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 289                 if (l & OMAP_TIMER_CTRL_ST) {
 290                         if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
 291                                 inputmask &= ~(1 << 1);
 292                         else
 293                                 inputmask &= ~(1 << 2);
 294                 }
 295                 i++;
 296         }
 297         spin_unlock_irqrestore(&dm_timer_lock, flags);
 298
 299         return inputmask;
 300 }
 301 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 302
 303 #else
 304
 305 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
 306 {
 307         if (timer)
 308                 return timer->fclk;
 309         return NULL;
 310 }
 311 EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
 312
 313 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 314 {
 315         BUG();
 316
 317         return 0;
 318 }
 319 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 320
 321 #endif
 322
 323 int omap_dm_timer_trigger(struct omap_dm_timer *timer)
 324 {
 325         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 326                 pr_err("%s: timer not available or enabled.\n", __func__);
 327                 return -EINVAL;
 328         }
 329
 330         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 331         return 0;
 332 }
 333 EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
 334
 335 int omap_dm_timer_start(struct omap_dm_timer *timer)
 336 {
 337         u32 l;
 338
 339         if (unlikely(!timer))
 340                 return -EINVAL;
 341
 342         omap_dm_timer_enable(timer);
 343
 344         if (!(timer->capability & OMAP_TIMER_ALWON)) {
 345                 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
 346                                 timer->ctx_loss_count)
 347                         omap_timer_restore_context(timer);
 348         }
 349
 350         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 351         if (!(l & OMAP_TIMER_CTRL_ST)) {
 352                 l |= OMAP_TIMER_CTRL_ST;
 353                 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 354         }
 355
 356         /* Save the context */
 357         timer->context.tclr = l;
 358         return 0;
 359 }
 360 EXPORT_SYMBOL_GPL(omap_dm_timer_start);
 361
 362 int omap_dm_timer_stop(struct omap_dm_timer *timer)
 363 {
 364         unsigned long rate = 0;
 365
 366         if (unlikely(!timer))
 367                 return -EINVAL;
 368
 369         if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
 370                 rate = clk_get_rate(timer->fclk);
 371
 372         __omap_dm_timer_stop(timer, timer->posted, rate);
 373
 374         if (!(timer->capability & OMAP_TIMER_ALWON))
 375                 timer->ctx_loss_count =
 376                         omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
 377
 378         /*
 379          * Since the register values are computed and written within
 380          * __omap_dm_timer_stop, we need to use read to retrieve the
 381          * context.
 382          */
 383         timer->context.tclr =
 384                         omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 385         timer->context.tisr = __raw_readl(timer->irq_stat);
 386         omap_dm_timer_disable(timer);
 387         return 0;
 388 }
 389 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
 390
 391 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 392 {
 393         int ret;
 394         struct dmtimer_platform_data *pdata;
 395
 396         if (unlikely(!timer))
 397                 return -EINVAL;
 398
 399         pdata = timer->pdev->dev.platform_data;
 400
 401         if (source < 0 || source >= 3)
 402                 return -EINVAL;
 403
 404         ret = pdata->set_timer_src(timer->pdev, source);
 405
 406         return ret;
 407 }
 408 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 409
 410 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
 411                             unsigned int load)
 412 {
 413         u32 l;
 414
 415         if (unlikely(!timer))
 416                 return -EINVAL;
 417
 418         omap_dm_timer_enable(timer);
 419         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 420         if (autoreload)
 421                 l |= OMAP_TIMER_CTRL_AR;
 422         else
 423                 l &= ~OMAP_TIMER_CTRL_AR;
 424         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 425         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 426
 427         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 428         /* Save the context */
 429         timer->context.tclr = l;
 430         timer->context.tldr = load;
 431         omap_dm_timer_disable(timer);
 432         return 0;
 433 }
 434 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
 435
 436 /* Optimized set_load which removes costly spin wait in timer_start */
 437 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
 438                             unsigned int load)
 439 {
 440         u32 l;
 441
 442         if (unlikely(!timer))
 443                 return -EINVAL;
 444
 445         omap_dm_timer_enable(timer);
 446
 447         if (!(timer->capability & OMAP_TIMER_ALWON)) {
 448                 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
 449                                 timer->ctx_loss_count)
 450                         omap_timer_restore_context(timer);
 451         }
 452
 453         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 454         if (autoreload) {
 455                 l |= OMAP_TIMER_CTRL_AR;
 456                 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 457         } else {
 458                 l &= ~OMAP_TIMER_CTRL_AR;
 459         }
 460         l |= OMAP_TIMER_CTRL_ST;
 461
 462         __omap_dm_timer_load_start(timer, l, load, timer->posted);
 463
 464         /* Save the context */
 465         timer->context.tclr = l;
 466         timer->context.tldr = load;
 467         timer->context.tcrr = load;
 468         return 0;
 469 }
 470 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
 471
 472 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
 473                              unsigned int match)
 474 {
 475         u32 l;
 476
 477         if (unlikely(!timer))
 478                 return -EINVAL;
 479
 480         omap_dm_timer_enable(timer);
 481         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 482         if (enable)
 483                 l |= OMAP_TIMER_CTRL_CE;
 484         else
 485                 l &= ~OMAP_TIMER_CTRL_CE;
 486         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 487         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
 488
 489         /* Save the context */
 490         timer->context.tclr = l;
 491         timer->context.tmar = match;
 492         omap_dm_timer_disable(timer);
 493         return 0;
 494 }
 495 EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
 496
 497 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
 498                            int toggle, int trigger)
 499 {
 500         u32 l;
 501
 502         if (unlikely(!timer))
 503                 return -EINVAL;
 504
 505         omap_dm_timer_enable(timer);
 506         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 507         l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
 508                OMAP_TIMER_CTRL_PT | (0x03 << 10));
 509         if (def_on)
 510                 l |= OMAP_TIMER_CTRL_SCPWM;
 511         if (toggle)
 512                 l |= OMAP_TIMER_CTRL_PT;
 513         l |= trigger << 10;
 514         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 515
 516         /* Save the context */
 517         timer->context.tclr = l;
 518         omap_dm_timer_disable(timer);
 519         return 0;
 520 }
 521 EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
 522
 523 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
 524 {
 525         u32 l;
 526
 527         if (unlikely(!timer))
 528                 return -EINVAL;
 529
 530         omap_dm_timer_enable(timer);
 531         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 532         l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
 533         if (prescaler >= 0x00 && prescaler <= 0x07) {
 534                 l |= OMAP_TIMER_CTRL_PRE;
 535                 l |= prescaler << 2;
 536         }
 537         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 538
 539         /* Save the context */
 540         timer->context.tclr = l;
 541         omap_dm_timer_disable(timer);
 542         return 0;
 543 }
 544 EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
 545
 546 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 547                                   unsigned int value)
 548 {
 549         if (unlikely(!timer))
 550                 return -EINVAL;
 551
 552         omap_dm_timer_enable(timer);
 553         __omap_dm_timer_int_enable(timer, value);
 554
 555         /* Save the context */
 556         timer->context.tier = value;
 557         timer->context.twer = value;
 558         omap_dm_timer_disable(timer);
 559         return 0;
 560 }
 561 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 562
 563 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 564 {
 565         unsigned int l;
 566
 567         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 568                 pr_err("%s: timer not available or enabled.\n", __func__);
 569                 return 0;
 570         }
 571
 572         l = __raw_readl(timer->irq_stat);
 573
 574         return l;
 575 }
 576 EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
 577
 578 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
 579 {
 580         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
 581                 return -EINVAL;
 582
 583         __omap_dm_timer_write_status(timer, value);
 584         /* Save the context */
 585         timer->context.tisr = value;
 586         return 0;
 587 }
 588 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
 589
 590 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
 591 {
 592         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 593                 pr_err("%s: timer not iavailable or enabled.\n", __func__);
 594                 return 0;
 595         }
 596
 597         return __omap_dm_timer_read_counter(timer, timer->posted);
 598 }
 599 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
 600
 601 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
 602 {
 603         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 604                 pr_err("%s: timer not available or enabled.\n", __func__);
 605                 return -EINVAL;
 606         }
 607
 608         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
 609
 610         /* Save the context */
 611         timer->context.tcrr = value;
 612         return 0;
 613 }
 614 EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
 615
 616 int omap_dm_timers_active(void)
 617 {
 618         struct omap_dm_timer *timer;
 619
 620         list_for_each_entry(timer, &omap_timer_list, node) {
 621                 if (!timer->reserved)
 622                         continue;
 623
 624                 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
 625                     OMAP_TIMER_CTRL_ST) {
 626                         return 1;
 627                 }
 628         }
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 632
 633 /**
 634  * omap_dm_timer_probe - probe function called for every registered device
 635  * @pdev:       pointer to current timer platform device
 636  *
 637  * Called by driver framework at the end of device registration for all
 638  * timer devices.
 639  */
 640 static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
 641 {
 642         int ret;
 643         unsigned long flags;
 644         struct omap_dm_timer *timer;
 645         struct resource *mem, *irq, *ioarea;
 646         struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 647
 648         if (!pdata) {
 649                 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
 650                 return -ENODEV;
 651         }
 652
 653         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 654         if (unlikely(!irq)) {
 655                 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
 656                 return -ENODEV;
 657         }
 658
 659         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 660         if (unlikely(!mem)) {
 661                 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
 662                 return -ENODEV;
 663         }
 664
 665         ioarea = request_mem_region(mem->start, resource_size(mem),
 666                         pdev->name);
 667         if (!ioarea) {
 668                 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
 669                 return -EBUSY;
 670         }
 671
 672         timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
 673         if (!timer) {
 674                 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
 675                         __func__);
 676                 ret = -ENOMEM;
 677                 goto err_free_ioregion;
 678         }
 679
 680         timer->io_base = ioremap(mem->start, resource_size(mem));
 681         if (!timer->io_base) {
 682                 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
 683                 ret = -ENOMEM;
 684                 goto err_free_mem;
 685         }
 686
 687         timer->id = pdev->id;
 688         timer->irq = irq->start;
 689         timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
 690         timer->pdev = pdev;
 691         timer->capability = pdata->timer_capability;
 692
 693         /* Skip pm_runtime_enable for OMAP1 */
 694         if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
 695                 pm_runtime_enable(&pdev->dev);
 696                 pm_runtime_irq_safe(&pdev->dev);
 697         }
 698
 699         if (!timer->reserved) {
 700                 pm_runtime_get_sync(&pdev->dev);
 701                 __omap_dm_timer_init_regs(timer);
 702                 pm_runtime_put(&pdev->dev);
 703         }
 704
 705         /* add the timer element to the list */
 706         spin_lock_irqsave(&dm_timer_lock, flags);
 707         list_add_tail(&timer->node, &omap_timer_list);
 708         spin_unlock_irqrestore(&dm_timer_lock, flags);
 709
 710         dev_dbg(&pdev->dev, "Device Probed.\n");
 711
 712         return 0;
 713
 714 err_free_mem:
 715         kfree(timer);
 716
 717 err_free_ioregion:
 718         release_mem_region(mem->start, resource_size(mem));
 719
 720         return ret;
 721 }
 722
 723 /**
 724  * omap_dm_timer_remove - cleanup a registered timer device
 725  * @pdev:       pointer to current timer platform device
 726  *
 727  * Called by driver framework whenever a timer device is unregistered.
 728  * In addition to freeing platform resources it also deletes the timer
 729  * entry from the local list.
 730  */
 731 static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 732 {
 733         struct omap_dm_timer *timer;
 734         unsigned long flags;
 735         int ret = -EINVAL;
 736
 737         spin_lock_irqsave(&dm_timer_lock, flags);
 738         list_for_each_entry(timer, &omap_timer_list, node)
 739                 if (timer->pdev->id == pdev->id) {
 740                         list_del(&timer->node);
 741                         kfree(timer);
 742                         ret = 0;
 743                         break;
 744                 }
 745         spin_unlock_irqrestore(&dm_timer_lock, flags);
 746
 747         return ret;
 748 }
 749
 750 static struct platform_driver omap_dm_timer_driver = {
 751         .probe  = omap_dm_timer_probe,
 752         .remove = __devexit_p(omap_dm_timer_remove),
 753         .driver = {
 754                 .name   = "omap_timer",
 755         },
 756 };
 757
 758 static int __init omap_dm_timer_driver_init(void)
 759 {
 760         return platform_driver_register(&omap_dm_timer_driver);
 761 }
 762
 763 static void __exit omap_dm_timer_driver_exit(void)
 764 {
 765         platform_driver_unregister(&omap_dm_timer_driver);
 766 }
 767
 768 early_platform_init("earlytimer", &omap_dm_timer_driver);
 769 module_init(omap_dm_timer_driver_init);
 770 module_exit(omap_dm_timer_driver_exit);
 771
 772 MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
 773 MODULE_LICENSE("GPL");
 774 MODULE_ALIAS("platform:" DRIVER_NAME);
 775 MODULE_AUTHOR("Texas Instruments Inc");