arch/arm/plat-omap/include/plat/omap_hwmod.h

   1 /*
   2  * omap_hwmod macros, structures
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Copyright (C) 2011 Texas Instruments, Inc.
   6  * Paul Walmsley
   7  *
   8  * Created in collaboration with (alphabetical order): Benoît Cousson,
   9  * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
  10  * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * These headers and macros are used to define OMAP on-chip module
  17  * data and their integration with other OMAP modules and Linux.
  18  * Copious documentation and references can also be found in the
  19  * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
  20  * writing).
  21  *
  22  * To do:
  23  * - add interconnect error log structures
  24  * - add pinmuxing
  25  * - init_conn_id_bit (CONNID_BIT_VECTOR)
  26  * - implement default hwmod SMS/SDRC flags?
  27  * - move Linux-specific data ("non-ROM data") out
  28  *
  29  */
  30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  32
  33 #include <linux/kernel.h>
  34 #include <linux/init.h>
  35 #include <linux/list.h>
  36 #include <linux/ioport.h>
  37 #include <linux/spinlock.h>
  38 #include <plat/cpu.h>
  39
  40 struct omap_device;
  41
  42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  44 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
  45
  46 /*
  47  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
  48  * with the original PRCM protocol defined for OMAP2420
  49  */
  50 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
  51 #define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
  52 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
  53 #define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
  54 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
  55 #define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
  56 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
  57 #define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
  58 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
  59 #define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
  60 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
  61 #define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
  62
  63 /*
  64  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
  65  * with the new PRCM protocol defined for new OMAP4 IPs.
  66  */
  67 #define SYSC_TYPE2_SOFTRESET_SHIFT      0
  68 #define SYSC_TYPE2_SOFTRESET_MASK       (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
  69 #define SYSC_TYPE2_SIDLEMODE_SHIFT      2
  70 #define SYSC_TYPE2_SIDLEMODE_MASK       (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
  71 #define SYSC_TYPE2_MIDLEMODE_SHIFT      4
  72 #define SYSC_TYPE2_MIDLEMODE_MASK       (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
  73 #define SYSC_TYPE2_DMADISABLE_SHIFT     16
  74 #define SYSC_TYPE2_DMADISABLE_MASK      (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT)
  75
  76 /*
  77  * OCP SYSCONFIG bit shifts/masks TYPE3.
  78  * This is applicable for some IPs present in AM33XX
  79  */
  80 #define SYSC_TYPE3_SIDLEMODE_SHIFT      0
  81 #define SYSC_TYPE3_SIDLEMODE_MASK       (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
  82 #define SYSC_TYPE3_MIDLEMODE_SHIFT      2
  83 #define SYSC_TYPE3_MIDLEMODE_MASK       (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
  84
  85 /* OCP SYSSTATUS bit shifts/masks */
  86 #define SYSS_RESETDONE_SHIFT            0
  87 #define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
  88
  89 /* Master standby/slave idle mode flags */
  90 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
  91 #define HWMOD_IDLEMODE_NO               (1 << 1)
  92 #define HWMOD_IDLEMODE_SMART            (1 << 2)
  93 #define HWMOD_IDLEMODE_SMART_WKUP       (1 << 3)
  94
  95 /* modulemode control type (SW or HW) */
  96 #define MODULEMODE_HWCTRL               1
  97 #define MODULEMODE_SWCTRL               2
  98
  99
 100 /**
 101  * struct omap_hwmod_mux_info - hwmod specific mux configuration
 102  * @pads:              array of omap_device_pad entries
 103  * @nr_pads:           number of omap_device_pad entries
 104  *
 105  * Note that this is currently built during init as needed.
 106  */
 107 struct omap_hwmod_mux_info {
 108         int                             nr_pads;
 109         struct omap_device_pad          *pads;
 110         int                             nr_pads_dynamic;
 111         struct omap_device_pad          **pads_dynamic;
 112         int                             *irqs;
 113         bool                            enabled;
 114 };
 115
 116 /**
 117  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
 118  * @name: name of the IRQ channel (module local name)
 119  * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
 120  *
 121  * @name should be something short, e.g., "tx" or "rx".  It is for use
 122  * by platform_get_resource_byname().  It is defined locally to the
 123  * hwmod.
 124  */
 125 struct omap_hwmod_irq_info {
 126         const char      *name;
 127         s16             irq;
 128 };
 129
 130 /**
 131  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
 132  * @name: name of the DMA channel (module local name)
 133  * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
 134  *
 135  * @name should be something short, e.g., "tx" or "rx".  It is for use
 136  * by platform_get_resource_byname().  It is defined locally to the
 137  * hwmod.
 138  */
 139 struct omap_hwmod_dma_info {
 140         const char      *name;
 141         s16             dma_req;
 142 };
 143
 144 /**
 145  * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
 146  * @name: name of the reset line (module local name)
 147  * @rst_shift: Offset of the reset bit
 148  * @st_shift: Offset of the reset status bit (OMAP2/3 only)
 149  *
 150  * @name should be something short, e.g., "cpu0" or "rst". It is defined
 151  * locally to the hwmod.
 152  */
 153 struct omap_hwmod_rst_info {
 154         const char      *name;
 155         u8              rst_shift;
 156         u8              st_shift;
 157 };
 158
 159 /**
 160  * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
 161  * @role: "sys", "32k", "tv", etc -- for use in clk_get()
 162  * @clk: opt clock: OMAP clock name
 163  * @_clk: pointer to the struct clk (filled in at runtime)
 164  *
 165  * The module's interface clock and main functional clock should not
 166  * be added as optional clocks.
 167  */
 168 struct omap_hwmod_opt_clk {
 169         const char      *role;
 170         const char      *clk;
 171         struct clk      *_clk;
 172 };
 173
 174
 175 /* omap_hwmod_omap2_firewall.flags bits */
 176 #define OMAP_FIREWALL_L3                (1 << 0)
 177 #define OMAP_FIREWALL_L4                (1 << 1)
 178
 179 /**
 180  * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
 181  * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
 182  * @l4_fw_region: L4 firewall region ID
 183  * @l4_prot_group: L4 protection group ID
 184  * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
 185  */
 186 struct omap_hwmod_omap2_firewall {
 187         u8 l3_perm_bit;
 188         u8 l4_fw_region;
 189         u8 l4_prot_group;
 190         u8 flags;
 191 };
 192
 193
 194 /*
 195  * omap_hwmod_addr_space.flags bits
 196  *
 197  * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
 198  * ADDR_TYPE_RT: Address space contains module register target data.
 199  */
 200 #define ADDR_MAP_ON_INIT        (1 << 0)        /* XXX does not belong */
 201 #define ADDR_TYPE_RT            (1 << 1)
 202
 203 /**
 204  * struct omap_hwmod_addr_space - address space handled by the hwmod
 205  * @name: name of the address space
 206  * @pa_start: starting physical address
 207  * @pa_end: ending physical address
 208  * @flags: (see omap_hwmod_addr_space.flags macros above)
 209  *
 210  * Address space doesn't necessarily follow physical interconnect
 211  * structure.  GPMC is one example.
 212  */
 213 struct omap_hwmod_addr_space {
 214         const char *name;
 215         u32 pa_start;
 216         u32 pa_end;
 217         u8 flags;
 218 };
 219
 220
 221 /*
 222  * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
 223  * interface to interact with the hwmod.  Used to add sleep dependencies
 224  * when the module is enabled or disabled.
 225  */
 226 #define OCP_USER_MPU                    (1 << 0)
 227 #define OCP_USER_SDMA                   (1 << 1)
 228 #define OCP_USER_DSP                    (1 << 2)
 229 #define OCP_USER_IVA                    (1 << 3)
 230
 231 /* omap_hwmod_ocp_if.flags bits */
 232 #define OCPIF_SWSUP_IDLE                (1 << 0)
 233 #define OCPIF_CAN_BURST                 (1 << 1)
 234
 235 /* omap_hwmod_ocp_if._int_flags possibilities */
 236 #define _OCPIF_INT_FLAGS_REGISTERED     (1 << 0)
 237
 238
 239 /**
 240  * struct omap_hwmod_ocp_if - OCP interface data
 241  * @master: struct omap_hwmod that initiates OCP transactions on this link
 242  * @slave: struct omap_hwmod that responds to OCP transactions on this link
 243  * @addr: address space associated with this link
 244  * @clk: interface clock: OMAP clock name
 245  * @_clk: pointer to the interface struct clk (filled in at runtime)
 246  * @fw: interface firewall data
 247  * @width: OCP data width
 248  * @user: initiators using this interface (see OCP_USER_* macros above)
 249  * @flags: OCP interface flags (see OCPIF_* macros above)
 250  * @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above)
 251  *
 252  * It may also be useful to add a tag_cnt field for OCP2.x devices.
 253  *
 254  * Parameter names beginning with an underscore are managed internally by
 255  * the omap_hwmod code and should not be set during initialization.
 256  */
 257 struct omap_hwmod_ocp_if {
 258         struct omap_hwmod               *master;
 259         struct omap_hwmod               *slave;
 260         struct omap_hwmod_addr_space    *addr;
 261         const char                      *clk;
 262         struct clk                      *_clk;
 263         union {
 264                 struct omap_hwmod_omap2_firewall omap2;
 265         }                               fw;
 266         u8                              width;
 267         u8                              user;
 268         u8                              flags;
 269         u8                              _int_flags;
 270 };
 271
 272
 273 /* Macros for use in struct omap_hwmod_sysconfig */
 274
 275 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
 276 #define MASTER_STANDBY_SHIFT    4
 277 #define SLAVE_IDLE_SHIFT        0
 278 #define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
 279 #define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
 280 #define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
 281 #define SIDLE_SMART_WKUP        (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
 282 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 283 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 284 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
 285 #define MSTANDBY_SMART_WKUP     (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
 286
 287 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 288 #define SYSC_HAS_AUTOIDLE       (1 << 0)
 289 #define SYSC_HAS_SOFTRESET      (1 << 1)
 290 #define SYSC_HAS_ENAWAKEUP      (1 << 2)
 291 #define SYSC_HAS_EMUFREE        (1 << 3)
 292 #define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
 293 #define SYSC_HAS_SIDLEMODE      (1 << 5)
 294 #define SYSC_HAS_MIDLEMODE      (1 << 6)
 295 #define SYSS_HAS_RESET_STATUS   (1 << 7)
 296 #define SYSC_NO_CACHE           (1 << 8)  /* XXX SW flag, belongs elsewhere */
 297 #define SYSC_HAS_RESET_STATUS   (1 << 9)
 298 #define SYSC_HAS_DMADISABLE     (1 << 10)
 299
 300 /* omap_hwmod_sysconfig.clockact flags */
 301 #define CLOCKACT_TEST_BOTH      0x0
 302 #define CLOCKACT_TEST_MAIN      0x1
 303 #define CLOCKACT_TEST_ICLK      0x2
 304 #define CLOCKACT_TEST_NONE      0x3
 305
 306 /**
 307  * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
 308  * @midle_shift: Offset of the midle bit
 309  * @clkact_shift: Offset of the clockactivity bit
 310  * @sidle_shift: Offset of the sidle bit
 311  * @enwkup_shift: Offset of the enawakeup bit
 312  * @srst_shift: Offset of the softreset bit
 313  * @autoidle_shift: Offset of the autoidle bit
 314  * @dmadisable_shift: Offset of the dmadisable bit
 315  */
 316 struct omap_hwmod_sysc_fields {
 317         u8 midle_shift;
 318         u8 clkact_shift;
 319         u8 sidle_shift;
 320         u8 enwkup_shift;
 321         u8 srst_shift;
 322         u8 autoidle_shift;
 323         u8 dmadisable_shift;
 324 };
 325
 326 /**
 327  * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
 328  * @rev_offs: IP block revision register offset (from module base addr)
 329  * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
 330  * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
 331  * @srst_udelay: Delay needed after doing a softreset in usecs
 332  * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
 333  * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
 334  * @clockact: the default value of the module CLOCKACTIVITY bits
 335  *
 336  * @clockact describes to the module which clocks are likely to be
 337  * disabled when the PRCM issues its idle request to the module.  Some
 338  * modules have separate clockdomains for the interface clock and main
 339  * functional clock, and can check whether they should acknowledge the
 340  * idle request based on the internal module functionality that has
 341  * been associated with the clocks marked in @clockact.  This field is
 342  * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
 343  *
 344  * @sysc_fields: structure containing the offset positions of various bits in
 345  * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
 346  * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
 347  * whether the device ip is compliant with the original PRCM protocol
 348  * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
 349  * If the device follows a different scheme for the sysconfig register ,
 350  * then this field has to be populated with the correct offset structure.
 351  */
 352 struct omap_hwmod_class_sysconfig {
 353         u32 rev_offs;
 354         u32 sysc_offs;
 355         u32 syss_offs;
 356         u16 sysc_flags;
 357         struct omap_hwmod_sysc_fields *sysc_fields;
 358         u8 srst_udelay;
 359         u8 idlemodes;
 360         u8 clockact;
 361 };
 362
 363 /**
 364  * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
 365  * @module_offs: PRCM submodule offset from the start of the PRM/CM
 366  * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
 367  * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
 368  * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
 369  * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
 370  * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
 371  *
 372  * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
 373  * WKEN, GRPSEL registers.  In an ideal world, no extra information
 374  * would be needed for IDLEST information, but alas, there are some
 375  * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
 376  * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
 377  */
 378 struct omap_hwmod_omap2_prcm {
 379         s16 module_offs;
 380         u8 prcm_reg_id;
 381         u8 module_bit;
 382         u8 idlest_reg_id;
 383         u8 idlest_idle_bit;
 384         u8 idlest_stdby_bit;
 385 };
 386
 387
 388 /**
 389  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
 390  * @clkctrl_reg: PRCM address of the clock control register
 391  * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
 392  * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
 393  * @submodule_wkdep_bit: bit shift of the WKDEP range
 394  */
 395 struct omap_hwmod_omap4_prcm {
 396         u16             clkctrl_offs;
 397         u16             rstctrl_offs;
 398         u16             rstst_offs;
 399         u16             context_offs;
 400         u8              submodule_wkdep_bit;
 401         u8              modulemode;
 402 };
 403
 404
 405 /*
 406  * omap_hwmod.flags definitions
 407  *
 408  * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
 409  *     of idle, rather than relying on module smart-idle
 410  * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
 411  *     of standby, rather than relying on module smart-standby
 412  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
 413  *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
 414  *     XXX Should be HWMOD_SETUP_NO_RESET
 415  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
 416  *     controller, etc. XXX probably belongs outside the main hwmod file
 417  *     XXX Should be HWMOD_SETUP_NO_IDLE
 418  * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
 419  *     when module is enabled, rather than the default, which is to
 420  *     enable autoidle
 421  * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
 422  * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
 423  *     only for few initiator modules on OMAP2 & 3.
 424  * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
 425  *     This is needed for devices like DSS that require optional clocks enabled
 426  *     in order to complete the reset. Optional clocks will be disabled
 427  *     again after the reset.
 428  * HWMOD_16BIT_REG: Module has 16bit registers
 429  */
 430 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 431 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
 432 #define HWMOD_INIT_NO_RESET                     (1 << 2)
 433 #define HWMOD_INIT_NO_IDLE                      (1 << 3)
 434 #define HWMOD_NO_OCP_AUTOIDLE                   (1 << 4)
 435 #define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 5)
 436 #define HWMOD_NO_IDLEST                         (1 << 6)
 437 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 438 #define HWMOD_16BIT_REG                         (1 << 8)
 439
 440 /*
 441  * omap_hwmod._int_flags definitions
 442  * These are for internal use only and are managed by the omap_hwmod code.
 443  *
 444  * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
 445  * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
 446  * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 447  * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
 448  *     causes the first call to _enable() to only update the pinmux
 449  */
 450 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
 451 #define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
 452 #define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
 453 #define _HWMOD_SKIP_ENABLE                      (1 << 3)
 454
 455 /*
 456  * omap_hwmod._state definitions
 457  *
 458  * INITIALIZED: reset (optionally), initialized, enabled, disabled
 459  *              (optionally)
 460  *
 461  *
 462  */
 463 #define _HWMOD_STATE_UNKNOWN                    0
 464 #define _HWMOD_STATE_REGISTERED                 1
 465 #define _HWMOD_STATE_CLKS_INITED                2
 466 #define _HWMOD_STATE_INITIALIZED                3
 467 #define _HWMOD_STATE_ENABLED                    4
 468 #define _HWMOD_STATE_IDLE                       5
 469 #define _HWMOD_STATE_DISABLED                   6
 470
 471 /**
 472  * struct omap_hwmod_class - the type of an IP block
 473  * @name: name of the hwmod_class
 474  * @sysc: device SYSCONFIG/SYSSTATUS register data
 475  * @rev: revision of the IP class
 476  * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
 477  * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
 478  *
 479  * Represent the class of a OMAP hardware "modules" (e.g. timer,
 480  * smartreflex, gpio, uart...)
 481  *
 482  * @pre_shutdown is a function that will be run immediately before
 483  * hwmod clocks are disabled, etc.  It is intended for use for hwmods
 484  * like the MPU watchdog, which cannot be disabled with the standard
 485  * omap_hwmod_shutdown().  The function should return 0 upon success,
 486  * or some negative error upon failure.  Returning an error will cause
 487  * omap_hwmod_shutdown() to abort the device shutdown and return an
 488  * error.
 489  *
 490  * If @reset is defined, then the function it points to will be
 491  * executed in place of the standard hwmod _reset() code in
 492  * mach-omap2/omap_hwmod.c.  This is needed for IP blocks which have
 493  * unusual reset sequences - usually processor IP blocks like the IVA.
 494  */
 495 struct omap_hwmod_class {
 496         const char                              *name;
 497         struct omap_hwmod_class_sysconfig       *sysc;
 498         u32                                     rev;
 499         int                                     (*pre_shutdown)(struct omap_hwmod *oh);
 500         int                                     (*reset)(struct omap_hwmod *oh);
 501 };
 502
 503 /**
 504  * struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs
 505  * @ocp_if: OCP interface structure record pointer
 506  * @node: list_head pointing to next struct omap_hwmod_link in a list
 507  */
 508 struct omap_hwmod_link {
 509         struct omap_hwmod_ocp_if        *ocp_if;
 510         struct list_head                node;
 511 };
 512
 513 /**
 514  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
 515  * @name: name of the hwmod
 516  * @class: struct omap_hwmod_class * to the class of this hwmod
 517  * @od: struct omap_device currently associated with this hwmod (internal use)
 518  * @mpu_irqs: ptr to an array of MPU IRQs
 519  * @sdma_reqs: ptr to an array of System DMA request IDs
 520  * @prcm: PRCM data pertaining to this hwmod
 521  * @main_clk: main clock: OMAP clock name
 522  * @_clk: pointer to the main struct clk (filled in at runtime)
 523  * @opt_clks: other device clocks that drivers can request (0..*)
 524  * @voltdm: pointer to voltage domain (filled in at runtime)
 525  * @dev_attr: arbitrary device attributes that can be passed to the driver
 526  * @_sysc_cache: internal-use hwmod flags
 527  * @_mpu_rt_va: cached register target start address (internal use)
 528  * @_mpu_port: cached MPU register target slave (internal use)
 529  * @opt_clks_cnt: number of @opt_clks
 530  * @master_cnt: number of @master entries
 531  * @slaves_cnt: number of @slave entries
 532  * @response_lat: device OCP response latency (in interface clock cycles)
 533  * @_int_flags: internal-use hwmod flags
 534  * @_state: internal-use hwmod state
 535  * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
 536  * @flags: hwmod flags (documented below)
 537  * @_lock: spinlock serializing operations on this hwmod
 538  * @node: list node for hwmod list (internal use)
 539  *
 540  * @main_clk refers to this module's "main clock," which for our
 541  * purposes is defined as "the functional clock needed for register
 542  * accesses to complete."  Modules may not have a main clock if the
 543  * interface clock also serves as a main clock.
 544  *
 545  * Parameter names beginning with an underscore are managed internally by
 546  * the omap_hwmod code and should not be set during initialization.
 547  *
 548  * @masters and @slaves are now deprecated.
 549  */
 550 struct omap_hwmod {
 551         const char                      *name;
 552         struct omap_hwmod_class         *class;
 553         struct omap_device              *od;
 554         struct omap_hwmod_mux_info      *mux;
 555         struct omap_hwmod_irq_info      *mpu_irqs;
 556         struct omap_hwmod_dma_info      *sdma_reqs;
 557         struct omap_hwmod_rst_info      *rst_lines;
 558         union {
 559                 struct omap_hwmod_omap2_prcm omap2;
 560                 struct omap_hwmod_omap4_prcm omap4;
 561         }                               prcm;
 562         const char                      *main_clk;
 563         struct clk                      *_clk;
 564         struct omap_hwmod_opt_clk       *opt_clks;
 565         char                            *clkdm_name;
 566         struct clockdomain              *clkdm;
 567         struct list_head                master_ports; /* connect to *_IA */
 568         struct list_head                slave_ports; /* connect to *_TA */
 569         void                            *dev_attr;
 570         u32                             _sysc_cache;
 571         void __iomem                    *_mpu_rt_va;
 572         spinlock_t                      _lock;
 573         struct list_head                node;
 574         struct omap_hwmod_ocp_if        *_mpu_port;
 575         u16                             flags;
 576         u8                              response_lat;
 577         u8                              rst_lines_cnt;
 578         u8                              opt_clks_cnt;
 579         u8                              masters_cnt;
 580         u8                              slaves_cnt;
 581         u8                              hwmods_cnt;
 582         u8                              _int_flags;
 583         u8                              _state;
 584         u8                              _postsetup_state;
 585 };
 586
 587 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 588 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
 589                         void *data);
 590
 591 int __init omap_hwmod_setup_one(const char *name);
 592
 593 int omap_hwmod_enable(struct omap_hwmod *oh);
 594 int _omap_hwmod_enable(struct omap_hwmod *oh);
 595 int omap_hwmod_idle(struct omap_hwmod *oh);
 596 int _omap_hwmod_idle(struct omap_hwmod *oh);
 597 int omap_hwmod_shutdown(struct omap_hwmod *oh);
 598
 599 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
 600 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
 601 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
 602
 603 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 604 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 605
 606 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
 607 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
 608
 609 int omap_hwmod_reset(struct omap_hwmod *oh);
 610 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 611
 612 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 613 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
 614 int omap_hwmod_softreset(struct omap_hwmod *oh);
 615
 616 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 617 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 618 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
 619                                    const char *name, struct resource *res);
 620
 621 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
 622 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
 623
 624 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
 625                                  struct omap_hwmod *init_oh);
 626 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
 627                                  struct omap_hwmod *init_oh);
 628
 629 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
 630 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
 631 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
 632 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
 633
 634 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
 635 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
 636
 637 int omap_hwmod_for_each_by_class(const char *classname,
 638                                  int (*fn)(struct omap_hwmod *oh,
 639                                            void *user),
 640                                  void *user);
 641
 642 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
 643 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
 644
 645 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
 646
 647 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
 648
 649 extern void __init omap_hwmod_init(void);
 650
 651 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
 652
 653 /*
 654  * Chip variant-specific hwmod init routines - XXX should be converted
 655  * to use initcalls once the initial boot ordering is straightened out
 656  */
 657 extern int omap2420_hwmod_init(void);
 658 extern int omap2430_hwmod_init(void);
 659 extern int omap3xxx_hwmod_init(void);
 660 extern int omap44xx_hwmod_init(void);
 661
 662 extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);
 663
 664 #endif