arch/arm/plat-omap/include/plat/omap_hwmod.h

   1 /*
   2  * omap_hwmod macros, structures
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * Created in collaboration with (alphabetical order): Benoît Cousson,
   8  * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
   9  * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * These headers and macros are used to define OMAP on-chip module
  16  * data and their integration with other OMAP modules and Linux.
  17  * Copious documentation and references can also be found in the
  18  * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
  19  * writing).
  20  *
  21  * To do:
  22  * - add interconnect error log structures
  23  * - add pinmuxing
  24  * - init_conn_id_bit (CONNID_BIT_VECTOR)
  25  * - implement default hwmod SMS/SDRC flags?
  26  * - move Linux-specific data ("non-ROM data") out
  27  *
  28  */
  29 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  30 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
  31
  32 #include <linux/kernel.h>
  33 #include <linux/init.h>
  34 #include <linux/list.h>
  35 #include <linux/ioport.h>
  36 #include <linux/spinlock.h>
  37 #include <plat/cpu.h>
  38
  39 struct omap_device;
  40
  41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  43
  44 /*
  45  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
  46  * with the original PRCM protocol defined for OMAP2420
  47  */
  48 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
  49 #define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_MIDLEMODE_SHIFT)
  50 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
  51 #define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
  52 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
  53 #define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_SIDLEMODE_SHIFT)
  54 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
  55 #define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_ENAWAKEUP_SHIFT)
  56 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
  57 #define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_SOFTRESET_SHIFT)
  58 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
  59 #define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_AUTOIDLE_SHIFT)
  60
  61 /*
  62  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
  63  * with the new PRCM protocol defined for new OMAP4 IPs.
  64  */
  65 #define SYSC_TYPE2_SOFTRESET_SHIFT      0
  66 #define SYSC_TYPE2_SOFTRESET_MASK       (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
  67 #define SYSC_TYPE2_SIDLEMODE_SHIFT      2
  68 #define SYSC_TYPE2_SIDLEMODE_MASK       (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
  69 #define SYSC_TYPE2_MIDLEMODE_SHIFT      4
  70 #define SYSC_TYPE2_MIDLEMODE_MASK       (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
  71
  72 /* OCP SYSSTATUS bit shifts/masks */
  73 #define SYSS_RESETDONE_SHIFT            0
  74 #define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
  75
  76 /* Master standby/slave idle mode flags */
  77 #define HWMOD_IDLEMODE_FORCE            (1 << 0)
  78 #define HWMOD_IDLEMODE_NO               (1 << 1)
  79 #define HWMOD_IDLEMODE_SMART            (1 << 2)
  80 #define HWMOD_IDLEMODE_SMART_WKUP       (1 << 3)
  81
  82 /**
  83  * struct omap_hwmod_mux_info - hwmod specific mux configuration
  84  * @pads:              array of omap_device_pad entries
  85  * @nr_pads:           number of omap_device_pad entries
  86  *
  87  * Note that this is currently built during init as needed.
  88  */
  89 struct omap_hwmod_mux_info {
  90         int                             nr_pads;
  91         struct omap_device_pad          *pads;
  92         int                             nr_pads_dynamic;
  93         struct omap_device_pad          **pads_dynamic;
  94         bool                            enabled;
  95 };
  96
  97 /**
  98  * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
  99  * @name: name of the IRQ channel (module local name)
 100  * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
 101  *
 102  * @name should be something short, e.g., "tx" or "rx".  It is for use
 103  * by platform_get_resource_byname().  It is defined locally to the
 104  * hwmod.
 105  */
 106 struct omap_hwmod_irq_info {
 107         const char      *name;
 108         s16             irq;
 109 };
 110
 111 /**
 112  * struct omap_hwmod_dma_info - DMA channels used by the hwmod
 113  * @name: name of the DMA channel (module local name)
 114  * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
 115  *
 116  * @name should be something short, e.g., "tx" or "rx".  It is for use
 117  * by platform_get_resource_byname().  It is defined locally to the
 118  * hwmod.
 119  */
 120 struct omap_hwmod_dma_info {
 121         const char      *name;
 122         s16             dma_req;
 123 };
 124
 125 /**
 126  * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
 127  * @name: name of the reset line (module local name)
 128  * @rst_shift: Offset of the reset bit
 129  * @st_shift: Offset of the reset status bit (OMAP2/3 only)
 130  *
 131  * @name should be something short, e.g., "cpu0" or "rst". It is defined
 132  * locally to the hwmod.
 133  */
 134 struct omap_hwmod_rst_info {
 135         const char      *name;
 136         u8              rst_shift;
 137         u8              st_shift;
 138 };
 139
 140 /**
 141  * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
 142  * @role: "sys", "32k", "tv", etc -- for use in clk_get()
 143  * @clk: opt clock: OMAP clock name
 144  * @_clk: pointer to the struct clk (filled in at runtime)
 145  *
 146  * The module's interface clock and main functional clock should not
 147  * be added as optional clocks.
 148  */
 149 struct omap_hwmod_opt_clk {
 150         const char      *role;
 151         const char      *clk;
 152         struct clk      *_clk;
 153 };
 154
 155
 156 /* omap_hwmod_omap2_firewall.flags bits */
 157 #define OMAP_FIREWALL_L3                (1 << 0)
 158 #define OMAP_FIREWALL_L4                (1 << 1)
 159
 160 /**
 161  * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
 162  * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
 163  * @l4_fw_region: L4 firewall region ID
 164  * @l4_prot_group: L4 protection group ID
 165  * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
 166  */
 167 struct omap_hwmod_omap2_firewall {
 168         u8 l3_perm_bit;
 169         u8 l4_fw_region;
 170         u8 l4_prot_group;
 171         u8 flags;
 172 };
 173
 174
 175 /*
 176  * omap_hwmod_addr_space.flags bits
 177  *
 178  * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
 179  * ADDR_TYPE_RT: Address space contains module register target data.
 180  */
 181 #define ADDR_MAP_ON_INIT        (1 << 0)        /* XXX does not belong */
 182 #define ADDR_TYPE_RT            (1 << 1)
 183
 184 /**
 185  * struct omap_hwmod_addr_space - address space handled by the hwmod
 186  * @name: name of the address space
 187  * @pa_start: starting physical address
 188  * @pa_end: ending physical address
 189  * @flags: (see omap_hwmod_addr_space.flags macros above)
 190  *
 191  * Address space doesn't necessarily follow physical interconnect
 192  * structure.  GPMC is one example.
 193  */
 194 struct omap_hwmod_addr_space {
 195         const char *name;
 196         u32 pa_start;
 197         u32 pa_end;
 198         u8 flags;
 199 };
 200
 201
 202 /*
 203  * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
 204  * interface to interact with the hwmod.  Used to add sleep dependencies
 205  * when the module is enabled or disabled.
 206  */
 207 #define OCP_USER_MPU                    (1 << 0)
 208 #define OCP_USER_SDMA                   (1 << 1)
 209
 210 /* omap_hwmod_ocp_if.flags bits */
 211 #define OCPIF_SWSUP_IDLE                (1 << 0)
 212 #define OCPIF_CAN_BURST                 (1 << 1)
 213
 214 /**
 215  * struct omap_hwmod_ocp_if - OCP interface data
 216  * @master: struct omap_hwmod that initiates OCP transactions on this link
 217  * @slave: struct omap_hwmod that responds to OCP transactions on this link
 218  * @addr: address space associated with this link
 219  * @clk: interface clock: OMAP clock name
 220  * @_clk: pointer to the interface struct clk (filled in at runtime)
 221  * @fw: interface firewall data
 222  * @width: OCP data width
 223  * @user: initiators using this interface (see OCP_USER_* macros above)
 224  * @flags: OCP interface flags (see OCPIF_* macros above)
 225  *
 226  * It may also be useful to add a tag_cnt field for OCP2.x devices.
 227  *
 228  * Parameter names beginning with an underscore are managed internally by
 229  * the omap_hwmod code and should not be set during initialization.
 230  */
 231 struct omap_hwmod_ocp_if {
 232         struct omap_hwmod               *master;
 233         struct omap_hwmod               *slave;
 234         struct omap_hwmod_addr_space    *addr;
 235         const char                      *clk;
 236         struct clk                      *_clk;
 237         union {
 238                 struct omap_hwmod_omap2_firewall omap2;
 239         }                               fw;
 240         u8                              width;
 241         u8                              user;
 242         u8                              flags;
 243 };
 244
 245
 246 /* Macros for use in struct omap_hwmod_sysconfig */
 247
 248 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
 249 #define MASTER_STANDBY_SHIFT    4
 250 #define SLAVE_IDLE_SHIFT        0
 251 #define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
 252 #define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
 253 #define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
 254 #define SIDLE_SMART_WKUP        (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
 255 #define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
 256 #define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
 257 #define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
 258 #define MSTANDBY_SMART_WKUP     (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
 259
 260 /* omap_hwmod_sysconfig.sysc_flags capability flags */
 261 #define SYSC_HAS_AUTOIDLE       (1 << 0)
 262 #define SYSC_HAS_SOFTRESET      (1 << 1)
 263 #define SYSC_HAS_ENAWAKEUP      (1 << 2)
 264 #define SYSC_HAS_EMUFREE        (1 << 3)
 265 #define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
 266 #define SYSC_HAS_SIDLEMODE      (1 << 5)
 267 #define SYSC_HAS_MIDLEMODE      (1 << 6)
 268 #define SYSS_HAS_RESET_STATUS   (1 << 7)
 269 #define SYSC_NO_CACHE           (1 << 8)  /* XXX SW flag, belongs elsewhere */
 270 #define SYSC_HAS_RESET_STATUS   (1 << 9)
 271
 272 /* omap_hwmod_sysconfig.clockact flags */
 273 #define CLOCKACT_TEST_BOTH      0x0
 274 #define CLOCKACT_TEST_MAIN      0x1
 275 #define CLOCKACT_TEST_ICLK      0x2
 276 #define CLOCKACT_TEST_NONE      0x3
 277
 278 /**
 279  * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
 280  * @midle_shift: Offset of the midle bit
 281  * @clkact_shift: Offset of the clockactivity bit
 282  * @sidle_shift: Offset of the sidle bit
 283  * @enwkup_shift: Offset of the enawakeup bit
 284  * @srst_shift: Offset of the softreset bit
 285  * @autoidle_shift: Offset of the autoidle bit
 286  */
 287 struct omap_hwmod_sysc_fields {
 288         u8 midle_shift;
 289         u8 clkact_shift;
 290         u8 sidle_shift;
 291         u8 enwkup_shift;
 292         u8 srst_shift;
 293         u8 autoidle_shift;
 294 };
 295
 296 /**
 297  * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
 298  * @rev_offs: IP block revision register offset (from module base addr)
 299  * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
 300  * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
 301  * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
 302  * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
 303  * @clockact: the default value of the module CLOCKACTIVITY bits
 304  *
 305  * @clockact describes to the module which clocks are likely to be
 306  * disabled when the PRCM issues its idle request to the module.  Some
 307  * modules have separate clockdomains for the interface clock and main
 308  * functional clock, and can check whether they should acknowledge the
 309  * idle request based on the internal module functionality that has
 310  * been associated with the clocks marked in @clockact.  This field is
 311  * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
 312  *
 313  * @sysc_fields: structure containing the offset positions of various bits in
 314  * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
 315  * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
 316  * whether the device ip is compliant with the original PRCM protocol
 317  * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
 318  * If the device follows a different scheme for the sysconfig register ,
 319  * then this field has to be populated with the correct offset structure.
 320  */
 321 struct omap_hwmod_class_sysconfig {
 322         u16 rev_offs;
 323         u16 sysc_offs;
 324         u16 syss_offs;
 325         u16 sysc_flags;
 326         u8 idlemodes;
 327         u8 clockact;
 328         struct omap_hwmod_sysc_fields *sysc_fields;
 329 };
 330
 331 /**
 332  * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
 333  * @module_offs: PRCM submodule offset from the start of the PRM/CM
 334  * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
 335  * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
 336  * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
 337  * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
 338  * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
 339  *
 340  * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
 341  * WKEN, GRPSEL registers.  In an ideal world, no extra information
 342  * would be needed for IDLEST information, but alas, there are some
 343  * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
 344  * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
 345  */
 346 struct omap_hwmod_omap2_prcm {
 347         s16 module_offs;
 348         u8 prcm_reg_id;
 349         u8 module_bit;
 350         u8 idlest_reg_id;
 351         u8 idlest_idle_bit;
 352         u8 idlest_stdby_bit;
 353 };
 354
 355
 356 /**
 357  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
 358  * @clkctrl_reg: PRCM address of the clock control register
 359  * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
 360  * @submodule_wkdep_bit: bit shift of the WKDEP range
 361  */
 362 struct omap_hwmod_omap4_prcm {
 363         u16             clkctrl_offs;
 364         void __iomem    *rstctrl_reg;
 365         u8              submodule_wkdep_bit;
 366 };
 367
 368
 369 /*
 370  * omap_hwmod.flags definitions
 371  *
 372  * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
 373  *     of idle, rather than relying on module smart-idle
 374  * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
 375  *     of standby, rather than relying on module smart-standby
 376  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
 377  *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
 378  *     XXX Should be HWMOD_SETUP_NO_RESET
 379  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
 380  *     controller, etc. XXX probably belongs outside the main hwmod file
 381  *     XXX Should be HWMOD_SETUP_NO_IDLE
 382  * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
 383  *     when module is enabled, rather than the default, which is to
 384  *     enable autoidle
 385  * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
 386  * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
 387  *     only for few initiator modules on OMAP2 & 3.
 388  * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
 389  *     This is needed for devices like DSS that require optional clocks enabled
 390  *     in order to complete the reset. Optional clocks will be disabled
 391  *     again after the reset.
 392  * HWMOD_16BIT_REG: Module has 16bit registers
 393  */
 394 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 395 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
 396 #define HWMOD_INIT_NO_RESET                     (1 << 2)
 397 #define HWMOD_INIT_NO_IDLE                      (1 << 3)
 398 #define HWMOD_NO_OCP_AUTOIDLE                   (1 << 4)
 399 #define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 5)
 400 #define HWMOD_NO_IDLEST                         (1 << 6)
 401 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 402 #define HWMOD_16BIT_REG                         (1 << 8)
 403
 404 /*
 405  * omap_hwmod._int_flags definitions
 406  * These are for internal use only and are managed by the omap_hwmod code.
 407  *
 408  * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
 409  * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
 410  * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 411  */
 412 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
 413 #define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
 414 #define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
 415
 416 /*
 417  * omap_hwmod._state definitions
 418  *
 419  * INITIALIZED: reset (optionally), initialized, enabled, disabled
 420  *              (optionally)
 421  *
 422  *
 423  */
 424 #define _HWMOD_STATE_UNKNOWN                    0
 425 #define _HWMOD_STATE_REGISTERED                 1
 426 #define _HWMOD_STATE_CLKS_INITED                2
 427 #define _HWMOD_STATE_INITIALIZED                3
 428 #define _HWMOD_STATE_ENABLED                    4
 429 #define _HWMOD_STATE_IDLE                       5
 430 #define _HWMOD_STATE_DISABLED                   6
 431
 432 /**
 433  * struct omap_hwmod_class - the type of an IP block
 434  * @name: name of the hwmod_class
 435  * @sysc: device SYSCONFIG/SYSSTATUS register data
 436  * @rev: revision of the IP class
 437  * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
 438  * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
 439  *
 440  * Represent the class of a OMAP hardware "modules" (e.g. timer,
 441  * smartreflex, gpio, uart...)
 442  *
 443  * @pre_shutdown is a function that will be run immediately before
 444  * hwmod clocks are disabled, etc.  It is intended for use for hwmods
 445  * like the MPU watchdog, which cannot be disabled with the standard
 446  * omap_hwmod_shutdown().  The function should return 0 upon success,
 447  * or some negative error upon failure.  Returning an error will cause
 448  * omap_hwmod_shutdown() to abort the device shutdown and return an
 449  * error.
 450  *
 451  * If @reset is defined, then the function it points to will be
 452  * executed in place of the standard hwmod _reset() code in
 453  * mach-omap2/omap_hwmod.c.  This is needed for IP blocks which have
 454  * unusual reset sequences - usually processor IP blocks like the IVA.
 455  */
 456 struct omap_hwmod_class {
 457         const char                              *name;
 458         struct omap_hwmod_class_sysconfig       *sysc;
 459         u32                                     rev;
 460         int                                     (*pre_shutdown)(struct omap_hwmod *oh);
 461         int                                     (*reset)(struct omap_hwmod *oh);
 462 };
 463
 464 /**
 465  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
 466  * @name: name of the hwmod
 467  * @class: struct omap_hwmod_class * to the class of this hwmod
 468  * @od: struct omap_device currently associated with this hwmod (internal use)
 469  * @mpu_irqs: ptr to an array of MPU IRQs
 470  * @sdma_reqs: ptr to an array of System DMA request IDs
 471  * @prcm: PRCM data pertaining to this hwmod
 472  * @main_clk: main clock: OMAP clock name
 473  * @_clk: pointer to the main struct clk (filled in at runtime)
 474  * @opt_clks: other device clocks that drivers can request (0..*)
 475  * @vdd_name: voltage domain name
 476  * @voltdm: pointer to voltage domain (filled in at runtime)
 477  * @masters: ptr to array of OCP ifs that this hwmod can initiate on
 478  * @slaves: ptr to array of OCP ifs that this hwmod can respond on
 479  * @dev_attr: arbitrary device attributes that can be passed to the driver
 480  * @_sysc_cache: internal-use hwmod flags
 481  * @_mpu_rt_va: cached register target start address (internal use)
 482  * @_mpu_port_index: cached MPU register target slave ID (internal use)
 483  * @opt_clks_cnt: number of @opt_clks
 484  * @master_cnt: number of @master entries
 485  * @slaves_cnt: number of @slave entries
 486  * @response_lat: device OCP response latency (in interface clock cycles)
 487  * @_int_flags: internal-use hwmod flags
 488  * @_state: internal-use hwmod state
 489  * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
 490  * @flags: hwmod flags (documented below)
 491  * @omap_chip: OMAP chips this hwmod is present on
 492  * @_lock: spinlock serializing operations on this hwmod
 493  * @node: list node for hwmod list (internal use)
 494  *
 495  * @main_clk refers to this module's "main clock," which for our
 496  * purposes is defined as "the functional clock needed for register
 497  * accesses to complete."  Modules may not have a main clock if the
 498  * interface clock also serves as a main clock.
 499  *
 500  * Parameter names beginning with an underscore are managed internally by
 501  * the omap_hwmod code and should not be set during initialization.
 502  */
 503 struct omap_hwmod {
 504         const char                      *name;
 505         struct omap_hwmod_class         *class;
 506         struct omap_device              *od;
 507         struct omap_hwmod_mux_info      *mux;
 508         struct omap_hwmod_irq_info      *mpu_irqs;
 509         struct omap_hwmod_dma_info      *sdma_reqs;
 510         struct omap_hwmod_rst_info      *rst_lines;
 511         union {
 512                 struct omap_hwmod_omap2_prcm omap2;
 513                 struct omap_hwmod_omap4_prcm omap4;
 514         }                               prcm;
 515         const char                      *main_clk;
 516         struct clk                      *_clk;
 517         struct omap_hwmod_opt_clk       *opt_clks;
 518         char                            *clkdm_name;
 519         struct clockdomain              *clkdm;
 520         char                            *vdd_name;
 521         struct voltagedomain            *voltdm;
 522         struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
 523         struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
 524         void                            *dev_attr;
 525         u32                             _sysc_cache;
 526         void __iomem                    *_mpu_rt_va;
 527         spinlock_t                      _lock;
 528         struct list_head                node;
 529         u16                             flags;
 530         u8                              _mpu_port_index;
 531         u8                              response_lat;
 532         u8                              rst_lines_cnt;
 533         u8                              opt_clks_cnt;
 534         u8                              masters_cnt;
 535         u8                              slaves_cnt;
 536         u8                              hwmods_cnt;
 537         u8                              _int_flags;
 538         u8                              _state;
 539         u8                              _postsetup_state;
 540         const struct omap_chip_id       omap_chip;
 541 };
 542
 543 int omap_hwmod_register(struct omap_hwmod **ohs);
 544 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 545 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
 546                         void *data);
 547
 548 int __init omap_hwmod_setup_one(const char *name);
 549
 550 int omap_hwmod_enable(struct omap_hwmod *oh);
 551 int _omap_hwmod_enable(struct omap_hwmod *oh);
 552 int omap_hwmod_idle(struct omap_hwmod *oh);
 553 int _omap_hwmod_idle(struct omap_hwmod *oh);
 554 int omap_hwmod_shutdown(struct omap_hwmod *oh);
 555
 556 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
 557 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
 558 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
 559
 560 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 561 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 562
 563 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
 564 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
 565
 566 int omap_hwmod_reset(struct omap_hwmod *oh);
 567 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
 568
 569 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
 570 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
 571 int omap_hwmod_softreset(struct omap_hwmod *oh);
 572
 573 int omap_hwmod_count_resources(struct omap_hwmod *oh);
 574 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
 575
 576 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
 577 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
 578
 579 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
 580                                  struct omap_hwmod *init_oh);
 581 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
 582                                  struct omap_hwmod *init_oh);
 583
 584 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
 585 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
 586 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
 587 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
 588
 589 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
 590 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
 591
 592 int omap_hwmod_for_each_by_class(const char *classname,
 593                                  int (*fn)(struct omap_hwmod *oh,
 594                                            void *user),
 595                                  void *user);
 596
 597 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
 598 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
 599
 600 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
 601
 602 /*
 603  * Chip variant-specific hwmod init routines - XXX should be converted
 604  * to use initcalls once the initial boot ordering is straightened out
 605  */
 606 extern int omap2420_hwmod_init(void);
 607 extern int omap2430_hwmod_init(void);
 608 extern int omap3xxx_hwmod_init(void);
 609 extern int omap44xx_hwmod_init(void);
 610
 611 #endif