1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
35 #include <media/s5p_hdmi.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
42 #include <mach/hardware.h>
44 #include <mach/irqs.h>
48 #include <plat/devs.h>
51 #include <plat/ehci.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hwmon.h>
56 #include <plat/keypad.h>
58 #include <plat/nand.h>
59 #include <plat/sdhci.h>
62 #include <plat/usb-control.h>
63 #include <plat/usb-phy.h>
64 #include <plat/regs-iic.h>
65 #include <plat/regs-serial.h>
66 #include <plat/regs-spi.h>
67 #include <plat/s3c64xx-spi.h>
69 static u64 samsung_device_dma_mask
= DMA_BIT_MASK(32);
72 #ifdef CONFIG_CPU_S3C2440
73 static struct resource s3c_ac97_resource
[] = {
74 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97
, S3C2440_SZ_AC97
),
75 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97
),
76 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT
, "PCM out"),
77 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN
, "PCM in"),
78 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN
, "Mic in"),
81 struct platform_device s3c_device_ac97
= {
82 .name
= "samsung-ac97",
84 .num_resources
= ARRAY_SIZE(s3c_ac97_resource
),
85 .resource
= s3c_ac97_resource
,
87 .dma_mask
= &samsung_device_dma_mask
,
88 .coherent_dma_mask
= DMA_BIT_MASK(32),
91 #endif /* CONFIG_CPU_S3C2440 */
95 #ifdef CONFIG_PLAT_S3C24XX
96 static struct resource s3c_adc_resource
[] = {
97 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
98 [1] = DEFINE_RES_IRQ(IRQ_TC
),
99 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
102 struct platform_device s3c_device_adc
= {
103 .name
= "s3c24xx-adc",
105 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
106 .resource
= s3c_adc_resource
,
108 #endif /* CONFIG_PLAT_S3C24XX */
110 #if defined(CONFIG_SAMSUNG_DEV_ADC)
111 static struct resource s3c_adc_resource
[] = {
112 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
113 [1] = DEFINE_RES_IRQ(IRQ_TC
),
114 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
117 struct platform_device s3c_device_adc
= {
118 .name
= "samsung-adc",
120 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
121 .resource
= s3c_adc_resource
,
123 #endif /* CONFIG_SAMSUNG_DEV_ADC */
125 /* Camif Controller */
127 #ifdef CONFIG_CPU_S3C2440
128 static struct resource s3c_camif_resource
[] = {
129 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF
, S3C2440_SZ_CAMIF
),
130 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C
),
131 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P
),
134 struct platform_device s3c_device_camif
= {
135 .name
= "s3c2440-camif",
137 .num_resources
= ARRAY_SIZE(s3c_camif_resource
),
138 .resource
= s3c_camif_resource
,
140 .dma_mask
= &samsung_device_dma_mask
,
141 .coherent_dma_mask
= DMA_BIT_MASK(32),
144 #endif /* CONFIG_CPU_S3C2440 */
148 struct platform_device samsung_asoc_dma
= {
149 .name
= "samsung-audio",
152 .dma_mask
= &samsung_device_dma_mask
,
153 .coherent_dma_mask
= DMA_BIT_MASK(32),
157 struct platform_device samsung_asoc_idma
= {
158 .name
= "samsung-idma",
161 .dma_mask
= &samsung_device_dma_mask
,
162 .coherent_dma_mask
= DMA_BIT_MASK(32),
168 #ifdef CONFIG_S3C_DEV_FB
169 static struct resource s3c_fb_resource
[] = {
170 [0] = DEFINE_RES_MEM(S3C_PA_FB
, SZ_16K
),
171 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC
),
172 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO
),
173 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM
),
176 struct platform_device s3c_device_fb
= {
179 .num_resources
= ARRAY_SIZE(s3c_fb_resource
),
180 .resource
= s3c_fb_resource
,
182 .dma_mask
= &samsung_device_dma_mask
,
183 .coherent_dma_mask
= DMA_BIT_MASK(32),
187 void __init
s3c_fb_set_platdata(struct s3c_fb_platdata
*pd
)
189 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
192 #endif /* CONFIG_S3C_DEV_FB */
196 #ifdef CONFIG_S5P_DEV_FIMC0
197 static struct resource s5p_fimc0_resource
[] = {
198 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0
, SZ_4K
),
199 [1] = DEFINE_RES_IRQ(IRQ_FIMC0
),
202 struct platform_device s5p_device_fimc0
= {
205 .num_resources
= ARRAY_SIZE(s5p_fimc0_resource
),
206 .resource
= s5p_fimc0_resource
,
208 .dma_mask
= &samsung_device_dma_mask
,
209 .coherent_dma_mask
= DMA_BIT_MASK(32),
213 struct platform_device s5p_device_fimc_md
= {
214 .name
= "s5p-fimc-md",
217 #endif /* CONFIG_S5P_DEV_FIMC0 */
219 #ifdef CONFIG_S5P_DEV_FIMC1
220 static struct resource s5p_fimc1_resource
[] = {
221 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1
, SZ_4K
),
222 [1] = DEFINE_RES_IRQ(IRQ_FIMC1
),
225 struct platform_device s5p_device_fimc1
= {
228 .num_resources
= ARRAY_SIZE(s5p_fimc1_resource
),
229 .resource
= s5p_fimc1_resource
,
231 .dma_mask
= &samsung_device_dma_mask
,
232 .coherent_dma_mask
= DMA_BIT_MASK(32),
235 #endif /* CONFIG_S5P_DEV_FIMC1 */
237 #ifdef CONFIG_S5P_DEV_FIMC2
238 static struct resource s5p_fimc2_resource
[] = {
239 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2
, SZ_4K
),
240 [1] = DEFINE_RES_IRQ(IRQ_FIMC2
),
243 struct platform_device s5p_device_fimc2
= {
246 .num_resources
= ARRAY_SIZE(s5p_fimc2_resource
),
247 .resource
= s5p_fimc2_resource
,
249 .dma_mask
= &samsung_device_dma_mask
,
250 .coherent_dma_mask
= DMA_BIT_MASK(32),
253 #endif /* CONFIG_S5P_DEV_FIMC2 */
255 #ifdef CONFIG_S5P_DEV_FIMC3
256 static struct resource s5p_fimc3_resource
[] = {
257 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3
, SZ_4K
),
258 [1] = DEFINE_RES_IRQ(IRQ_FIMC3
),
261 struct platform_device s5p_device_fimc3
= {
264 .num_resources
= ARRAY_SIZE(s5p_fimc3_resource
),
265 .resource
= s5p_fimc3_resource
,
267 .dma_mask
= &samsung_device_dma_mask
,
268 .coherent_dma_mask
= DMA_BIT_MASK(32),
271 #endif /* CONFIG_S5P_DEV_FIMC3 */
275 #ifdef CONFIG_S5P_DEV_G2D
276 static struct resource s5p_g2d_resource
[] = {
277 [0] = DEFINE_RES_MEM(S5P_PA_G2D
, SZ_4K
),
278 [1] = DEFINE_RES_IRQ(IRQ_2D
),
281 struct platform_device s5p_device_g2d
= {
284 .num_resources
= ARRAY_SIZE(s5p_g2d_resource
),
285 .resource
= s5p_g2d_resource
,
287 .dma_mask
= &samsung_device_dma_mask
,
288 .coherent_dma_mask
= DMA_BIT_MASK(32),
291 #endif /* CONFIG_S5P_DEV_G2D */
293 #ifdef CONFIG_S5P_DEV_JPEG
294 static struct resource s5p_jpeg_resource
[] = {
295 [0] = DEFINE_RES_MEM(S5P_PA_JPEG
, SZ_4K
),
296 [1] = DEFINE_RES_IRQ(IRQ_JPEG
),
299 struct platform_device s5p_device_jpeg
= {
302 .num_resources
= ARRAY_SIZE(s5p_jpeg_resource
),
303 .resource
= s5p_jpeg_resource
,
305 .dma_mask
= &samsung_device_dma_mask
,
306 .coherent_dma_mask
= DMA_BIT_MASK(32),
309 #endif /* CONFIG_S5P_DEV_JPEG */
313 #ifdef CONFIG_S5P_DEV_FIMD0
314 static struct resource s5p_fimd0_resource
[] = {
315 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0
, SZ_32K
),
316 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC
),
317 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO
),
318 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM
),
321 struct platform_device s5p_device_fimd0
= {
324 .num_resources
= ARRAY_SIZE(s5p_fimd0_resource
),
325 .resource
= s5p_fimd0_resource
,
327 .dma_mask
= &samsung_device_dma_mask
,
328 .coherent_dma_mask
= DMA_BIT_MASK(32),
332 void __init
s5p_fimd0_set_platdata(struct s3c_fb_platdata
*pd
)
334 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
337 #endif /* CONFIG_S5P_DEV_FIMD0 */
341 #ifdef CONFIG_S3C_DEV_HWMON
342 struct platform_device s3c_device_hwmon
= {
345 .dev
.parent
= &s3c_device_adc
.dev
,
348 void __init
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata
*pd
)
350 s3c_set_platdata(pd
, sizeof(struct s3c_hwmon_pdata
),
353 #endif /* CONFIG_S3C_DEV_HWMON */
357 #ifdef CONFIG_S3C_DEV_HSMMC
358 static struct resource s3c_hsmmc_resource
[] = {
359 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0
, SZ_4K
),
360 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0
),
363 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata
= {
365 .host_caps
= (MMC_CAP_4_BIT_DATA
|
366 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
369 struct platform_device s3c_device_hsmmc0
= {
372 .num_resources
= ARRAY_SIZE(s3c_hsmmc_resource
),
373 .resource
= s3c_hsmmc_resource
,
375 .dma_mask
= &samsung_device_dma_mask
,
376 .coherent_dma_mask
= DMA_BIT_MASK(32),
377 .platform_data
= &s3c_hsmmc0_def_platdata
,
381 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
*pd
)
383 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc0_def_platdata
);
385 #endif /* CONFIG_S3C_DEV_HSMMC */
387 #ifdef CONFIG_S3C_DEV_HSMMC1
388 static struct resource s3c_hsmmc1_resource
[] = {
389 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1
, SZ_4K
),
390 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1
),
393 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata
= {
395 .host_caps
= (MMC_CAP_4_BIT_DATA
|
396 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
399 struct platform_device s3c_device_hsmmc1
= {
402 .num_resources
= ARRAY_SIZE(s3c_hsmmc1_resource
),
403 .resource
= s3c_hsmmc1_resource
,
405 .dma_mask
= &samsung_device_dma_mask
,
406 .coherent_dma_mask
= DMA_BIT_MASK(32),
407 .platform_data
= &s3c_hsmmc1_def_platdata
,
411 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
*pd
)
413 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc1_def_platdata
);
415 #endif /* CONFIG_S3C_DEV_HSMMC1 */
419 #ifdef CONFIG_S3C_DEV_HSMMC2
420 static struct resource s3c_hsmmc2_resource
[] = {
421 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2
, SZ_4K
),
422 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2
),
425 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata
= {
427 .host_caps
= (MMC_CAP_4_BIT_DATA
|
428 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
431 struct platform_device s3c_device_hsmmc2
= {
434 .num_resources
= ARRAY_SIZE(s3c_hsmmc2_resource
),
435 .resource
= s3c_hsmmc2_resource
,
437 .dma_mask
= &samsung_device_dma_mask
,
438 .coherent_dma_mask
= DMA_BIT_MASK(32),
439 .platform_data
= &s3c_hsmmc2_def_platdata
,
443 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
*pd
)
445 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc2_def_platdata
);
447 #endif /* CONFIG_S3C_DEV_HSMMC2 */
449 #ifdef CONFIG_S3C_DEV_HSMMC3
450 static struct resource s3c_hsmmc3_resource
[] = {
451 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3
, SZ_4K
),
452 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3
),
455 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata
= {
457 .host_caps
= (MMC_CAP_4_BIT_DATA
|
458 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
461 struct platform_device s3c_device_hsmmc3
= {
464 .num_resources
= ARRAY_SIZE(s3c_hsmmc3_resource
),
465 .resource
= s3c_hsmmc3_resource
,
467 .dma_mask
= &samsung_device_dma_mask
,
468 .coherent_dma_mask
= DMA_BIT_MASK(32),
469 .platform_data
= &s3c_hsmmc3_def_platdata
,
473 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
*pd
)
475 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc3_def_platdata
);
477 #endif /* CONFIG_S3C_DEV_HSMMC3 */
481 static struct resource s3c_i2c0_resource
[] = {
482 [0] = DEFINE_RES_MEM(S3C_PA_IIC
, SZ_4K
),
483 [1] = DEFINE_RES_IRQ(IRQ_IIC
),
486 struct platform_device s3c_device_i2c0
= {
487 .name
= "s3c2410-i2c",
488 #ifdef CONFIG_S3C_DEV_I2C1
493 .num_resources
= ARRAY_SIZE(s3c_i2c0_resource
),
494 .resource
= s3c_i2c0_resource
,
497 struct s3c2410_platform_i2c default_i2c_data __initdata
= {
500 .frequency
= 100*1000,
504 void __init
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c
*pd
)
506 struct s3c2410_platform_i2c
*npd
;
509 pd
= &default_i2c_data
;
513 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
517 npd
->cfg_gpio
= s3c_i2c0_cfg_gpio
;
520 #ifdef CONFIG_S3C_DEV_I2C1
521 static struct resource s3c_i2c1_resource
[] = {
522 [0] = DEFINE_RES_MEM(S3C_PA_IIC1
, SZ_4K
),
523 [1] = DEFINE_RES_IRQ(IRQ_IIC1
),
526 struct platform_device s3c_device_i2c1
= {
527 .name
= "s3c2410-i2c",
529 .num_resources
= ARRAY_SIZE(s3c_i2c1_resource
),
530 .resource
= s3c_i2c1_resource
,
533 void __init
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c
*pd
)
535 struct s3c2410_platform_i2c
*npd
;
538 pd
= &default_i2c_data
;
542 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
546 npd
->cfg_gpio
= s3c_i2c1_cfg_gpio
;
548 #endif /* CONFIG_S3C_DEV_I2C1 */
550 #ifdef CONFIG_S3C_DEV_I2C2
551 static struct resource s3c_i2c2_resource
[] = {
552 [0] = DEFINE_RES_MEM(S3C_PA_IIC2
, SZ_4K
),
553 [1] = DEFINE_RES_IRQ(IRQ_IIC2
),
556 struct platform_device s3c_device_i2c2
= {
557 .name
= "s3c2410-i2c",
559 .num_resources
= ARRAY_SIZE(s3c_i2c2_resource
),
560 .resource
= s3c_i2c2_resource
,
563 void __init
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c
*pd
)
565 struct s3c2410_platform_i2c
*npd
;
568 pd
= &default_i2c_data
;
572 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
576 npd
->cfg_gpio
= s3c_i2c2_cfg_gpio
;
578 #endif /* CONFIG_S3C_DEV_I2C2 */
580 #ifdef CONFIG_S3C_DEV_I2C3
581 static struct resource s3c_i2c3_resource
[] = {
582 [0] = DEFINE_RES_MEM(S3C_PA_IIC3
, SZ_4K
),
583 [1] = DEFINE_RES_IRQ(IRQ_IIC3
),
586 struct platform_device s3c_device_i2c3
= {
587 .name
= "s3c2440-i2c",
589 .num_resources
= ARRAY_SIZE(s3c_i2c3_resource
),
590 .resource
= s3c_i2c3_resource
,
593 void __init
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c
*pd
)
595 struct s3c2410_platform_i2c
*npd
;
598 pd
= &default_i2c_data
;
602 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
606 npd
->cfg_gpio
= s3c_i2c3_cfg_gpio
;
608 #endif /*CONFIG_S3C_DEV_I2C3 */
610 #ifdef CONFIG_S3C_DEV_I2C4
611 static struct resource s3c_i2c4_resource
[] = {
612 [0] = DEFINE_RES_MEM(S3C_PA_IIC4
, SZ_4K
),
613 [1] = DEFINE_RES_IRQ(IRQ_IIC4
),
616 struct platform_device s3c_device_i2c4
= {
617 .name
= "s3c2440-i2c",
619 .num_resources
= ARRAY_SIZE(s3c_i2c4_resource
),
620 .resource
= s3c_i2c4_resource
,
623 void __init
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c
*pd
)
625 struct s3c2410_platform_i2c
*npd
;
628 pd
= &default_i2c_data
;
632 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
636 npd
->cfg_gpio
= s3c_i2c4_cfg_gpio
;
638 #endif /*CONFIG_S3C_DEV_I2C4 */
640 #ifdef CONFIG_S3C_DEV_I2C5
641 static struct resource s3c_i2c5_resource
[] = {
642 [0] = DEFINE_RES_MEM(S3C_PA_IIC5
, SZ_4K
),
643 [1] = DEFINE_RES_IRQ(IRQ_IIC5
),
646 struct platform_device s3c_device_i2c5
= {
647 .name
= "s3c2440-i2c",
649 .num_resources
= ARRAY_SIZE(s3c_i2c5_resource
),
650 .resource
= s3c_i2c5_resource
,
653 void __init
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c
*pd
)
655 struct s3c2410_platform_i2c
*npd
;
658 pd
= &default_i2c_data
;
662 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
666 npd
->cfg_gpio
= s3c_i2c5_cfg_gpio
;
668 #endif /*CONFIG_S3C_DEV_I2C5 */
670 #ifdef CONFIG_S3C_DEV_I2C6
671 static struct resource s3c_i2c6_resource
[] = {
672 [0] = DEFINE_RES_MEM(S3C_PA_IIC6
, SZ_4K
),
673 [1] = DEFINE_RES_IRQ(IRQ_IIC6
),
676 struct platform_device s3c_device_i2c6
= {
677 .name
= "s3c2440-i2c",
679 .num_resources
= ARRAY_SIZE(s3c_i2c6_resource
),
680 .resource
= s3c_i2c6_resource
,
683 void __init
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c
*pd
)
685 struct s3c2410_platform_i2c
*npd
;
688 pd
= &default_i2c_data
;
692 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
696 npd
->cfg_gpio
= s3c_i2c6_cfg_gpio
;
698 #endif /* CONFIG_S3C_DEV_I2C6 */
700 #ifdef CONFIG_S3C_DEV_I2C7
701 static struct resource s3c_i2c7_resource
[] = {
702 [0] = DEFINE_RES_MEM(S3C_PA_IIC7
, SZ_4K
),
703 [1] = DEFINE_RES_IRQ(IRQ_IIC7
),
706 struct platform_device s3c_device_i2c7
= {
707 .name
= "s3c2440-i2c",
709 .num_resources
= ARRAY_SIZE(s3c_i2c7_resource
),
710 .resource
= s3c_i2c7_resource
,
713 void __init
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c
*pd
)
715 struct s3c2410_platform_i2c
*npd
;
718 pd
= &default_i2c_data
;
722 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
726 npd
->cfg_gpio
= s3c_i2c7_cfg_gpio
;
728 #endif /* CONFIG_S3C_DEV_I2C7 */
732 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
733 static struct resource s5p_i2c_resource
[] = {
734 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY
, SZ_4K
),
735 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY
),
738 struct platform_device s5p_device_i2c_hdmiphy
= {
739 .name
= "s3c2440-hdmiphy-i2c",
741 .num_resources
= ARRAY_SIZE(s5p_i2c_resource
),
742 .resource
= s5p_i2c_resource
,
745 void __init
s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c
*pd
)
747 struct s3c2410_platform_i2c
*npd
;
750 pd
= &default_i2c_data
;
752 if (soc_is_exynos4210() ||
753 soc_is_exynos4212() || soc_is_exynos4412())
755 else if (soc_is_s5pv210())
761 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
762 &s5p_device_i2c_hdmiphy
);
765 struct s5p_hdmi_platform_data s5p_hdmi_def_platdata
;
767 void __init
s5p_hdmi_set_platdata(struct i2c_board_info
*hdmiphy_info
,
768 struct i2c_board_info
*mhl_info
, int mhl_bus
)
770 struct s5p_hdmi_platform_data
*pd
= &s5p_hdmi_def_platdata
;
772 if (soc_is_exynos4210() ||
773 soc_is_exynos4212() || soc_is_exynos4412())
775 else if (soc_is_s5pv210())
780 pd
->hdmiphy_info
= hdmiphy_info
;
781 pd
->mhl_info
= mhl_info
;
782 pd
->mhl_bus
= mhl_bus
;
784 s3c_set_platdata(pd
, sizeof(struct s5p_hdmi_platform_data
),
788 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
792 #ifdef CONFIG_PLAT_S3C24XX
793 static struct resource s3c_iis_resource
[] = {
794 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS
, S3C24XX_SZ_IIS
),
797 struct platform_device s3c_device_iis
= {
798 .name
= "s3c24xx-iis",
800 .num_resources
= ARRAY_SIZE(s3c_iis_resource
),
801 .resource
= s3c_iis_resource
,
803 .dma_mask
= &samsung_device_dma_mask
,
804 .coherent_dma_mask
= DMA_BIT_MASK(32),
807 #endif /* CONFIG_PLAT_S3C24XX */
811 #ifdef CONFIG_SAMSUNG_DEV_IDE
812 static struct resource s3c_cfcon_resource
[] = {
813 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON
, SZ_16K
),
814 [1] = DEFINE_RES_IRQ(IRQ_CFCON
),
817 struct platform_device s3c_device_cfcon
= {
819 .num_resources
= ARRAY_SIZE(s3c_cfcon_resource
),
820 .resource
= s3c_cfcon_resource
,
823 void __init
s3c_ide_set_platdata(struct s3c_ide_platdata
*pdata
)
825 s3c_set_platdata(pdata
, sizeof(struct s3c_ide_platdata
),
828 #endif /* CONFIG_SAMSUNG_DEV_IDE */
832 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
833 static struct resource samsung_keypad_resources
[] = {
834 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD
, SZ_32
),
835 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD
),
838 struct platform_device samsung_device_keypad
= {
839 .name
= "samsung-keypad",
841 .num_resources
= ARRAY_SIZE(samsung_keypad_resources
),
842 .resource
= samsung_keypad_resources
,
845 void __init
samsung_keypad_set_platdata(struct samsung_keypad_platdata
*pd
)
847 struct samsung_keypad_platdata
*npd
;
849 npd
= s3c_set_platdata(pd
, sizeof(struct samsung_keypad_platdata
),
850 &samsung_device_keypad
);
853 npd
->cfg_gpio
= samsung_keypad_cfg_gpio
;
855 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
859 #ifdef CONFIG_PLAT_S3C24XX
860 static struct resource s3c_lcd_resource
[] = {
861 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD
, S3C24XX_SZ_LCD
),
862 [1] = DEFINE_RES_IRQ(IRQ_LCD
),
865 struct platform_device s3c_device_lcd
= {
866 .name
= "s3c2410-lcd",
868 .num_resources
= ARRAY_SIZE(s3c_lcd_resource
),
869 .resource
= s3c_lcd_resource
,
871 .dma_mask
= &samsung_device_dma_mask
,
872 .coherent_dma_mask
= DMA_BIT_MASK(32),
876 void __init
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info
*pd
)
878 struct s3c2410fb_mach_info
*npd
;
880 npd
= s3c_set_platdata(pd
, sizeof(*npd
), &s3c_device_lcd
);
882 npd
->displays
= kmemdup(pd
->displays
,
883 sizeof(struct s3c2410fb_display
) * npd
->num_displays
,
886 printk(KERN_ERR
"no memory for LCD display data\n");
888 printk(KERN_ERR
"no memory for LCD platform data\n");
891 #endif /* CONFIG_PLAT_S3C24XX */
895 #ifdef CONFIG_S5P_DEV_MFC
896 static struct resource s5p_mfc_resource
[] = {
897 [0] = DEFINE_RES_MEM(S5P_PA_MFC
, SZ_64K
),
898 [1] = DEFINE_RES_IRQ(IRQ_MFC
),
901 struct platform_device s5p_device_mfc
= {
904 .num_resources
= ARRAY_SIZE(s5p_mfc_resource
),
905 .resource
= s5p_mfc_resource
,
909 * MFC hardware has 2 memory interfaces which are modelled as two separate
910 * platform devices to let dma-mapping distinguish between them.
912 * MFC parent device (s5p_device_mfc) must be registered before memory
913 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
916 struct platform_device s5p_device_mfc_l
= {
920 .parent
= &s5p_device_mfc
.dev
,
921 .dma_mask
= &samsung_device_dma_mask
,
922 .coherent_dma_mask
= DMA_BIT_MASK(32),
926 struct platform_device s5p_device_mfc_r
= {
930 .parent
= &s5p_device_mfc
.dev
,
931 .dma_mask
= &samsung_device_dma_mask
,
932 .coherent_dma_mask
= DMA_BIT_MASK(32),
935 #endif /* CONFIG_S5P_DEV_MFC */
939 #ifdef CONFIG_S5P_DEV_CSIS0
940 static struct resource s5p_mipi_csis0_resource
[] = {
941 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0
, SZ_16K
),
942 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0
),
945 struct platform_device s5p_device_mipi_csis0
= {
946 .name
= "s5p-mipi-csis",
948 .num_resources
= ARRAY_SIZE(s5p_mipi_csis0_resource
),
949 .resource
= s5p_mipi_csis0_resource
,
951 #endif /* CONFIG_S5P_DEV_CSIS0 */
953 #ifdef CONFIG_S5P_DEV_CSIS1
954 static struct resource s5p_mipi_csis1_resource
[] = {
955 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1
, SZ_16K
),
956 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1
),
959 struct platform_device s5p_device_mipi_csis1
= {
960 .name
= "s5p-mipi-csis",
962 .num_resources
= ARRAY_SIZE(s5p_mipi_csis1_resource
),
963 .resource
= s5p_mipi_csis1_resource
,
969 #ifdef CONFIG_S3C_DEV_NAND
970 static struct resource s3c_nand_resource
[] = {
971 [0] = DEFINE_RES_MEM(S3C_PA_NAND
, SZ_1M
),
974 struct platform_device s3c_device_nand
= {
975 .name
= "s3c2410-nand",
977 .num_resources
= ARRAY_SIZE(s3c_nand_resource
),
978 .resource
= s3c_nand_resource
,
982 * s3c_nand_copy_set() - copy nand set data
983 * @set: The new structure, directly copied from the old.
985 * Copy all the fields from the NAND set field from what is probably __initdata
986 * to new kernel memory. The code returns 0 if the copy happened correctly or
987 * an error code for the calling function to display.
989 * Note, we currently do not try and look to see if we've already copied the
990 * data in a previous set.
992 static int __init
s3c_nand_copy_set(struct s3c2410_nand_set
*set
)
997 size
= sizeof(struct mtd_partition
) * set
->nr_partitions
;
999 ptr
= kmemdup(set
->partitions
, size
, GFP_KERNEL
);
1000 set
->partitions
= ptr
;
1006 if (set
->nr_map
&& set
->nr_chips
) {
1007 size
= sizeof(int) * set
->nr_chips
;
1008 ptr
= kmemdup(set
->nr_map
, size
, GFP_KERNEL
);
1015 if (set
->ecc_layout
) {
1016 ptr
= kmemdup(set
->ecc_layout
,
1017 sizeof(struct nand_ecclayout
), GFP_KERNEL
);
1018 set
->ecc_layout
= ptr
;
1027 void __init
s3c_nand_set_platdata(struct s3c2410_platform_nand
*nand
)
1029 struct s3c2410_platform_nand
*npd
;
1033 /* note, if we get a failure in allocation, we simply drop out of the
1034 * function. If there is so little memory available at initialisation
1035 * time then there is little chance the system is going to run.
1038 npd
= s3c_set_platdata(nand
, sizeof(struct s3c2410_platform_nand
),
1043 /* now see if we need to copy any of the nand set data */
1045 size
= sizeof(struct s3c2410_nand_set
) * npd
->nr_sets
;
1047 struct s3c2410_nand_set
*from
= npd
->sets
;
1048 struct s3c2410_nand_set
*to
;
1051 to
= kmemdup(from
, size
, GFP_KERNEL
);
1052 npd
->sets
= to
; /* set, even if we failed */
1055 printk(KERN_ERR
"%s: no memory for sets\n", __func__
);
1059 for (i
= 0; i
< npd
->nr_sets
; i
++) {
1060 ret
= s3c_nand_copy_set(to
);
1062 printk(KERN_ERR
"%s: failed to copy set %d\n",
1070 #endif /* CONFIG_S3C_DEV_NAND */
1074 #ifdef CONFIG_S3C_DEV_ONENAND
1075 static struct resource s3c_onenand_resources
[] = {
1076 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND
, SZ_1K
),
1077 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF
, S3C_SZ_ONENAND_BUF
),
1078 [2] = DEFINE_RES_IRQ(IRQ_ONENAND
),
1081 struct platform_device s3c_device_onenand
= {
1082 .name
= "samsung-onenand",
1084 .num_resources
= ARRAY_SIZE(s3c_onenand_resources
),
1085 .resource
= s3c_onenand_resources
,
1087 #endif /* CONFIG_S3C_DEV_ONENAND */
1089 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1090 static struct resource s3c64xx_onenand1_resources
[] = {
1091 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1
, SZ_1K
),
1092 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF
, S3C64XX_SZ_ONENAND1_BUF
),
1093 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1
),
1096 struct platform_device s3c64xx_device_onenand1
= {
1097 .name
= "samsung-onenand",
1099 .num_resources
= ARRAY_SIZE(s3c64xx_onenand1_resources
),
1100 .resource
= s3c64xx_onenand1_resources
,
1103 void __init
s3c64xx_onenand1_set_platdata(struct onenand_platform_data
*pdata
)
1105 s3c_set_platdata(pdata
, sizeof(struct onenand_platform_data
),
1106 &s3c64xx_device_onenand1
);
1108 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1110 #ifdef CONFIG_S5P_DEV_ONENAND
1111 static struct resource s5p_onenand_resources
[] = {
1112 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND
, SZ_128K
),
1113 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA
, SZ_8K
),
1114 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI
),
1117 struct platform_device s5p_device_onenand
= {
1118 .name
= "s5pc110-onenand",
1120 .num_resources
= ARRAY_SIZE(s5p_onenand_resources
),
1121 .resource
= s5p_onenand_resources
,
1123 #endif /* CONFIG_S5P_DEV_ONENAND */
1127 #ifdef CONFIG_PLAT_S5P
1128 static struct resource s5p_pmu_resource
[] = {
1129 DEFINE_RES_IRQ(IRQ_PMU
)
1132 static struct platform_device s5p_device_pmu
= {
1135 .num_resources
= ARRAY_SIZE(s5p_pmu_resource
),
1136 .resource
= s5p_pmu_resource
,
1139 static int __init
s5p_pmu_init(void)
1141 platform_device_register(&s5p_device_pmu
);
1144 arch_initcall(s5p_pmu_init
);
1145 #endif /* CONFIG_PLAT_S5P */
1149 #ifdef CONFIG_SAMSUNG_DEV_PWM
1151 #define TIMER_RESOURCE_SIZE (1)
1153 #define TIMER_RESOURCE(_tmr, _irq) \
1154 (struct resource [TIMER_RESOURCE_SIZE]) { \
1158 .flags = IORESOURCE_IRQ \
1162 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1163 .name = "s3c24xx-pwm", \
1165 .num_resources = TIMER_RESOURCE_SIZE, \
1166 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1169 * since we already have an static mapping for the timer,
1170 * we do not bother setting any IO resource for the base.
1173 struct platform_device s3c_device_timer
[] = {
1174 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0
) },
1175 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1
) },
1176 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2
) },
1177 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3
) },
1178 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4
) },
1180 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1184 #ifdef CONFIG_PLAT_S3C24XX
1185 static struct resource s3c_rtc_resource
[] = {
1186 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC
, SZ_256
),
1187 [1] = DEFINE_RES_IRQ(IRQ_RTC
),
1188 [2] = DEFINE_RES_IRQ(IRQ_TICK
),
1191 struct platform_device s3c_device_rtc
= {
1192 .name
= "s3c2410-rtc",
1194 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1195 .resource
= s3c_rtc_resource
,
1197 #endif /* CONFIG_PLAT_S3C24XX */
1199 #ifdef CONFIG_S3C_DEV_RTC
1200 static struct resource s3c_rtc_resource
[] = {
1201 [0] = DEFINE_RES_MEM(S3C_PA_RTC
, SZ_256
),
1202 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM
),
1203 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC
),
1206 struct platform_device s3c_device_rtc
= {
1207 .name
= "s3c64xx-rtc",
1209 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1210 .resource
= s3c_rtc_resource
,
1212 #endif /* CONFIG_S3C_DEV_RTC */
1216 #ifdef CONFIG_PLAT_S3C24XX
1217 static struct resource s3c_sdi_resource
[] = {
1218 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI
, S3C24XX_SZ_SDI
),
1219 [1] = DEFINE_RES_IRQ(IRQ_SDI
),
1222 struct platform_device s3c_device_sdi
= {
1223 .name
= "s3c2410-sdi",
1225 .num_resources
= ARRAY_SIZE(s3c_sdi_resource
),
1226 .resource
= s3c_sdi_resource
,
1229 void __init
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata
*pdata
)
1231 s3c_set_platdata(pdata
, sizeof(struct s3c24xx_mci_pdata
),
1234 #endif /* CONFIG_PLAT_S3C24XX */
1238 #ifdef CONFIG_PLAT_S3C24XX
1239 static struct resource s3c_spi0_resource
[] = {
1240 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI
, SZ_32
),
1241 [1] = DEFINE_RES_IRQ(IRQ_SPI0
),
1244 struct platform_device s3c_device_spi0
= {
1245 .name
= "s3c2410-spi",
1247 .num_resources
= ARRAY_SIZE(s3c_spi0_resource
),
1248 .resource
= s3c_spi0_resource
,
1250 .dma_mask
= &samsung_device_dma_mask
,
1251 .coherent_dma_mask
= DMA_BIT_MASK(32),
1255 static struct resource s3c_spi1_resource
[] = {
1256 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1
, SZ_32
),
1257 [1] = DEFINE_RES_IRQ(IRQ_SPI1
),
1260 struct platform_device s3c_device_spi1
= {
1261 .name
= "s3c2410-spi",
1263 .num_resources
= ARRAY_SIZE(s3c_spi1_resource
),
1264 .resource
= s3c_spi1_resource
,
1266 .dma_mask
= &samsung_device_dma_mask
,
1267 .coherent_dma_mask
= DMA_BIT_MASK(32),
1270 #endif /* CONFIG_PLAT_S3C24XX */
1274 #ifdef CONFIG_PLAT_S3C24XX
1275 static struct resource s3c_ts_resource
[] = {
1276 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
1277 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1280 struct platform_device s3c_device_ts
= {
1281 .name
= "s3c2410-ts",
1283 .dev
.parent
= &s3c_device_adc
.dev
,
1284 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1285 .resource
= s3c_ts_resource
,
1288 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*hard_s3c2410ts_info
)
1290 s3c_set_platdata(hard_s3c2410ts_info
,
1291 sizeof(struct s3c2410_ts_mach_info
), &s3c_device_ts
);
1293 #endif /* CONFIG_PLAT_S3C24XX */
1295 #ifdef CONFIG_SAMSUNG_DEV_TS
1296 static struct resource s3c_ts_resource
[] = {
1297 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
1298 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1301 static struct s3c2410_ts_mach_info default_ts_data __initdata
= {
1304 .oversampling_shift
= 2,
1307 struct platform_device s3c_device_ts
= {
1308 .name
= "s3c64xx-ts",
1310 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1311 .resource
= s3c_ts_resource
,
1314 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*pd
)
1317 pd
= &default_ts_data
;
1319 s3c_set_platdata(pd
, sizeof(struct s3c2410_ts_mach_info
),
1322 #endif /* CONFIG_SAMSUNG_DEV_TS */
1326 #ifdef CONFIG_S5P_DEV_TV
1328 static struct resource s5p_hdmi_resources
[] = {
1329 [0] = DEFINE_RES_MEM(S5P_PA_HDMI
, SZ_1M
),
1330 [1] = DEFINE_RES_IRQ(IRQ_HDMI
),
1333 struct platform_device s5p_device_hdmi
= {
1336 .num_resources
= ARRAY_SIZE(s5p_hdmi_resources
),
1337 .resource
= s5p_hdmi_resources
,
1340 static struct resource s5p_sdo_resources
[] = {
1341 [0] = DEFINE_RES_MEM(S5P_PA_SDO
, SZ_64K
),
1342 [1] = DEFINE_RES_IRQ(IRQ_SDO
),
1345 struct platform_device s5p_device_sdo
= {
1348 .num_resources
= ARRAY_SIZE(s5p_sdo_resources
),
1349 .resource
= s5p_sdo_resources
,
1352 static struct resource s5p_mixer_resources
[] = {
1353 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER
, SZ_64K
, "mxr"),
1354 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP
, SZ_64K
, "vp"),
1355 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER
, "irq"),
1358 struct platform_device s5p_device_mixer
= {
1359 .name
= "s5p-mixer",
1361 .num_resources
= ARRAY_SIZE(s5p_mixer_resources
),
1362 .resource
= s5p_mixer_resources
,
1364 .dma_mask
= &samsung_device_dma_mask
,
1365 .coherent_dma_mask
= DMA_BIT_MASK(32),
1368 #endif /* CONFIG_S5P_DEV_TV */
1372 #ifdef CONFIG_S3C_DEV_USB_HOST
1373 static struct resource s3c_usb_resource
[] = {
1374 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST
, SZ_256
),
1375 [1] = DEFINE_RES_IRQ(IRQ_USBH
),
1378 struct platform_device s3c_device_ohci
= {
1379 .name
= "s3c2410-ohci",
1381 .num_resources
= ARRAY_SIZE(s3c_usb_resource
),
1382 .resource
= s3c_usb_resource
,
1384 .dma_mask
= &samsung_device_dma_mask
,
1385 .coherent_dma_mask
= DMA_BIT_MASK(32),
1390 * s3c_ohci_set_platdata - initialise OHCI device platform data
1391 * @info: The platform data.
1393 * This call copies the @info passed in and sets the device .platform_data
1394 * field to that copy. The @info is copied so that the original can be marked
1398 void __init
s3c_ohci_set_platdata(struct s3c2410_hcd_info
*info
)
1400 s3c_set_platdata(info
, sizeof(struct s3c2410_hcd_info
),
1403 #endif /* CONFIG_S3C_DEV_USB_HOST */
1405 /* USB Device (Gadget) */
1407 #ifdef CONFIG_PLAT_S3C24XX
1408 static struct resource s3c_usbgadget_resource
[] = {
1409 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV
, S3C24XX_SZ_USBDEV
),
1410 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1413 struct platform_device s3c_device_usbgadget
= {
1414 .name
= "s3c2410-usbgadget",
1416 .num_resources
= ARRAY_SIZE(s3c_usbgadget_resource
),
1417 .resource
= s3c_usbgadget_resource
,
1420 void __init
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info
*pd
)
1422 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usbgadget
);
1424 #endif /* CONFIG_PLAT_S3C24XX */
1426 /* USB EHCI Host Controller */
1428 #ifdef CONFIG_S5P_DEV_USB_EHCI
1429 static struct resource s5p_ehci_resource
[] = {
1430 [0] = DEFINE_RES_MEM(S5P_PA_EHCI
, SZ_256
),
1431 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST
),
1434 struct platform_device s5p_device_ehci
= {
1437 .num_resources
= ARRAY_SIZE(s5p_ehci_resource
),
1438 .resource
= s5p_ehci_resource
,
1440 .dma_mask
= &samsung_device_dma_mask
,
1441 .coherent_dma_mask
= DMA_BIT_MASK(32),
1445 void __init
s5p_ehci_set_platdata(struct s5p_ehci_platdata
*pd
)
1447 struct s5p_ehci_platdata
*npd
;
1449 npd
= s3c_set_platdata(pd
, sizeof(struct s5p_ehci_platdata
),
1453 npd
->phy_init
= s5p_usb_phy_init
;
1455 npd
->phy_exit
= s5p_usb_phy_exit
;
1457 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1461 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1462 static struct resource s3c_usb_hsotg_resources
[] = {
1463 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG
, SZ_128K
),
1464 [1] = DEFINE_RES_IRQ(IRQ_OTG
),
1467 struct platform_device s3c_device_usb_hsotg
= {
1468 .name
= "s3c-hsotg",
1470 .num_resources
= ARRAY_SIZE(s3c_usb_hsotg_resources
),
1471 .resource
= s3c_usb_hsotg_resources
,
1473 .dma_mask
= &samsung_device_dma_mask
,
1474 .coherent_dma_mask
= DMA_BIT_MASK(32),
1478 void __init
s3c_hsotg_set_platdata(struct s3c_hsotg_plat
*pd
)
1480 struct s3c_hsotg_plat
*npd
;
1482 npd
= s3c_set_platdata(pd
, sizeof(struct s3c_hsotg_plat
),
1483 &s3c_device_usb_hsotg
);
1486 npd
->phy_init
= s5p_usb_phy_init
;
1488 npd
->phy_exit
= s5p_usb_phy_exit
;
1490 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1492 /* USB High Spped 2.0 Device (Gadget) */
1494 #ifdef CONFIG_PLAT_S3C24XX
1495 static struct resource s3c_hsudc_resource
[] = {
1496 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC
, S3C2416_SZ_HSUDC
),
1497 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1500 struct platform_device s3c_device_usb_hsudc
= {
1501 .name
= "s3c-hsudc",
1503 .num_resources
= ARRAY_SIZE(s3c_hsudc_resource
),
1504 .resource
= s3c_hsudc_resource
,
1506 .dma_mask
= &samsung_device_dma_mask
,
1507 .coherent_dma_mask
= DMA_BIT_MASK(32),
1511 void __init
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata
*pd
)
1513 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usb_hsudc
);
1515 #endif /* CONFIG_PLAT_S3C24XX */
1519 #ifdef CONFIG_S3C_DEV_WDT
1520 static struct resource s3c_wdt_resource
[] = {
1521 [0] = DEFINE_RES_MEM(S3C_PA_WDT
, SZ_1K
),
1522 [1] = DEFINE_RES_IRQ(IRQ_WDT
),
1525 struct platform_device s3c_device_wdt
= {
1526 .name
= "s3c2410-wdt",
1528 .num_resources
= ARRAY_SIZE(s3c_wdt_resource
),
1529 .resource
= s3c_wdt_resource
,
1531 #endif /* CONFIG_S3C_DEV_WDT */
1533 #ifdef CONFIG_S3C64XX_DEV_SPI0
1534 static struct resource s3c64xx_spi0_resource
[] = {
1535 [0] = DEFINE_RES_MEM(S3C_PA_SPI0
, SZ_256
),
1536 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX
),
1537 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX
),
1538 [3] = DEFINE_RES_IRQ(IRQ_SPI0
),
1541 struct platform_device s3c64xx_device_spi0
= {
1542 .name
= "s3c6410-spi",
1544 .num_resources
= ARRAY_SIZE(s3c64xx_spi0_resource
),
1545 .resource
= s3c64xx_spi0_resource
,
1547 .dma_mask
= &samsung_device_dma_mask
,
1548 .coherent_dma_mask
= DMA_BIT_MASK(32),
1552 void __init
s3c64xx_spi0_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1555 struct s3c64xx_spi_info pd
;
1557 /* Reject invalid configuration */
1558 if (!num_cs
|| src_clk_nr
< 0) {
1559 pr_err("%s: Invalid SPI configuration\n", __func__
);
1564 pd
.src_clk_nr
= src_clk_nr
;
1565 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi0_cfg_gpio
;
1567 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi0
);
1569 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1571 #ifdef CONFIG_S3C64XX_DEV_SPI1
1572 static struct resource s3c64xx_spi1_resource
[] = {
1573 [0] = DEFINE_RES_MEM(S3C_PA_SPI1
, SZ_256
),
1574 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX
),
1575 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX
),
1576 [3] = DEFINE_RES_IRQ(IRQ_SPI1
),
1579 struct platform_device s3c64xx_device_spi1
= {
1580 .name
= "s3c6410-spi",
1582 .num_resources
= ARRAY_SIZE(s3c64xx_spi1_resource
),
1583 .resource
= s3c64xx_spi1_resource
,
1585 .dma_mask
= &samsung_device_dma_mask
,
1586 .coherent_dma_mask
= DMA_BIT_MASK(32),
1590 void __init
s3c64xx_spi1_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1593 /* Reject invalid configuration */
1594 if (!num_cs
|| src_clk_nr
< 0) {
1595 pr_err("%s: Invalid SPI configuration\n", __func__
);
1600 pd
.src_clk_nr
= src_clk_nr
;
1601 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi1_cfg_gpio
;
1603 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi1
);
1605 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1607 #ifdef CONFIG_S3C64XX_DEV_SPI2
1608 static struct resource s3c64xx_spi2_resource
[] = {
1609 [0] = DEFINE_RES_MEM(S3C_PA_SPI2
, SZ_256
),
1610 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX
),
1611 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX
),
1612 [3] = DEFINE_RES_IRQ(IRQ_SPI2
),
1615 struct platform_device s3c64xx_device_spi2
= {
1616 .name
= "s3c6410-spi",
1618 .num_resources
= ARRAY_SIZE(s3c64xx_spi2_resource
),
1619 .resource
= s3c64xx_spi2_resource
,
1621 .dma_mask
= &samsung_device_dma_mask
,
1622 .coherent_dma_mask
= DMA_BIT_MASK(32),
1626 void __init
s3c64xx_spi2_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1629 struct s3c64xx_spi_info pd
;
1631 /* Reject invalid configuration */
1632 if (!num_cs
|| src_clk_nr
< 0) {
1633 pr_err("%s: Invalid SPI configuration\n", __func__
);
1638 pd
.src_clk_nr
= src_clk_nr
;
1639 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi2_cfg_gpio
;
1641 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi2
);
1643 #endif /* CONFIG_S3C64XX_DEV_SPI2 */