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Merge tag 'omap-devel-am33xx-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
34
35 #include <media/s5p_hdmi.h>
36
37 #include <asm/irq.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41
42 #include <mach/hardware.h>
43 #include <mach/dma.h>
44 #include <mach/irqs.h>
45 #include <mach/map.h>
46
47 #include <plat/cpu.h>
48 #include <plat/devs.h>
49 #include <plat/adc.h>
50 #include <plat/ata.h>
51 #include <plat/ehci.h>
52 #include <plat/fb.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hwmon.h>
55 #include <plat/iic.h>
56 #include <plat/keypad.h>
57 #include <plat/mci.h>
58 #include <plat/nand.h>
59 #include <plat/sdhci.h>
60 #include <plat/ts.h>
61 #include <plat/udc.h>
62 #include <plat/usb-control.h>
63 #include <plat/usb-phy.h>
64 #include <plat/regs-iic.h>
65 #include <plat/regs-serial.h>
66 #include <plat/regs-spi.h>
67 #include <plat/s3c64xx-spi.h>
68
69 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
70
71 /* AC97 */
72 #ifdef CONFIG_CPU_S3C2440
73 static struct resource s3c_ac97_resource[] = {
74 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
75 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
76 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
77 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
78 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
79 };
80
81 struct platform_device s3c_device_ac97 = {
82 .name = "samsung-ac97",
83 .id = -1,
84 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
85 .resource = s3c_ac97_resource,
86 .dev = {
87 .dma_mask = &samsung_device_dma_mask,
88 .coherent_dma_mask = DMA_BIT_MASK(32),
89 }
90 };
91 #endif /* CONFIG_CPU_S3C2440 */
92
93 /* ADC */
94
95 #ifdef CONFIG_PLAT_S3C24XX
96 static struct resource s3c_adc_resource[] = {
97 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
98 [1] = DEFINE_RES_IRQ(IRQ_TC),
99 [2] = DEFINE_RES_IRQ(IRQ_ADC),
100 };
101
102 struct platform_device s3c_device_adc = {
103 .name = "s3c24xx-adc",
104 .id = -1,
105 .num_resources = ARRAY_SIZE(s3c_adc_resource),
106 .resource = s3c_adc_resource,
107 };
108 #endif /* CONFIG_PLAT_S3C24XX */
109
110 #if defined(CONFIG_SAMSUNG_DEV_ADC)
111 static struct resource s3c_adc_resource[] = {
112 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
113 [1] = DEFINE_RES_IRQ(IRQ_TC),
114 [2] = DEFINE_RES_IRQ(IRQ_ADC),
115 };
116
117 struct platform_device s3c_device_adc = {
118 .name = "samsung-adc",
119 .id = -1,
120 .num_resources = ARRAY_SIZE(s3c_adc_resource),
121 .resource = s3c_adc_resource,
122 };
123 #endif /* CONFIG_SAMSUNG_DEV_ADC */
124
125 /* Camif Controller */
126
127 #ifdef CONFIG_CPU_S3C2440
128 static struct resource s3c_camif_resource[] = {
129 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
130 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
131 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
132 };
133
134 struct platform_device s3c_device_camif = {
135 .name = "s3c2440-camif",
136 .id = -1,
137 .num_resources = ARRAY_SIZE(s3c_camif_resource),
138 .resource = s3c_camif_resource,
139 .dev = {
140 .dma_mask = &samsung_device_dma_mask,
141 .coherent_dma_mask = DMA_BIT_MASK(32),
142 }
143 };
144 #endif /* CONFIG_CPU_S3C2440 */
145
146 /* ASOC DMA */
147
148 struct platform_device samsung_asoc_dma = {
149 .name = "samsung-audio",
150 .id = -1,
151 .dev = {
152 .dma_mask = &samsung_device_dma_mask,
153 .coherent_dma_mask = DMA_BIT_MASK(32),
154 }
155 };
156
157 struct platform_device samsung_asoc_idma = {
158 .name = "samsung-idma",
159 .id = -1,
160 .dev = {
161 .dma_mask = &samsung_device_dma_mask,
162 .coherent_dma_mask = DMA_BIT_MASK(32),
163 }
164 };
165
166 /* FB */
167
168 #ifdef CONFIG_S3C_DEV_FB
169 static struct resource s3c_fb_resource[] = {
170 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
171 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
172 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
173 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
174 };
175
176 struct platform_device s3c_device_fb = {
177 .name = "s3c-fb",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(s3c_fb_resource),
180 .resource = s3c_fb_resource,
181 .dev = {
182 .dma_mask = &samsung_device_dma_mask,
183 .coherent_dma_mask = DMA_BIT_MASK(32),
184 },
185 };
186
187 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
188 {
189 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
190 &s3c_device_fb);
191 }
192 #endif /* CONFIG_S3C_DEV_FB */
193
194 /* FIMC */
195
196 #ifdef CONFIG_S5P_DEV_FIMC0
197 static struct resource s5p_fimc0_resource[] = {
198 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
199 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
200 };
201
202 struct platform_device s5p_device_fimc0 = {
203 .name = "s5p-fimc",
204 .id = 0,
205 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
206 .resource = s5p_fimc0_resource,
207 .dev = {
208 .dma_mask = &samsung_device_dma_mask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
210 },
211 };
212
213 struct platform_device s5p_device_fimc_md = {
214 .name = "s5p-fimc-md",
215 .id = -1,
216 };
217 #endif /* CONFIG_S5P_DEV_FIMC0 */
218
219 #ifdef CONFIG_S5P_DEV_FIMC1
220 static struct resource s5p_fimc1_resource[] = {
221 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
222 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
223 };
224
225 struct platform_device s5p_device_fimc1 = {
226 .name = "s5p-fimc",
227 .id = 1,
228 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
229 .resource = s5p_fimc1_resource,
230 .dev = {
231 .dma_mask = &samsung_device_dma_mask,
232 .coherent_dma_mask = DMA_BIT_MASK(32),
233 },
234 };
235 #endif /* CONFIG_S5P_DEV_FIMC1 */
236
237 #ifdef CONFIG_S5P_DEV_FIMC2
238 static struct resource s5p_fimc2_resource[] = {
239 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
240 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
241 };
242
243 struct platform_device s5p_device_fimc2 = {
244 .name = "s5p-fimc",
245 .id = 2,
246 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
247 .resource = s5p_fimc2_resource,
248 .dev = {
249 .dma_mask = &samsung_device_dma_mask,
250 .coherent_dma_mask = DMA_BIT_MASK(32),
251 },
252 };
253 #endif /* CONFIG_S5P_DEV_FIMC2 */
254
255 #ifdef CONFIG_S5P_DEV_FIMC3
256 static struct resource s5p_fimc3_resource[] = {
257 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
258 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
259 };
260
261 struct platform_device s5p_device_fimc3 = {
262 .name = "s5p-fimc",
263 .id = 3,
264 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
265 .resource = s5p_fimc3_resource,
266 .dev = {
267 .dma_mask = &samsung_device_dma_mask,
268 .coherent_dma_mask = DMA_BIT_MASK(32),
269 },
270 };
271 #endif /* CONFIG_S5P_DEV_FIMC3 */
272
273 /* G2D */
274
275 #ifdef CONFIG_S5P_DEV_G2D
276 static struct resource s5p_g2d_resource[] = {
277 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
278 [1] = DEFINE_RES_IRQ(IRQ_2D),
279 };
280
281 struct platform_device s5p_device_g2d = {
282 .name = "s5p-g2d",
283 .id = 0,
284 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
285 .resource = s5p_g2d_resource,
286 .dev = {
287 .dma_mask = &samsung_device_dma_mask,
288 .coherent_dma_mask = DMA_BIT_MASK(32),
289 },
290 };
291 #endif /* CONFIG_S5P_DEV_G2D */
292
293 #ifdef CONFIG_S5P_DEV_JPEG
294 static struct resource s5p_jpeg_resource[] = {
295 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
296 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
297 };
298
299 struct platform_device s5p_device_jpeg = {
300 .name = "s5p-jpeg",
301 .id = 0,
302 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
303 .resource = s5p_jpeg_resource,
304 .dev = {
305 .dma_mask = &samsung_device_dma_mask,
306 .coherent_dma_mask = DMA_BIT_MASK(32),
307 },
308 };
309 #endif /* CONFIG_S5P_DEV_JPEG */
310
311 /* FIMD0 */
312
313 #ifdef CONFIG_S5P_DEV_FIMD0
314 static struct resource s5p_fimd0_resource[] = {
315 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
316 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
317 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
318 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
319 };
320
321 struct platform_device s5p_device_fimd0 = {
322 .name = "s5p-fb",
323 .id = 0,
324 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
325 .resource = s5p_fimd0_resource,
326 .dev = {
327 .dma_mask = &samsung_device_dma_mask,
328 .coherent_dma_mask = DMA_BIT_MASK(32),
329 },
330 };
331
332 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
333 {
334 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
335 &s5p_device_fimd0);
336 }
337 #endif /* CONFIG_S5P_DEV_FIMD0 */
338
339 /* HWMON */
340
341 #ifdef CONFIG_S3C_DEV_HWMON
342 struct platform_device s3c_device_hwmon = {
343 .name = "s3c-hwmon",
344 .id = -1,
345 .dev.parent = &s3c_device_adc.dev,
346 };
347
348 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
349 {
350 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
351 &s3c_device_hwmon);
352 }
353 #endif /* CONFIG_S3C_DEV_HWMON */
354
355 /* HSMMC */
356
357 #ifdef CONFIG_S3C_DEV_HSMMC
358 static struct resource s3c_hsmmc_resource[] = {
359 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
360 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
361 };
362
363 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
364 .max_width = 4,
365 .host_caps = (MMC_CAP_4_BIT_DATA |
366 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
367 };
368
369 struct platform_device s3c_device_hsmmc0 = {
370 .name = "s3c-sdhci",
371 .id = 0,
372 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
373 .resource = s3c_hsmmc_resource,
374 .dev = {
375 .dma_mask = &samsung_device_dma_mask,
376 .coherent_dma_mask = DMA_BIT_MASK(32),
377 .platform_data = &s3c_hsmmc0_def_platdata,
378 },
379 };
380
381 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
382 {
383 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
384 }
385 #endif /* CONFIG_S3C_DEV_HSMMC */
386
387 #ifdef CONFIG_S3C_DEV_HSMMC1
388 static struct resource s3c_hsmmc1_resource[] = {
389 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
390 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
391 };
392
393 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
394 .max_width = 4,
395 .host_caps = (MMC_CAP_4_BIT_DATA |
396 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
397 };
398
399 struct platform_device s3c_device_hsmmc1 = {
400 .name = "s3c-sdhci",
401 .id = 1,
402 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
403 .resource = s3c_hsmmc1_resource,
404 .dev = {
405 .dma_mask = &samsung_device_dma_mask,
406 .coherent_dma_mask = DMA_BIT_MASK(32),
407 .platform_data = &s3c_hsmmc1_def_platdata,
408 },
409 };
410
411 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
412 {
413 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
414 }
415 #endif /* CONFIG_S3C_DEV_HSMMC1 */
416
417 /* HSMMC2 */
418
419 #ifdef CONFIG_S3C_DEV_HSMMC2
420 static struct resource s3c_hsmmc2_resource[] = {
421 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
422 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
423 };
424
425 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
426 .max_width = 4,
427 .host_caps = (MMC_CAP_4_BIT_DATA |
428 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
429 };
430
431 struct platform_device s3c_device_hsmmc2 = {
432 .name = "s3c-sdhci",
433 .id = 2,
434 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
435 .resource = s3c_hsmmc2_resource,
436 .dev = {
437 .dma_mask = &samsung_device_dma_mask,
438 .coherent_dma_mask = DMA_BIT_MASK(32),
439 .platform_data = &s3c_hsmmc2_def_platdata,
440 },
441 };
442
443 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
444 {
445 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
446 }
447 #endif /* CONFIG_S3C_DEV_HSMMC2 */
448
449 #ifdef CONFIG_S3C_DEV_HSMMC3
450 static struct resource s3c_hsmmc3_resource[] = {
451 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
452 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
453 };
454
455 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
456 .max_width = 4,
457 .host_caps = (MMC_CAP_4_BIT_DATA |
458 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
459 };
460
461 struct platform_device s3c_device_hsmmc3 = {
462 .name = "s3c-sdhci",
463 .id = 3,
464 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
465 .resource = s3c_hsmmc3_resource,
466 .dev = {
467 .dma_mask = &samsung_device_dma_mask,
468 .coherent_dma_mask = DMA_BIT_MASK(32),
469 .platform_data = &s3c_hsmmc3_def_platdata,
470 },
471 };
472
473 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
474 {
475 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
476 }
477 #endif /* CONFIG_S3C_DEV_HSMMC3 */
478
479 /* I2C */
480
481 static struct resource s3c_i2c0_resource[] = {
482 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
483 [1] = DEFINE_RES_IRQ(IRQ_IIC),
484 };
485
486 struct platform_device s3c_device_i2c0 = {
487 .name = "s3c2410-i2c",
488 #ifdef CONFIG_S3C_DEV_I2C1
489 .id = 0,
490 #else
491 .id = -1,
492 #endif
493 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
494 .resource = s3c_i2c0_resource,
495 };
496
497 struct s3c2410_platform_i2c default_i2c_data __initdata = {
498 .flags = 0,
499 .slave_addr = 0x10,
500 .frequency = 100*1000,
501 .sda_delay = 100,
502 };
503
504 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
505 {
506 struct s3c2410_platform_i2c *npd;
507
508 if (!pd) {
509 pd = &default_i2c_data;
510 pd->bus_num = 0;
511 }
512
513 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
514 &s3c_device_i2c0);
515
516 if (!npd->cfg_gpio)
517 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
518 }
519
520 #ifdef CONFIG_S3C_DEV_I2C1
521 static struct resource s3c_i2c1_resource[] = {
522 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
523 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
524 };
525
526 struct platform_device s3c_device_i2c1 = {
527 .name = "s3c2410-i2c",
528 .id = 1,
529 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
530 .resource = s3c_i2c1_resource,
531 };
532
533 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
534 {
535 struct s3c2410_platform_i2c *npd;
536
537 if (!pd) {
538 pd = &default_i2c_data;
539 pd->bus_num = 1;
540 }
541
542 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
543 &s3c_device_i2c1);
544
545 if (!npd->cfg_gpio)
546 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
547 }
548 #endif /* CONFIG_S3C_DEV_I2C1 */
549
550 #ifdef CONFIG_S3C_DEV_I2C2
551 static struct resource s3c_i2c2_resource[] = {
552 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
553 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
554 };
555
556 struct platform_device s3c_device_i2c2 = {
557 .name = "s3c2410-i2c",
558 .id = 2,
559 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
560 .resource = s3c_i2c2_resource,
561 };
562
563 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
564 {
565 struct s3c2410_platform_i2c *npd;
566
567 if (!pd) {
568 pd = &default_i2c_data;
569 pd->bus_num = 2;
570 }
571
572 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
573 &s3c_device_i2c2);
574
575 if (!npd->cfg_gpio)
576 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
577 }
578 #endif /* CONFIG_S3C_DEV_I2C2 */
579
580 #ifdef CONFIG_S3C_DEV_I2C3
581 static struct resource s3c_i2c3_resource[] = {
582 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
583 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
584 };
585
586 struct platform_device s3c_device_i2c3 = {
587 .name = "s3c2440-i2c",
588 .id = 3,
589 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
590 .resource = s3c_i2c3_resource,
591 };
592
593 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
594 {
595 struct s3c2410_platform_i2c *npd;
596
597 if (!pd) {
598 pd = &default_i2c_data;
599 pd->bus_num = 3;
600 }
601
602 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
603 &s3c_device_i2c3);
604
605 if (!npd->cfg_gpio)
606 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
607 }
608 #endif /*CONFIG_S3C_DEV_I2C3 */
609
610 #ifdef CONFIG_S3C_DEV_I2C4
611 static struct resource s3c_i2c4_resource[] = {
612 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
613 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
614 };
615
616 struct platform_device s3c_device_i2c4 = {
617 .name = "s3c2440-i2c",
618 .id = 4,
619 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
620 .resource = s3c_i2c4_resource,
621 };
622
623 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
624 {
625 struct s3c2410_platform_i2c *npd;
626
627 if (!pd) {
628 pd = &default_i2c_data;
629 pd->bus_num = 4;
630 }
631
632 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
633 &s3c_device_i2c4);
634
635 if (!npd->cfg_gpio)
636 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
637 }
638 #endif /*CONFIG_S3C_DEV_I2C4 */
639
640 #ifdef CONFIG_S3C_DEV_I2C5
641 static struct resource s3c_i2c5_resource[] = {
642 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
643 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
644 };
645
646 struct platform_device s3c_device_i2c5 = {
647 .name = "s3c2440-i2c",
648 .id = 5,
649 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
650 .resource = s3c_i2c5_resource,
651 };
652
653 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
654 {
655 struct s3c2410_platform_i2c *npd;
656
657 if (!pd) {
658 pd = &default_i2c_data;
659 pd->bus_num = 5;
660 }
661
662 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
663 &s3c_device_i2c5);
664
665 if (!npd->cfg_gpio)
666 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
667 }
668 #endif /*CONFIG_S3C_DEV_I2C5 */
669
670 #ifdef CONFIG_S3C_DEV_I2C6
671 static struct resource s3c_i2c6_resource[] = {
672 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
673 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
674 };
675
676 struct platform_device s3c_device_i2c6 = {
677 .name = "s3c2440-i2c",
678 .id = 6,
679 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
680 .resource = s3c_i2c6_resource,
681 };
682
683 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
684 {
685 struct s3c2410_platform_i2c *npd;
686
687 if (!pd) {
688 pd = &default_i2c_data;
689 pd->bus_num = 6;
690 }
691
692 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
693 &s3c_device_i2c6);
694
695 if (!npd->cfg_gpio)
696 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
697 }
698 #endif /* CONFIG_S3C_DEV_I2C6 */
699
700 #ifdef CONFIG_S3C_DEV_I2C7
701 static struct resource s3c_i2c7_resource[] = {
702 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
703 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
704 };
705
706 struct platform_device s3c_device_i2c7 = {
707 .name = "s3c2440-i2c",
708 .id = 7,
709 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
710 .resource = s3c_i2c7_resource,
711 };
712
713 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
714 {
715 struct s3c2410_platform_i2c *npd;
716
717 if (!pd) {
718 pd = &default_i2c_data;
719 pd->bus_num = 7;
720 }
721
722 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
723 &s3c_device_i2c7);
724
725 if (!npd->cfg_gpio)
726 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
727 }
728 #endif /* CONFIG_S3C_DEV_I2C7 */
729
730 /* I2C HDMIPHY */
731
732 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
733 static struct resource s5p_i2c_resource[] = {
734 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
735 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
736 };
737
738 struct platform_device s5p_device_i2c_hdmiphy = {
739 .name = "s3c2440-hdmiphy-i2c",
740 .id = -1,
741 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
742 .resource = s5p_i2c_resource,
743 };
744
745 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
746 {
747 struct s3c2410_platform_i2c *npd;
748
749 if (!pd) {
750 pd = &default_i2c_data;
751
752 if (soc_is_exynos4210() ||
753 soc_is_exynos4212() || soc_is_exynos4412())
754 pd->bus_num = 8;
755 else if (soc_is_s5pv210())
756 pd->bus_num = 3;
757 else
758 pd->bus_num = 0;
759 }
760
761 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
762 &s5p_device_i2c_hdmiphy);
763 }
764
765 struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
766
767 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
768 struct i2c_board_info *mhl_info, int mhl_bus)
769 {
770 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
771
772 if (soc_is_exynos4210() ||
773 soc_is_exynos4212() || soc_is_exynos4412())
774 pd->hdmiphy_bus = 8;
775 else if (soc_is_s5pv210())
776 pd->hdmiphy_bus = 3;
777 else
778 pd->hdmiphy_bus = 0;
779
780 pd->hdmiphy_info = hdmiphy_info;
781 pd->mhl_info = mhl_info;
782 pd->mhl_bus = mhl_bus;
783
784 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
785 &s5p_device_hdmi);
786 }
787
788 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
789
790 /* I2S */
791
792 #ifdef CONFIG_PLAT_S3C24XX
793 static struct resource s3c_iis_resource[] = {
794 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
795 };
796
797 struct platform_device s3c_device_iis = {
798 .name = "s3c24xx-iis",
799 .id = -1,
800 .num_resources = ARRAY_SIZE(s3c_iis_resource),
801 .resource = s3c_iis_resource,
802 .dev = {
803 .dma_mask = &samsung_device_dma_mask,
804 .coherent_dma_mask = DMA_BIT_MASK(32),
805 }
806 };
807 #endif /* CONFIG_PLAT_S3C24XX */
808
809 /* IDE CFCON */
810
811 #ifdef CONFIG_SAMSUNG_DEV_IDE
812 static struct resource s3c_cfcon_resource[] = {
813 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
814 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
815 };
816
817 struct platform_device s3c_device_cfcon = {
818 .id = 0,
819 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
820 .resource = s3c_cfcon_resource,
821 };
822
823 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
824 {
825 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
826 &s3c_device_cfcon);
827 }
828 #endif /* CONFIG_SAMSUNG_DEV_IDE */
829
830 /* KEYPAD */
831
832 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
833 static struct resource samsung_keypad_resources[] = {
834 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
835 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
836 };
837
838 struct platform_device samsung_device_keypad = {
839 .name = "samsung-keypad",
840 .id = -1,
841 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
842 .resource = samsung_keypad_resources,
843 };
844
845 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
846 {
847 struct samsung_keypad_platdata *npd;
848
849 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
850 &samsung_device_keypad);
851
852 if (!npd->cfg_gpio)
853 npd->cfg_gpio = samsung_keypad_cfg_gpio;
854 }
855 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
856
857 /* LCD Controller */
858
859 #ifdef CONFIG_PLAT_S3C24XX
860 static struct resource s3c_lcd_resource[] = {
861 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
862 [1] = DEFINE_RES_IRQ(IRQ_LCD),
863 };
864
865 struct platform_device s3c_device_lcd = {
866 .name = "s3c2410-lcd",
867 .id = -1,
868 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
869 .resource = s3c_lcd_resource,
870 .dev = {
871 .dma_mask = &samsung_device_dma_mask,
872 .coherent_dma_mask = DMA_BIT_MASK(32),
873 }
874 };
875
876 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
877 {
878 struct s3c2410fb_mach_info *npd;
879
880 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
881 if (npd) {
882 npd->displays = kmemdup(pd->displays,
883 sizeof(struct s3c2410fb_display) * npd->num_displays,
884 GFP_KERNEL);
885 if (!npd->displays)
886 printk(KERN_ERR "no memory for LCD display data\n");
887 } else {
888 printk(KERN_ERR "no memory for LCD platform data\n");
889 }
890 }
891 #endif /* CONFIG_PLAT_S3C24XX */
892
893 /* MFC */
894
895 #ifdef CONFIG_S5P_DEV_MFC
896 static struct resource s5p_mfc_resource[] = {
897 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
898 [1] = DEFINE_RES_IRQ(IRQ_MFC),
899 };
900
901 struct platform_device s5p_device_mfc = {
902 .name = "s5p-mfc",
903 .id = -1,
904 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
905 .resource = s5p_mfc_resource,
906 };
907
908 /*
909 * MFC hardware has 2 memory interfaces which are modelled as two separate
910 * platform devices to let dma-mapping distinguish between them.
911 *
912 * MFC parent device (s5p_device_mfc) must be registered before memory
913 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
914 */
915
916 struct platform_device s5p_device_mfc_l = {
917 .name = "s5p-mfc-l",
918 .id = -1,
919 .dev = {
920 .parent = &s5p_device_mfc.dev,
921 .dma_mask = &samsung_device_dma_mask,
922 .coherent_dma_mask = DMA_BIT_MASK(32),
923 },
924 };
925
926 struct platform_device s5p_device_mfc_r = {
927 .name = "s5p-mfc-r",
928 .id = -1,
929 .dev = {
930 .parent = &s5p_device_mfc.dev,
931 .dma_mask = &samsung_device_dma_mask,
932 .coherent_dma_mask = DMA_BIT_MASK(32),
933 },
934 };
935 #endif /* CONFIG_S5P_DEV_MFC */
936
937 /* MIPI CSIS */
938
939 #ifdef CONFIG_S5P_DEV_CSIS0
940 static struct resource s5p_mipi_csis0_resource[] = {
941 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
942 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
943 };
944
945 struct platform_device s5p_device_mipi_csis0 = {
946 .name = "s5p-mipi-csis",
947 .id = 0,
948 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
949 .resource = s5p_mipi_csis0_resource,
950 };
951 #endif /* CONFIG_S5P_DEV_CSIS0 */
952
953 #ifdef CONFIG_S5P_DEV_CSIS1
954 static struct resource s5p_mipi_csis1_resource[] = {
955 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
956 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
957 };
958
959 struct platform_device s5p_device_mipi_csis1 = {
960 .name = "s5p-mipi-csis",
961 .id = 1,
962 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
963 .resource = s5p_mipi_csis1_resource,
964 };
965 #endif
966
967 /* NAND */
968
969 #ifdef CONFIG_S3C_DEV_NAND
970 static struct resource s3c_nand_resource[] = {
971 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
972 };
973
974 struct platform_device s3c_device_nand = {
975 .name = "s3c2410-nand",
976 .id = -1,
977 .num_resources = ARRAY_SIZE(s3c_nand_resource),
978 .resource = s3c_nand_resource,
979 };
980
981 /*
982 * s3c_nand_copy_set() - copy nand set data
983 * @set: The new structure, directly copied from the old.
984 *
985 * Copy all the fields from the NAND set field from what is probably __initdata
986 * to new kernel memory. The code returns 0 if the copy happened correctly or
987 * an error code for the calling function to display.
988 *
989 * Note, we currently do not try and look to see if we've already copied the
990 * data in a previous set.
991 */
992 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
993 {
994 void *ptr;
995 int size;
996
997 size = sizeof(struct mtd_partition) * set->nr_partitions;
998 if (size) {
999 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
1000 set->partitions = ptr;
1001
1002 if (!ptr)
1003 return -ENOMEM;
1004 }
1005
1006 if (set->nr_map && set->nr_chips) {
1007 size = sizeof(int) * set->nr_chips;
1008 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1009 set->nr_map = ptr;
1010
1011 if (!ptr)
1012 return -ENOMEM;
1013 }
1014
1015 if (set->ecc_layout) {
1016 ptr = kmemdup(set->ecc_layout,
1017 sizeof(struct nand_ecclayout), GFP_KERNEL);
1018 set->ecc_layout = ptr;
1019
1020 if (!ptr)
1021 return -ENOMEM;
1022 }
1023
1024 return 0;
1025 }
1026
1027 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1028 {
1029 struct s3c2410_platform_nand *npd;
1030 int size;
1031 int ret;
1032
1033 /* note, if we get a failure in allocation, we simply drop out of the
1034 * function. If there is so little memory available at initialisation
1035 * time then there is little chance the system is going to run.
1036 */
1037
1038 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1039 &s3c_device_nand);
1040 if (!npd)
1041 return;
1042
1043 /* now see if we need to copy any of the nand set data */
1044
1045 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1046 if (size) {
1047 struct s3c2410_nand_set *from = npd->sets;
1048 struct s3c2410_nand_set *to;
1049 int i;
1050
1051 to = kmemdup(from, size, GFP_KERNEL);
1052 npd->sets = to; /* set, even if we failed */
1053
1054 if (!to) {
1055 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1056 return;
1057 }
1058
1059 for (i = 0; i < npd->nr_sets; i++) {
1060 ret = s3c_nand_copy_set(to);
1061 if (ret) {
1062 printk(KERN_ERR "%s: failed to copy set %d\n",
1063 __func__, i);
1064 return;
1065 }
1066 to++;
1067 }
1068 }
1069 }
1070 #endif /* CONFIG_S3C_DEV_NAND */
1071
1072 /* ONENAND */
1073
1074 #ifdef CONFIG_S3C_DEV_ONENAND
1075 static struct resource s3c_onenand_resources[] = {
1076 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1077 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1078 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1079 };
1080
1081 struct platform_device s3c_device_onenand = {
1082 .name = "samsung-onenand",
1083 .id = 0,
1084 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1085 .resource = s3c_onenand_resources,
1086 };
1087 #endif /* CONFIG_S3C_DEV_ONENAND */
1088
1089 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1090 static struct resource s3c64xx_onenand1_resources[] = {
1091 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1092 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1093 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1094 };
1095
1096 struct platform_device s3c64xx_device_onenand1 = {
1097 .name = "samsung-onenand",
1098 .id = 1,
1099 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1100 .resource = s3c64xx_onenand1_resources,
1101 };
1102
1103 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1104 {
1105 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1106 &s3c64xx_device_onenand1);
1107 }
1108 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1109
1110 #ifdef CONFIG_S5P_DEV_ONENAND
1111 static struct resource s5p_onenand_resources[] = {
1112 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1113 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1114 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1115 };
1116
1117 struct platform_device s5p_device_onenand = {
1118 .name = "s5pc110-onenand",
1119 .id = -1,
1120 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1121 .resource = s5p_onenand_resources,
1122 };
1123 #endif /* CONFIG_S5P_DEV_ONENAND */
1124
1125 /* PMU */
1126
1127 #ifdef CONFIG_PLAT_S5P
1128 static struct resource s5p_pmu_resource[] = {
1129 DEFINE_RES_IRQ(IRQ_PMU)
1130 };
1131
1132 static struct platform_device s5p_device_pmu = {
1133 .name = "arm-pmu",
1134 .id = -1,
1135 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1136 .resource = s5p_pmu_resource,
1137 };
1138
1139 static int __init s5p_pmu_init(void)
1140 {
1141 platform_device_register(&s5p_device_pmu);
1142 return 0;
1143 }
1144 arch_initcall(s5p_pmu_init);
1145 #endif /* CONFIG_PLAT_S5P */
1146
1147 /* PWM Timer */
1148
1149 #ifdef CONFIG_SAMSUNG_DEV_PWM
1150
1151 #define TIMER_RESOURCE_SIZE (1)
1152
1153 #define TIMER_RESOURCE(_tmr, _irq) \
1154 (struct resource [TIMER_RESOURCE_SIZE]) { \
1155 [0] = { \
1156 .start = _irq, \
1157 .end = _irq, \
1158 .flags = IORESOURCE_IRQ \
1159 } \
1160 }
1161
1162 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1163 .name = "s3c24xx-pwm", \
1164 .id = _tmr_no, \
1165 .num_resources = TIMER_RESOURCE_SIZE, \
1166 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1167
1168 /*
1169 * since we already have an static mapping for the timer,
1170 * we do not bother setting any IO resource for the base.
1171 */
1172
1173 struct platform_device s3c_device_timer[] = {
1174 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1175 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1176 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1177 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1178 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1179 };
1180 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1181
1182 /* RTC */
1183
1184 #ifdef CONFIG_PLAT_S3C24XX
1185 static struct resource s3c_rtc_resource[] = {
1186 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1187 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1188 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1189 };
1190
1191 struct platform_device s3c_device_rtc = {
1192 .name = "s3c2410-rtc",
1193 .id = -1,
1194 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1195 .resource = s3c_rtc_resource,
1196 };
1197 #endif /* CONFIG_PLAT_S3C24XX */
1198
1199 #ifdef CONFIG_S3C_DEV_RTC
1200 static struct resource s3c_rtc_resource[] = {
1201 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1202 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1203 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1204 };
1205
1206 struct platform_device s3c_device_rtc = {
1207 .name = "s3c64xx-rtc",
1208 .id = -1,
1209 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1210 .resource = s3c_rtc_resource,
1211 };
1212 #endif /* CONFIG_S3C_DEV_RTC */
1213
1214 /* SDI */
1215
1216 #ifdef CONFIG_PLAT_S3C24XX
1217 static struct resource s3c_sdi_resource[] = {
1218 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1219 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1220 };
1221
1222 struct platform_device s3c_device_sdi = {
1223 .name = "s3c2410-sdi",
1224 .id = -1,
1225 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1226 .resource = s3c_sdi_resource,
1227 };
1228
1229 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1230 {
1231 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1232 &s3c_device_sdi);
1233 }
1234 #endif /* CONFIG_PLAT_S3C24XX */
1235
1236 /* SPI */
1237
1238 #ifdef CONFIG_PLAT_S3C24XX
1239 static struct resource s3c_spi0_resource[] = {
1240 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1241 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1242 };
1243
1244 struct platform_device s3c_device_spi0 = {
1245 .name = "s3c2410-spi",
1246 .id = 0,
1247 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1248 .resource = s3c_spi0_resource,
1249 .dev = {
1250 .dma_mask = &samsung_device_dma_mask,
1251 .coherent_dma_mask = DMA_BIT_MASK(32),
1252 }
1253 };
1254
1255 static struct resource s3c_spi1_resource[] = {
1256 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1257 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1258 };
1259
1260 struct platform_device s3c_device_spi1 = {
1261 .name = "s3c2410-spi",
1262 .id = 1,
1263 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1264 .resource = s3c_spi1_resource,
1265 .dev = {
1266 .dma_mask = &samsung_device_dma_mask,
1267 .coherent_dma_mask = DMA_BIT_MASK(32),
1268 }
1269 };
1270 #endif /* CONFIG_PLAT_S3C24XX */
1271
1272 /* Touchscreen */
1273
1274 #ifdef CONFIG_PLAT_S3C24XX
1275 static struct resource s3c_ts_resource[] = {
1276 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1277 [1] = DEFINE_RES_IRQ(IRQ_TC),
1278 };
1279
1280 struct platform_device s3c_device_ts = {
1281 .name = "s3c2410-ts",
1282 .id = -1,
1283 .dev.parent = &s3c_device_adc.dev,
1284 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1285 .resource = s3c_ts_resource,
1286 };
1287
1288 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1289 {
1290 s3c_set_platdata(hard_s3c2410ts_info,
1291 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1292 }
1293 #endif /* CONFIG_PLAT_S3C24XX */
1294
1295 #ifdef CONFIG_SAMSUNG_DEV_TS
1296 static struct resource s3c_ts_resource[] = {
1297 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1298 [1] = DEFINE_RES_IRQ(IRQ_TC),
1299 };
1300
1301 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1302 .delay = 10000,
1303 .presc = 49,
1304 .oversampling_shift = 2,
1305 };
1306
1307 struct platform_device s3c_device_ts = {
1308 .name = "s3c64xx-ts",
1309 .id = -1,
1310 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1311 .resource = s3c_ts_resource,
1312 };
1313
1314 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1315 {
1316 if (!pd)
1317 pd = &default_ts_data;
1318
1319 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1320 &s3c_device_ts);
1321 }
1322 #endif /* CONFIG_SAMSUNG_DEV_TS */
1323
1324 /* TV */
1325
1326 #ifdef CONFIG_S5P_DEV_TV
1327
1328 static struct resource s5p_hdmi_resources[] = {
1329 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1330 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1331 };
1332
1333 struct platform_device s5p_device_hdmi = {
1334 .name = "s5p-hdmi",
1335 .id = -1,
1336 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1337 .resource = s5p_hdmi_resources,
1338 };
1339
1340 static struct resource s5p_sdo_resources[] = {
1341 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1342 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1343 };
1344
1345 struct platform_device s5p_device_sdo = {
1346 .name = "s5p-sdo",
1347 .id = -1,
1348 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1349 .resource = s5p_sdo_resources,
1350 };
1351
1352 static struct resource s5p_mixer_resources[] = {
1353 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1354 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1355 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1356 };
1357
1358 struct platform_device s5p_device_mixer = {
1359 .name = "s5p-mixer",
1360 .id = -1,
1361 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1362 .resource = s5p_mixer_resources,
1363 .dev = {
1364 .dma_mask = &samsung_device_dma_mask,
1365 .coherent_dma_mask = DMA_BIT_MASK(32),
1366 }
1367 };
1368 #endif /* CONFIG_S5P_DEV_TV */
1369
1370 /* USB */
1371
1372 #ifdef CONFIG_S3C_DEV_USB_HOST
1373 static struct resource s3c_usb_resource[] = {
1374 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1375 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1376 };
1377
1378 struct platform_device s3c_device_ohci = {
1379 .name = "s3c2410-ohci",
1380 .id = -1,
1381 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1382 .resource = s3c_usb_resource,
1383 .dev = {
1384 .dma_mask = &samsung_device_dma_mask,
1385 .coherent_dma_mask = DMA_BIT_MASK(32),
1386 }
1387 };
1388
1389 /*
1390 * s3c_ohci_set_platdata - initialise OHCI device platform data
1391 * @info: The platform data.
1392 *
1393 * This call copies the @info passed in and sets the device .platform_data
1394 * field to that copy. The @info is copied so that the original can be marked
1395 * __initdata.
1396 */
1397
1398 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1399 {
1400 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1401 &s3c_device_ohci);
1402 }
1403 #endif /* CONFIG_S3C_DEV_USB_HOST */
1404
1405 /* USB Device (Gadget) */
1406
1407 #ifdef CONFIG_PLAT_S3C24XX
1408 static struct resource s3c_usbgadget_resource[] = {
1409 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1410 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1411 };
1412
1413 struct platform_device s3c_device_usbgadget = {
1414 .name = "s3c2410-usbgadget",
1415 .id = -1,
1416 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1417 .resource = s3c_usbgadget_resource,
1418 };
1419
1420 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1421 {
1422 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1423 }
1424 #endif /* CONFIG_PLAT_S3C24XX */
1425
1426 /* USB EHCI Host Controller */
1427
1428 #ifdef CONFIG_S5P_DEV_USB_EHCI
1429 static struct resource s5p_ehci_resource[] = {
1430 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1431 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1432 };
1433
1434 struct platform_device s5p_device_ehci = {
1435 .name = "s5p-ehci",
1436 .id = -1,
1437 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1438 .resource = s5p_ehci_resource,
1439 .dev = {
1440 .dma_mask = &samsung_device_dma_mask,
1441 .coherent_dma_mask = DMA_BIT_MASK(32),
1442 }
1443 };
1444
1445 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1446 {
1447 struct s5p_ehci_platdata *npd;
1448
1449 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1450 &s5p_device_ehci);
1451
1452 if (!npd->phy_init)
1453 npd->phy_init = s5p_usb_phy_init;
1454 if (!npd->phy_exit)
1455 npd->phy_exit = s5p_usb_phy_exit;
1456 }
1457 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1458
1459 /* USB HSOTG */
1460
1461 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1462 static struct resource s3c_usb_hsotg_resources[] = {
1463 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1464 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1465 };
1466
1467 struct platform_device s3c_device_usb_hsotg = {
1468 .name = "s3c-hsotg",
1469 .id = -1,
1470 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1471 .resource = s3c_usb_hsotg_resources,
1472 .dev = {
1473 .dma_mask = &samsung_device_dma_mask,
1474 .coherent_dma_mask = DMA_BIT_MASK(32),
1475 },
1476 };
1477
1478 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1479 {
1480 struct s3c_hsotg_plat *npd;
1481
1482 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1483 &s3c_device_usb_hsotg);
1484
1485 if (!npd->phy_init)
1486 npd->phy_init = s5p_usb_phy_init;
1487 if (!npd->phy_exit)
1488 npd->phy_exit = s5p_usb_phy_exit;
1489 }
1490 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1491
1492 /* USB High Spped 2.0 Device (Gadget) */
1493
1494 #ifdef CONFIG_PLAT_S3C24XX
1495 static struct resource s3c_hsudc_resource[] = {
1496 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1497 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1498 };
1499
1500 struct platform_device s3c_device_usb_hsudc = {
1501 .name = "s3c-hsudc",
1502 .id = -1,
1503 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1504 .resource = s3c_hsudc_resource,
1505 .dev = {
1506 .dma_mask = &samsung_device_dma_mask,
1507 .coherent_dma_mask = DMA_BIT_MASK(32),
1508 },
1509 };
1510
1511 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1512 {
1513 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1514 }
1515 #endif /* CONFIG_PLAT_S3C24XX */
1516
1517 /* WDT */
1518
1519 #ifdef CONFIG_S3C_DEV_WDT
1520 static struct resource s3c_wdt_resource[] = {
1521 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1522 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1523 };
1524
1525 struct platform_device s3c_device_wdt = {
1526 .name = "s3c2410-wdt",
1527 .id = -1,
1528 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1529 .resource = s3c_wdt_resource,
1530 };
1531 #endif /* CONFIG_S3C_DEV_WDT */
1532
1533 #ifdef CONFIG_S3C64XX_DEV_SPI0
1534 static struct resource s3c64xx_spi0_resource[] = {
1535 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1536 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1537 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1538 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1539 };
1540
1541 struct platform_device s3c64xx_device_spi0 = {
1542 .name = "s3c6410-spi",
1543 .id = 0,
1544 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1545 .resource = s3c64xx_spi0_resource,
1546 .dev = {
1547 .dma_mask = &samsung_device_dma_mask,
1548 .coherent_dma_mask = DMA_BIT_MASK(32),
1549 },
1550 };
1551
1552 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1553 int num_cs)
1554 {
1555 struct s3c64xx_spi_info pd;
1556
1557 /* Reject invalid configuration */
1558 if (!num_cs || src_clk_nr < 0) {
1559 pr_err("%s: Invalid SPI configuration\n", __func__);
1560 return;
1561 }
1562
1563 pd.num_cs = num_cs;
1564 pd.src_clk_nr = src_clk_nr;
1565 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1566
1567 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1568 }
1569 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1570
1571 #ifdef CONFIG_S3C64XX_DEV_SPI1
1572 static struct resource s3c64xx_spi1_resource[] = {
1573 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1574 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1575 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1576 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1577 };
1578
1579 struct platform_device s3c64xx_device_spi1 = {
1580 .name = "s3c6410-spi",
1581 .id = 1,
1582 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1583 .resource = s3c64xx_spi1_resource,
1584 .dev = {
1585 .dma_mask = &samsung_device_dma_mask,
1586 .coherent_dma_mask = DMA_BIT_MASK(32),
1587 },
1588 };
1589
1590 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1591 int num_cs)
1592 {
1593 /* Reject invalid configuration */
1594 if (!num_cs || src_clk_nr < 0) {
1595 pr_err("%s: Invalid SPI configuration\n", __func__);
1596 return;
1597 }
1598
1599 pd.num_cs = num_cs;
1600 pd.src_clk_nr = src_clk_nr;
1601 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1602
1603 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1604 }
1605 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1606
1607 #ifdef CONFIG_S3C64XX_DEV_SPI2
1608 static struct resource s3c64xx_spi2_resource[] = {
1609 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1610 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1611 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1612 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1613 };
1614
1615 struct platform_device s3c64xx_device_spi2 = {
1616 .name = "s3c6410-spi",
1617 .id = 2,
1618 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1619 .resource = s3c64xx_spi2_resource,
1620 .dev = {
1621 .dma_mask = &samsung_device_dma_mask,
1622 .coherent_dma_mask = DMA_BIT_MASK(32),
1623 },
1624 };
1625
1626 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1627 int num_cs)
1628 {
1629 struct s3c64xx_spi_info pd;
1630
1631 /* Reject invalid configuration */
1632 if (!num_cs || src_clk_nr < 0) {
1633 pr_err("%s: Invalid SPI configuration\n", __func__);
1634 return;
1635 }
1636
1637 pd.num_cs = num_cs;
1638 pd.src_clk_nr = src_clk_nr;
1639 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1640
1641 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1642 }
1643 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
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