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ARM: pmu: remove arm_pmu_type enumeration
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
34
35 #include <asm/irq.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39
40 #include <mach/hardware.h>
41 #include <mach/dma.h>
42 #include <mach/irqs.h>
43 #include <mach/map.h>
44
45 #include <plat/cpu.h>
46 #include <plat/devs.h>
47 #include <plat/adc.h>
48 #include <plat/ata.h>
49 #include <plat/ehci.h>
50 #include <plat/fb.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
53 #include <plat/iic.h>
54 #include <plat/keypad.h>
55 #include <plat/mci.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
58 #include <plat/ts.h>
59 #include <plat/udc.h>
60 #include <plat/usb-control.h>
61 #include <plat/usb-phy.h>
62 #include <plat/regs-iic.h>
63 #include <plat/regs-serial.h>
64 #include <plat/regs-spi.h>
65 #include <plat/s3c64xx-spi.h>
66
67 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
68
69 /* AC97 */
70 #ifdef CONFIG_CPU_S3C2440
71 static struct resource s3c_ac97_resource[] = {
72 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
73 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
74 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
75 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
76 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
77 };
78
79 struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88 };
89 #endif /* CONFIG_CPU_S3C2440 */
90
91 /* ADC */
92
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98 };
99
100 struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105 };
106 #endif /* CONFIG_PLAT_S3C24XX */
107
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_TC),
112 [2] = DEFINE_RES_IRQ(IRQ_ADC),
113 };
114
115 struct platform_device s3c_device_adc = {
116 .name = "samsung-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120 };
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123 /* Camif Controller */
124
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
129 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130 };
131
132 struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
137 .dev = {
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
140 }
141 };
142 #endif /* CONFIG_CPU_S3C2440 */
143
144 /* ASOC DMA */
145
146 struct platform_device samsung_asoc_dma = {
147 .name = "samsung-audio",
148 .id = -1,
149 .dev = {
150 .dma_mask = &samsung_device_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
152 }
153 };
154
155 struct platform_device samsung_asoc_idma = {
156 .name = "samsung-idma",
157 .id = -1,
158 .dev = {
159 .dma_mask = &samsung_device_dma_mask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 }
162 };
163
164 /* FB */
165
166 #ifdef CONFIG_S3C_DEV_FB
167 static struct resource s3c_fb_resource[] = {
168 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
169 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
170 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
171 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
172 };
173
174 struct platform_device s3c_device_fb = {
175 .name = "s3c-fb",
176 .id = -1,
177 .num_resources = ARRAY_SIZE(s3c_fb_resource),
178 .resource = s3c_fb_resource,
179 .dev = {
180 .dma_mask = &samsung_device_dma_mask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
182 },
183 };
184
185 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
186 {
187 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
188 &s3c_device_fb);
189 }
190 #endif /* CONFIG_S3C_DEV_FB */
191
192 /* FIMC */
193
194 #ifdef CONFIG_S5P_DEV_FIMC0
195 static struct resource s5p_fimc0_resource[] = {
196 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
197 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
198 };
199
200 struct platform_device s5p_device_fimc0 = {
201 .name = "s5p-fimc",
202 .id = 0,
203 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
204 .resource = s5p_fimc0_resource,
205 .dev = {
206 .dma_mask = &samsung_device_dma_mask,
207 .coherent_dma_mask = DMA_BIT_MASK(32),
208 },
209 };
210
211 struct platform_device s5p_device_fimc_md = {
212 .name = "s5p-fimc-md",
213 .id = -1,
214 };
215 #endif /* CONFIG_S5P_DEV_FIMC0 */
216
217 #ifdef CONFIG_S5P_DEV_FIMC1
218 static struct resource s5p_fimc1_resource[] = {
219 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
220 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
221 };
222
223 struct platform_device s5p_device_fimc1 = {
224 .name = "s5p-fimc",
225 .id = 1,
226 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
227 .resource = s5p_fimc1_resource,
228 .dev = {
229 .dma_mask = &samsung_device_dma_mask,
230 .coherent_dma_mask = DMA_BIT_MASK(32),
231 },
232 };
233 #endif /* CONFIG_S5P_DEV_FIMC1 */
234
235 #ifdef CONFIG_S5P_DEV_FIMC2
236 static struct resource s5p_fimc2_resource[] = {
237 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
238 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
239 };
240
241 struct platform_device s5p_device_fimc2 = {
242 .name = "s5p-fimc",
243 .id = 2,
244 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
245 .resource = s5p_fimc2_resource,
246 .dev = {
247 .dma_mask = &samsung_device_dma_mask,
248 .coherent_dma_mask = DMA_BIT_MASK(32),
249 },
250 };
251 #endif /* CONFIG_S5P_DEV_FIMC2 */
252
253 #ifdef CONFIG_S5P_DEV_FIMC3
254 static struct resource s5p_fimc3_resource[] = {
255 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
256 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
257 };
258
259 struct platform_device s5p_device_fimc3 = {
260 .name = "s5p-fimc",
261 .id = 3,
262 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
263 .resource = s5p_fimc3_resource,
264 .dev = {
265 .dma_mask = &samsung_device_dma_mask,
266 .coherent_dma_mask = DMA_BIT_MASK(32),
267 },
268 };
269 #endif /* CONFIG_S5P_DEV_FIMC3 */
270
271 /* G2D */
272
273 #ifdef CONFIG_S5P_DEV_G2D
274 static struct resource s5p_g2d_resource[] = {
275 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
276 [1] = DEFINE_RES_IRQ(IRQ_2D),
277 };
278
279 struct platform_device s5p_device_g2d = {
280 .name = "s5p-g2d",
281 .id = 0,
282 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
283 .resource = s5p_g2d_resource,
284 .dev = {
285 .dma_mask = &samsung_device_dma_mask,
286 .coherent_dma_mask = DMA_BIT_MASK(32),
287 },
288 };
289 #endif /* CONFIG_S5P_DEV_G2D */
290
291 #ifdef CONFIG_S5P_DEV_JPEG
292 static struct resource s5p_jpeg_resource[] = {
293 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
294 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
295 };
296
297 struct platform_device s5p_device_jpeg = {
298 .name = "s5p-jpeg",
299 .id = 0,
300 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
301 .resource = s5p_jpeg_resource,
302 .dev = {
303 .dma_mask = &samsung_device_dma_mask,
304 .coherent_dma_mask = DMA_BIT_MASK(32),
305 },
306 };
307 #endif /* CONFIG_S5P_DEV_JPEG */
308
309 /* FIMD0 */
310
311 #ifdef CONFIG_S5P_DEV_FIMD0
312 static struct resource s5p_fimd0_resource[] = {
313 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
314 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
315 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
316 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
317 };
318
319 struct platform_device s5p_device_fimd0 = {
320 .name = "s5p-fb",
321 .id = 0,
322 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
323 .resource = s5p_fimd0_resource,
324 .dev = {
325 .dma_mask = &samsung_device_dma_mask,
326 .coherent_dma_mask = DMA_BIT_MASK(32),
327 },
328 };
329
330 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
331 {
332 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
333 &s5p_device_fimd0);
334 }
335 #endif /* CONFIG_S5P_DEV_FIMD0 */
336
337 /* HWMON */
338
339 #ifdef CONFIG_S3C_DEV_HWMON
340 struct platform_device s3c_device_hwmon = {
341 .name = "s3c-hwmon",
342 .id = -1,
343 .dev.parent = &s3c_device_adc.dev,
344 };
345
346 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
347 {
348 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
349 &s3c_device_hwmon);
350 }
351 #endif /* CONFIG_S3C_DEV_HWMON */
352
353 /* HSMMC */
354
355 #ifdef CONFIG_S3C_DEV_HSMMC
356 static struct resource s3c_hsmmc_resource[] = {
357 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
358 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
359 };
360
361 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
362 .max_width = 4,
363 .host_caps = (MMC_CAP_4_BIT_DATA |
364 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
365 };
366
367 struct platform_device s3c_device_hsmmc0 = {
368 .name = "s3c-sdhci",
369 .id = 0,
370 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
371 .resource = s3c_hsmmc_resource,
372 .dev = {
373 .dma_mask = &samsung_device_dma_mask,
374 .coherent_dma_mask = DMA_BIT_MASK(32),
375 .platform_data = &s3c_hsmmc0_def_platdata,
376 },
377 };
378
379 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
380 {
381 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
382 }
383 #endif /* CONFIG_S3C_DEV_HSMMC */
384
385 #ifdef CONFIG_S3C_DEV_HSMMC1
386 static struct resource s3c_hsmmc1_resource[] = {
387 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
388 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
389 };
390
391 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
392 .max_width = 4,
393 .host_caps = (MMC_CAP_4_BIT_DATA |
394 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
395 };
396
397 struct platform_device s3c_device_hsmmc1 = {
398 .name = "s3c-sdhci",
399 .id = 1,
400 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
401 .resource = s3c_hsmmc1_resource,
402 .dev = {
403 .dma_mask = &samsung_device_dma_mask,
404 .coherent_dma_mask = DMA_BIT_MASK(32),
405 .platform_data = &s3c_hsmmc1_def_platdata,
406 },
407 };
408
409 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
410 {
411 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
412 }
413 #endif /* CONFIG_S3C_DEV_HSMMC1 */
414
415 /* HSMMC2 */
416
417 #ifdef CONFIG_S3C_DEV_HSMMC2
418 static struct resource s3c_hsmmc2_resource[] = {
419 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
420 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
421 };
422
423 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
424 .max_width = 4,
425 .host_caps = (MMC_CAP_4_BIT_DATA |
426 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
427 };
428
429 struct platform_device s3c_device_hsmmc2 = {
430 .name = "s3c-sdhci",
431 .id = 2,
432 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
433 .resource = s3c_hsmmc2_resource,
434 .dev = {
435 .dma_mask = &samsung_device_dma_mask,
436 .coherent_dma_mask = DMA_BIT_MASK(32),
437 .platform_data = &s3c_hsmmc2_def_platdata,
438 },
439 };
440
441 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
442 {
443 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
444 }
445 #endif /* CONFIG_S3C_DEV_HSMMC2 */
446
447 #ifdef CONFIG_S3C_DEV_HSMMC3
448 static struct resource s3c_hsmmc3_resource[] = {
449 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
450 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
451 };
452
453 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
454 .max_width = 4,
455 .host_caps = (MMC_CAP_4_BIT_DATA |
456 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
457 };
458
459 struct platform_device s3c_device_hsmmc3 = {
460 .name = "s3c-sdhci",
461 .id = 3,
462 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
463 .resource = s3c_hsmmc3_resource,
464 .dev = {
465 .dma_mask = &samsung_device_dma_mask,
466 .coherent_dma_mask = DMA_BIT_MASK(32),
467 .platform_data = &s3c_hsmmc3_def_platdata,
468 },
469 };
470
471 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
472 {
473 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
474 }
475 #endif /* CONFIG_S3C_DEV_HSMMC3 */
476
477 /* I2C */
478
479 static struct resource s3c_i2c0_resource[] = {
480 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
481 [1] = DEFINE_RES_IRQ(IRQ_IIC),
482 };
483
484 struct platform_device s3c_device_i2c0 = {
485 .name = "s3c2410-i2c",
486 #ifdef CONFIG_S3C_DEV_I2C1
487 .id = 0,
488 #else
489 .id = -1,
490 #endif
491 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
492 .resource = s3c_i2c0_resource,
493 };
494
495 struct s3c2410_platform_i2c default_i2c_data __initdata = {
496 .flags = 0,
497 .slave_addr = 0x10,
498 .frequency = 100*1000,
499 .sda_delay = 100,
500 };
501
502 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
503 {
504 struct s3c2410_platform_i2c *npd;
505
506 if (!pd) {
507 pd = &default_i2c_data;
508 pd->bus_num = 0;
509 }
510
511 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
512 &s3c_device_i2c0);
513
514 if (!npd->cfg_gpio)
515 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
516 }
517
518 #ifdef CONFIG_S3C_DEV_I2C1
519 static struct resource s3c_i2c1_resource[] = {
520 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
521 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
522 };
523
524 struct platform_device s3c_device_i2c1 = {
525 .name = "s3c2410-i2c",
526 .id = 1,
527 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
528 .resource = s3c_i2c1_resource,
529 };
530
531 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
532 {
533 struct s3c2410_platform_i2c *npd;
534
535 if (!pd) {
536 pd = &default_i2c_data;
537 pd->bus_num = 1;
538 }
539
540 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
541 &s3c_device_i2c1);
542
543 if (!npd->cfg_gpio)
544 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
545 }
546 #endif /* CONFIG_S3C_DEV_I2C1 */
547
548 #ifdef CONFIG_S3C_DEV_I2C2
549 static struct resource s3c_i2c2_resource[] = {
550 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
551 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
552 };
553
554 struct platform_device s3c_device_i2c2 = {
555 .name = "s3c2410-i2c",
556 .id = 2,
557 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
558 .resource = s3c_i2c2_resource,
559 };
560
561 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
562 {
563 struct s3c2410_platform_i2c *npd;
564
565 if (!pd) {
566 pd = &default_i2c_data;
567 pd->bus_num = 2;
568 }
569
570 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
571 &s3c_device_i2c2);
572
573 if (!npd->cfg_gpio)
574 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
575 }
576 #endif /* CONFIG_S3C_DEV_I2C2 */
577
578 #ifdef CONFIG_S3C_DEV_I2C3
579 static struct resource s3c_i2c3_resource[] = {
580 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
581 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
582 };
583
584 struct platform_device s3c_device_i2c3 = {
585 .name = "s3c2440-i2c",
586 .id = 3,
587 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
588 .resource = s3c_i2c3_resource,
589 };
590
591 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
592 {
593 struct s3c2410_platform_i2c *npd;
594
595 if (!pd) {
596 pd = &default_i2c_data;
597 pd->bus_num = 3;
598 }
599
600 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
601 &s3c_device_i2c3);
602
603 if (!npd->cfg_gpio)
604 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
605 }
606 #endif /*CONFIG_S3C_DEV_I2C3 */
607
608 #ifdef CONFIG_S3C_DEV_I2C4
609 static struct resource s3c_i2c4_resource[] = {
610 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
611 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
612 };
613
614 struct platform_device s3c_device_i2c4 = {
615 .name = "s3c2440-i2c",
616 .id = 4,
617 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
618 .resource = s3c_i2c4_resource,
619 };
620
621 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
622 {
623 struct s3c2410_platform_i2c *npd;
624
625 if (!pd) {
626 pd = &default_i2c_data;
627 pd->bus_num = 4;
628 }
629
630 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
631 &s3c_device_i2c4);
632
633 if (!npd->cfg_gpio)
634 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
635 }
636 #endif /*CONFIG_S3C_DEV_I2C4 */
637
638 #ifdef CONFIG_S3C_DEV_I2C5
639 static struct resource s3c_i2c5_resource[] = {
640 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
641 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
642 };
643
644 struct platform_device s3c_device_i2c5 = {
645 .name = "s3c2440-i2c",
646 .id = 5,
647 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
648 .resource = s3c_i2c5_resource,
649 };
650
651 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
652 {
653 struct s3c2410_platform_i2c *npd;
654
655 if (!pd) {
656 pd = &default_i2c_data;
657 pd->bus_num = 5;
658 }
659
660 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
661 &s3c_device_i2c5);
662
663 if (!npd->cfg_gpio)
664 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
665 }
666 #endif /*CONFIG_S3C_DEV_I2C5 */
667
668 #ifdef CONFIG_S3C_DEV_I2C6
669 static struct resource s3c_i2c6_resource[] = {
670 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
671 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
672 };
673
674 struct platform_device s3c_device_i2c6 = {
675 .name = "s3c2440-i2c",
676 .id = 6,
677 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
678 .resource = s3c_i2c6_resource,
679 };
680
681 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
682 {
683 struct s3c2410_platform_i2c *npd;
684
685 if (!pd) {
686 pd = &default_i2c_data;
687 pd->bus_num = 6;
688 }
689
690 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
691 &s3c_device_i2c6);
692
693 if (!npd->cfg_gpio)
694 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
695 }
696 #endif /* CONFIG_S3C_DEV_I2C6 */
697
698 #ifdef CONFIG_S3C_DEV_I2C7
699 static struct resource s3c_i2c7_resource[] = {
700 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
701 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
702 };
703
704 struct platform_device s3c_device_i2c7 = {
705 .name = "s3c2440-i2c",
706 .id = 7,
707 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
708 .resource = s3c_i2c7_resource,
709 };
710
711 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
712 {
713 struct s3c2410_platform_i2c *npd;
714
715 if (!pd) {
716 pd = &default_i2c_data;
717 pd->bus_num = 7;
718 }
719
720 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
721 &s3c_device_i2c7);
722
723 if (!npd->cfg_gpio)
724 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
725 }
726 #endif /* CONFIG_S3C_DEV_I2C7 */
727
728 /* I2C HDMIPHY */
729
730 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
731 static struct resource s5p_i2c_resource[] = {
732 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
733 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
734 };
735
736 struct platform_device s5p_device_i2c_hdmiphy = {
737 .name = "s3c2440-hdmiphy-i2c",
738 .id = -1,
739 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
740 .resource = s5p_i2c_resource,
741 };
742
743 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
744 {
745 struct s3c2410_platform_i2c *npd;
746
747 if (!pd) {
748 pd = &default_i2c_data;
749
750 if (soc_is_exynos4210())
751 pd->bus_num = 8;
752 else if (soc_is_s5pv210())
753 pd->bus_num = 3;
754 else
755 pd->bus_num = 0;
756 }
757
758 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759 &s5p_device_i2c_hdmiphy);
760 }
761 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
762
763 /* I2S */
764
765 #ifdef CONFIG_PLAT_S3C24XX
766 static struct resource s3c_iis_resource[] = {
767 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
768 };
769
770 struct platform_device s3c_device_iis = {
771 .name = "s3c24xx-iis",
772 .id = -1,
773 .num_resources = ARRAY_SIZE(s3c_iis_resource),
774 .resource = s3c_iis_resource,
775 .dev = {
776 .dma_mask = &samsung_device_dma_mask,
777 .coherent_dma_mask = DMA_BIT_MASK(32),
778 }
779 };
780 #endif /* CONFIG_PLAT_S3C24XX */
781
782 /* IDE CFCON */
783
784 #ifdef CONFIG_SAMSUNG_DEV_IDE
785 static struct resource s3c_cfcon_resource[] = {
786 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
787 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
788 };
789
790 struct platform_device s3c_device_cfcon = {
791 .id = 0,
792 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
793 .resource = s3c_cfcon_resource,
794 };
795
796 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
797 {
798 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
799 &s3c_device_cfcon);
800 }
801 #endif /* CONFIG_SAMSUNG_DEV_IDE */
802
803 /* KEYPAD */
804
805 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
806 static struct resource samsung_keypad_resources[] = {
807 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
808 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
809 };
810
811 struct platform_device samsung_device_keypad = {
812 .name = "samsung-keypad",
813 .id = -1,
814 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
815 .resource = samsung_keypad_resources,
816 };
817
818 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
819 {
820 struct samsung_keypad_platdata *npd;
821
822 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
823 &samsung_device_keypad);
824
825 if (!npd->cfg_gpio)
826 npd->cfg_gpio = samsung_keypad_cfg_gpio;
827 }
828 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
829
830 /* LCD Controller */
831
832 #ifdef CONFIG_PLAT_S3C24XX
833 static struct resource s3c_lcd_resource[] = {
834 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
835 [1] = DEFINE_RES_IRQ(IRQ_LCD),
836 };
837
838 struct platform_device s3c_device_lcd = {
839 .name = "s3c2410-lcd",
840 .id = -1,
841 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
842 .resource = s3c_lcd_resource,
843 .dev = {
844 .dma_mask = &samsung_device_dma_mask,
845 .coherent_dma_mask = DMA_BIT_MASK(32),
846 }
847 };
848
849 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
850 {
851 struct s3c2410fb_mach_info *npd;
852
853 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
854 if (npd) {
855 npd->displays = kmemdup(pd->displays,
856 sizeof(struct s3c2410fb_display) * npd->num_displays,
857 GFP_KERNEL);
858 if (!npd->displays)
859 printk(KERN_ERR "no memory for LCD display data\n");
860 } else {
861 printk(KERN_ERR "no memory for LCD platform data\n");
862 }
863 }
864 #endif /* CONFIG_PLAT_S3C24XX */
865
866 /* MFC */
867
868 #ifdef CONFIG_S5P_DEV_MFC
869 static struct resource s5p_mfc_resource[] = {
870 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
871 [1] = DEFINE_RES_IRQ(IRQ_MFC),
872 };
873
874 struct platform_device s5p_device_mfc = {
875 .name = "s5p-mfc",
876 .id = -1,
877 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
878 .resource = s5p_mfc_resource,
879 };
880
881 /*
882 * MFC hardware has 2 memory interfaces which are modelled as two separate
883 * platform devices to let dma-mapping distinguish between them.
884 *
885 * MFC parent device (s5p_device_mfc) must be registered before memory
886 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
887 */
888
889 struct platform_device s5p_device_mfc_l = {
890 .name = "s5p-mfc-l",
891 .id = -1,
892 .dev = {
893 .parent = &s5p_device_mfc.dev,
894 .dma_mask = &samsung_device_dma_mask,
895 .coherent_dma_mask = DMA_BIT_MASK(32),
896 },
897 };
898
899 struct platform_device s5p_device_mfc_r = {
900 .name = "s5p-mfc-r",
901 .id = -1,
902 .dev = {
903 .parent = &s5p_device_mfc.dev,
904 .dma_mask = &samsung_device_dma_mask,
905 .coherent_dma_mask = DMA_BIT_MASK(32),
906 },
907 };
908 #endif /* CONFIG_S5P_DEV_MFC */
909
910 /* MIPI CSIS */
911
912 #ifdef CONFIG_S5P_DEV_CSIS0
913 static struct resource s5p_mipi_csis0_resource[] = {
914 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
915 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
916 };
917
918 struct platform_device s5p_device_mipi_csis0 = {
919 .name = "s5p-mipi-csis",
920 .id = 0,
921 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
922 .resource = s5p_mipi_csis0_resource,
923 };
924 #endif /* CONFIG_S5P_DEV_CSIS0 */
925
926 #ifdef CONFIG_S5P_DEV_CSIS1
927 static struct resource s5p_mipi_csis1_resource[] = {
928 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
929 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
930 };
931
932 struct platform_device s5p_device_mipi_csis1 = {
933 .name = "s5p-mipi-csis",
934 .id = 1,
935 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
936 .resource = s5p_mipi_csis1_resource,
937 };
938 #endif
939
940 /* NAND */
941
942 #ifdef CONFIG_S3C_DEV_NAND
943 static struct resource s3c_nand_resource[] = {
944 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
945 };
946
947 struct platform_device s3c_device_nand = {
948 .name = "s3c2410-nand",
949 .id = -1,
950 .num_resources = ARRAY_SIZE(s3c_nand_resource),
951 .resource = s3c_nand_resource,
952 };
953
954 /*
955 * s3c_nand_copy_set() - copy nand set data
956 * @set: The new structure, directly copied from the old.
957 *
958 * Copy all the fields from the NAND set field from what is probably __initdata
959 * to new kernel memory. The code returns 0 if the copy happened correctly or
960 * an error code for the calling function to display.
961 *
962 * Note, we currently do not try and look to see if we've already copied the
963 * data in a previous set.
964 */
965 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
966 {
967 void *ptr;
968 int size;
969
970 size = sizeof(struct mtd_partition) * set->nr_partitions;
971 if (size) {
972 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
973 set->partitions = ptr;
974
975 if (!ptr)
976 return -ENOMEM;
977 }
978
979 if (set->nr_map && set->nr_chips) {
980 size = sizeof(int) * set->nr_chips;
981 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
982 set->nr_map = ptr;
983
984 if (!ptr)
985 return -ENOMEM;
986 }
987
988 if (set->ecc_layout) {
989 ptr = kmemdup(set->ecc_layout,
990 sizeof(struct nand_ecclayout), GFP_KERNEL);
991 set->ecc_layout = ptr;
992
993 if (!ptr)
994 return -ENOMEM;
995 }
996
997 return 0;
998 }
999
1000 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1001 {
1002 struct s3c2410_platform_nand *npd;
1003 int size;
1004 int ret;
1005
1006 /* note, if we get a failure in allocation, we simply drop out of the
1007 * function. If there is so little memory available at initialisation
1008 * time then there is little chance the system is going to run.
1009 */
1010
1011 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1012 &s3c_device_nand);
1013 if (!npd)
1014 return;
1015
1016 /* now see if we need to copy any of the nand set data */
1017
1018 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1019 if (size) {
1020 struct s3c2410_nand_set *from = npd->sets;
1021 struct s3c2410_nand_set *to;
1022 int i;
1023
1024 to = kmemdup(from, size, GFP_KERNEL);
1025 npd->sets = to; /* set, even if we failed */
1026
1027 if (!to) {
1028 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1029 return;
1030 }
1031
1032 for (i = 0; i < npd->nr_sets; i++) {
1033 ret = s3c_nand_copy_set(to);
1034 if (ret) {
1035 printk(KERN_ERR "%s: failed to copy set %d\n",
1036 __func__, i);
1037 return;
1038 }
1039 to++;
1040 }
1041 }
1042 }
1043 #endif /* CONFIG_S3C_DEV_NAND */
1044
1045 /* ONENAND */
1046
1047 #ifdef CONFIG_S3C_DEV_ONENAND
1048 static struct resource s3c_onenand_resources[] = {
1049 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1050 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1051 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1052 };
1053
1054 struct platform_device s3c_device_onenand = {
1055 .name = "samsung-onenand",
1056 .id = 0,
1057 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1058 .resource = s3c_onenand_resources,
1059 };
1060 #endif /* CONFIG_S3C_DEV_ONENAND */
1061
1062 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1063 static struct resource s3c64xx_onenand1_resources[] = {
1064 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1065 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1066 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1067 };
1068
1069 struct platform_device s3c64xx_device_onenand1 = {
1070 .name = "samsung-onenand",
1071 .id = 1,
1072 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1073 .resource = s3c64xx_onenand1_resources,
1074 };
1075
1076 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1077 {
1078 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1079 &s3c64xx_device_onenand1);
1080 }
1081 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1082
1083 #ifdef CONFIG_S5P_DEV_ONENAND
1084 static struct resource s5p_onenand_resources[] = {
1085 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1086 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1087 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1088 };
1089
1090 struct platform_device s5p_device_onenand = {
1091 .name = "s5pc110-onenand",
1092 .id = -1,
1093 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1094 .resource = s5p_onenand_resources,
1095 };
1096 #endif /* CONFIG_S5P_DEV_ONENAND */
1097
1098 /* PMU */
1099
1100 #ifdef CONFIG_PLAT_S5P
1101 static struct resource s5p_pmu_resource[] = {
1102 DEFINE_RES_IRQ(IRQ_PMU)
1103 };
1104
1105 static struct platform_device s5p_device_pmu = {
1106 .name = "arm-pmu",
1107 .id = -1,
1108 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1109 .resource = s5p_pmu_resource,
1110 };
1111
1112 static int __init s5p_pmu_init(void)
1113 {
1114 platform_device_register(&s5p_device_pmu);
1115 return 0;
1116 }
1117 arch_initcall(s5p_pmu_init);
1118 #endif /* CONFIG_PLAT_S5P */
1119
1120 /* PWM Timer */
1121
1122 #ifdef CONFIG_SAMSUNG_DEV_PWM
1123
1124 #define TIMER_RESOURCE_SIZE (1)
1125
1126 #define TIMER_RESOURCE(_tmr, _irq) \
1127 (struct resource [TIMER_RESOURCE_SIZE]) { \
1128 [0] = { \
1129 .start = _irq, \
1130 .end = _irq, \
1131 .flags = IORESOURCE_IRQ \
1132 } \
1133 }
1134
1135 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1136 .name = "s3c24xx-pwm", \
1137 .id = _tmr_no, \
1138 .num_resources = TIMER_RESOURCE_SIZE, \
1139 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1140
1141 /*
1142 * since we already have an static mapping for the timer,
1143 * we do not bother setting any IO resource for the base.
1144 */
1145
1146 struct platform_device s3c_device_timer[] = {
1147 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1148 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1149 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1150 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1151 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1152 };
1153 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1154
1155 /* RTC */
1156
1157 #ifdef CONFIG_PLAT_S3C24XX
1158 static struct resource s3c_rtc_resource[] = {
1159 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1160 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1161 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1162 };
1163
1164 struct platform_device s3c_device_rtc = {
1165 .name = "s3c2410-rtc",
1166 .id = -1,
1167 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1168 .resource = s3c_rtc_resource,
1169 };
1170 #endif /* CONFIG_PLAT_S3C24XX */
1171
1172 #ifdef CONFIG_S3C_DEV_RTC
1173 static struct resource s3c_rtc_resource[] = {
1174 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1175 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1176 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1177 };
1178
1179 struct platform_device s3c_device_rtc = {
1180 .name = "s3c64xx-rtc",
1181 .id = -1,
1182 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1183 .resource = s3c_rtc_resource,
1184 };
1185 #endif /* CONFIG_S3C_DEV_RTC */
1186
1187 /* SDI */
1188
1189 #ifdef CONFIG_PLAT_S3C24XX
1190 static struct resource s3c_sdi_resource[] = {
1191 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1192 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1193 };
1194
1195 struct platform_device s3c_device_sdi = {
1196 .name = "s3c2410-sdi",
1197 .id = -1,
1198 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1199 .resource = s3c_sdi_resource,
1200 };
1201
1202 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1203 {
1204 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1205 &s3c_device_sdi);
1206 }
1207 #endif /* CONFIG_PLAT_S3C24XX */
1208
1209 /* SPI */
1210
1211 #ifdef CONFIG_PLAT_S3C24XX
1212 static struct resource s3c_spi0_resource[] = {
1213 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1214 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1215 };
1216
1217 struct platform_device s3c_device_spi0 = {
1218 .name = "s3c2410-spi",
1219 .id = 0,
1220 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1221 .resource = s3c_spi0_resource,
1222 .dev = {
1223 .dma_mask = &samsung_device_dma_mask,
1224 .coherent_dma_mask = DMA_BIT_MASK(32),
1225 }
1226 };
1227
1228 static struct resource s3c_spi1_resource[] = {
1229 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1230 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1231 };
1232
1233 struct platform_device s3c_device_spi1 = {
1234 .name = "s3c2410-spi",
1235 .id = 1,
1236 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1237 .resource = s3c_spi1_resource,
1238 .dev = {
1239 .dma_mask = &samsung_device_dma_mask,
1240 .coherent_dma_mask = DMA_BIT_MASK(32),
1241 }
1242 };
1243 #endif /* CONFIG_PLAT_S3C24XX */
1244
1245 /* Touchscreen */
1246
1247 #ifdef CONFIG_PLAT_S3C24XX
1248 static struct resource s3c_ts_resource[] = {
1249 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1250 [1] = DEFINE_RES_IRQ(IRQ_TC),
1251 };
1252
1253 struct platform_device s3c_device_ts = {
1254 .name = "s3c2410-ts",
1255 .id = -1,
1256 .dev.parent = &s3c_device_adc.dev,
1257 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1258 .resource = s3c_ts_resource,
1259 };
1260
1261 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1262 {
1263 s3c_set_platdata(hard_s3c2410ts_info,
1264 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1265 }
1266 #endif /* CONFIG_PLAT_S3C24XX */
1267
1268 #ifdef CONFIG_SAMSUNG_DEV_TS
1269 static struct resource s3c_ts_resource[] = {
1270 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1271 [1] = DEFINE_RES_IRQ(IRQ_TC),
1272 };
1273
1274 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1275 .delay = 10000,
1276 .presc = 49,
1277 .oversampling_shift = 2,
1278 };
1279
1280 struct platform_device s3c_device_ts = {
1281 .name = "s3c64xx-ts",
1282 .id = -1,
1283 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1284 .resource = s3c_ts_resource,
1285 };
1286
1287 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1288 {
1289 if (!pd)
1290 pd = &default_ts_data;
1291
1292 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1293 &s3c_device_ts);
1294 }
1295 #endif /* CONFIG_SAMSUNG_DEV_TS */
1296
1297 /* TV */
1298
1299 #ifdef CONFIG_S5P_DEV_TV
1300
1301 static struct resource s5p_hdmi_resources[] = {
1302 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1303 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1304 };
1305
1306 struct platform_device s5p_device_hdmi = {
1307 .name = "s5p-hdmi",
1308 .id = -1,
1309 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1310 .resource = s5p_hdmi_resources,
1311 };
1312
1313 static struct resource s5p_sdo_resources[] = {
1314 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1315 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1316 };
1317
1318 struct platform_device s5p_device_sdo = {
1319 .name = "s5p-sdo",
1320 .id = -1,
1321 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1322 .resource = s5p_sdo_resources,
1323 };
1324
1325 static struct resource s5p_mixer_resources[] = {
1326 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1327 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1328 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1329 };
1330
1331 struct platform_device s5p_device_mixer = {
1332 .name = "s5p-mixer",
1333 .id = -1,
1334 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1335 .resource = s5p_mixer_resources,
1336 .dev = {
1337 .dma_mask = &samsung_device_dma_mask,
1338 .coherent_dma_mask = DMA_BIT_MASK(32),
1339 }
1340 };
1341 #endif /* CONFIG_S5P_DEV_TV */
1342
1343 /* USB */
1344
1345 #ifdef CONFIG_S3C_DEV_USB_HOST
1346 static struct resource s3c_usb_resource[] = {
1347 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1348 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1349 };
1350
1351 struct platform_device s3c_device_ohci = {
1352 .name = "s3c2410-ohci",
1353 .id = -1,
1354 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1355 .resource = s3c_usb_resource,
1356 .dev = {
1357 .dma_mask = &samsung_device_dma_mask,
1358 .coherent_dma_mask = DMA_BIT_MASK(32),
1359 }
1360 };
1361
1362 /*
1363 * s3c_ohci_set_platdata - initialise OHCI device platform data
1364 * @info: The platform data.
1365 *
1366 * This call copies the @info passed in and sets the device .platform_data
1367 * field to that copy. The @info is copied so that the original can be marked
1368 * __initdata.
1369 */
1370
1371 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1372 {
1373 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1374 &s3c_device_ohci);
1375 }
1376 #endif /* CONFIG_S3C_DEV_USB_HOST */
1377
1378 /* USB Device (Gadget) */
1379
1380 #ifdef CONFIG_PLAT_S3C24XX
1381 static struct resource s3c_usbgadget_resource[] = {
1382 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1383 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1384 };
1385
1386 struct platform_device s3c_device_usbgadget = {
1387 .name = "s3c2410-usbgadget",
1388 .id = -1,
1389 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1390 .resource = s3c_usbgadget_resource,
1391 };
1392
1393 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1394 {
1395 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1396 }
1397 #endif /* CONFIG_PLAT_S3C24XX */
1398
1399 /* USB EHCI Host Controller */
1400
1401 #ifdef CONFIG_S5P_DEV_USB_EHCI
1402 static struct resource s5p_ehci_resource[] = {
1403 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1404 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1405 };
1406
1407 struct platform_device s5p_device_ehci = {
1408 .name = "s5p-ehci",
1409 .id = -1,
1410 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1411 .resource = s5p_ehci_resource,
1412 .dev = {
1413 .dma_mask = &samsung_device_dma_mask,
1414 .coherent_dma_mask = DMA_BIT_MASK(32),
1415 }
1416 };
1417
1418 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1419 {
1420 struct s5p_ehci_platdata *npd;
1421
1422 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1423 &s5p_device_ehci);
1424
1425 if (!npd->phy_init)
1426 npd->phy_init = s5p_usb_phy_init;
1427 if (!npd->phy_exit)
1428 npd->phy_exit = s5p_usb_phy_exit;
1429 }
1430 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1431
1432 /* USB HSOTG */
1433
1434 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1435 static struct resource s3c_usb_hsotg_resources[] = {
1436 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1437 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1438 };
1439
1440 struct platform_device s3c_device_usb_hsotg = {
1441 .name = "s3c-hsotg",
1442 .id = -1,
1443 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1444 .resource = s3c_usb_hsotg_resources,
1445 .dev = {
1446 .dma_mask = &samsung_device_dma_mask,
1447 .coherent_dma_mask = DMA_BIT_MASK(32),
1448 },
1449 };
1450
1451 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1452 {
1453 struct s3c_hsotg_plat *npd;
1454
1455 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1456 &s3c_device_usb_hsotg);
1457
1458 if (!npd->phy_init)
1459 npd->phy_init = s5p_usb_phy_init;
1460 if (!npd->phy_exit)
1461 npd->phy_exit = s5p_usb_phy_exit;
1462 }
1463 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1464
1465 /* USB High Spped 2.0 Device (Gadget) */
1466
1467 #ifdef CONFIG_PLAT_S3C24XX
1468 static struct resource s3c_hsudc_resource[] = {
1469 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1470 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1471 };
1472
1473 struct platform_device s3c_device_usb_hsudc = {
1474 .name = "s3c-hsudc",
1475 .id = -1,
1476 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1477 .resource = s3c_hsudc_resource,
1478 .dev = {
1479 .dma_mask = &samsung_device_dma_mask,
1480 .coherent_dma_mask = DMA_BIT_MASK(32),
1481 },
1482 };
1483
1484 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1485 {
1486 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1487 }
1488 #endif /* CONFIG_PLAT_S3C24XX */
1489
1490 /* WDT */
1491
1492 #ifdef CONFIG_S3C_DEV_WDT
1493 static struct resource s3c_wdt_resource[] = {
1494 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1495 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1496 };
1497
1498 struct platform_device s3c_device_wdt = {
1499 .name = "s3c2410-wdt",
1500 .id = -1,
1501 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1502 .resource = s3c_wdt_resource,
1503 };
1504 #endif /* CONFIG_S3C_DEV_WDT */
1505
1506 #ifdef CONFIG_S3C64XX_DEV_SPI0
1507 static struct resource s3c64xx_spi0_resource[] = {
1508 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1509 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1510 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1511 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1512 };
1513
1514 struct platform_device s3c64xx_device_spi0 = {
1515 .name = "s3c6410-spi",
1516 .id = 0,
1517 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1518 .resource = s3c64xx_spi0_resource,
1519 .dev = {
1520 .dma_mask = &samsung_device_dma_mask,
1521 .coherent_dma_mask = DMA_BIT_MASK(32),
1522 },
1523 };
1524
1525 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1526 int num_cs)
1527 {
1528 struct s3c64xx_spi_info pd;
1529
1530 /* Reject invalid configuration */
1531 if (!num_cs || src_clk_nr < 0) {
1532 pr_err("%s: Invalid SPI configuration\n", __func__);
1533 return;
1534 }
1535
1536 pd.num_cs = num_cs;
1537 pd.src_clk_nr = src_clk_nr;
1538 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1539
1540 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1541 }
1542 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1543
1544 #ifdef CONFIG_S3C64XX_DEV_SPI1
1545 static struct resource s3c64xx_spi1_resource[] = {
1546 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1547 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1548 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1549 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1550 };
1551
1552 struct platform_device s3c64xx_device_spi1 = {
1553 .name = "s3c6410-spi",
1554 .id = 1,
1555 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1556 .resource = s3c64xx_spi1_resource,
1557 .dev = {
1558 .dma_mask = &samsung_device_dma_mask,
1559 .coherent_dma_mask = DMA_BIT_MASK(32),
1560 },
1561 };
1562
1563 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1564 int num_cs)
1565 {
1566 /* Reject invalid configuration */
1567 if (!num_cs || src_clk_nr < 0) {
1568 pr_err("%s: Invalid SPI configuration\n", __func__);
1569 return;
1570 }
1571
1572 pd.num_cs = num_cs;
1573 pd.src_clk_nr = src_clk_nr;
1574 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1575
1576 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1577 }
1578 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1579
1580 #ifdef CONFIG_S3C64XX_DEV_SPI2
1581 static struct resource s3c64xx_spi2_resource[] = {
1582 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1583 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1584 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1585 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1586 };
1587
1588 struct platform_device s3c64xx_device_spi2 = {
1589 .name = "s3c6410-spi",
1590 .id = 2,
1591 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1592 .resource = s3c64xx_spi2_resource,
1593 .dev = {
1594 .dma_mask = &samsung_device_dma_mask,
1595 .coherent_dma_mask = DMA_BIT_MASK(32),
1596 },
1597 };
1598
1599 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1600 int num_cs)
1601 {
1602 struct s3c64xx_spi_info pd;
1603
1604 /* Reject invalid configuration */
1605 if (!num_cs || src_clk_nr < 0) {
1606 pr_err("%s: Invalid SPI configuration\n", __func__);
1607 return;
1608 }
1609
1610 pd.num_cs = num_cs;
1611 pd.src_clk_nr = src_clk_nr;
1612 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1613
1614 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1615 }
1616 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
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