projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'next/soc-exynos5250-gpio' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33
34 #include <asm/irq.h>
35 #include <asm/pmu.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39
40 #include <mach/hardware.h>
41 #include <mach/dma.h>
42 #include <mach/irqs.h>
43 #include <mach/map.h>
44
45 #include <plat/cpu.h>
46 #include <plat/devs.h>
47 #include <plat/adc.h>
48 #include <plat/ata.h>
49 #include <plat/ehci.h>
50 #include <plat/fb.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
53 #include <plat/iic.h>
54 #include <plat/keypad.h>
55 #include <plat/mci.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
58 #include <plat/ts.h>
59 #include <plat/udc.h>
60 #include <plat/usb-control.h>
61 #include <plat/usb-phy.h>
62 #include <plat/regs-iic.h>
63 #include <plat/regs-serial.h>
64 #include <plat/regs-spi.h>
65 #include <plat/s3c64xx-spi.h>
66
67 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
68
69 /* AC97 */
70 #ifdef CONFIG_CPU_S3C2440
71 static struct resource s3c_ac97_resource[] = {
72 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
73 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
74 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
75 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
76 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
77 };
78
79 struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88 };
89 #endif /* CONFIG_CPU_S3C2440 */
90
91 /* ADC */
92
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98 };
99
100 struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105 };
106 #endif /* CONFIG_PLAT_S3C24XX */
107
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_TC),
112 [2] = DEFINE_RES_IRQ(IRQ_ADC),
113 };
114
115 struct platform_device s3c_device_adc = {
116 .name = "samsung-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120 };
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123 /* Camif Controller */
124
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_CAM),
129 };
130
131 struct platform_device s3c_device_camif = {
132 .name = "s3c2440-camif",
133 .id = -1,
134 .num_resources = ARRAY_SIZE(s3c_camif_resource),
135 .resource = s3c_camif_resource,
136 .dev = {
137 .dma_mask = &samsung_device_dma_mask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 }
140 };
141 #endif /* CONFIG_CPU_S3C2440 */
142
143 /* ASOC DMA */
144
145 struct platform_device samsung_asoc_dma = {
146 .name = "samsung-audio",
147 .id = -1,
148 .dev = {
149 .dma_mask = &samsung_device_dma_mask,
150 .coherent_dma_mask = DMA_BIT_MASK(32),
151 }
152 };
153
154 struct platform_device samsung_asoc_idma = {
155 .name = "samsung-idma",
156 .id = -1,
157 .dev = {
158 .dma_mask = &samsung_device_dma_mask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
160 }
161 };
162
163 /* FB */
164
165 #ifdef CONFIG_S3C_DEV_FB
166 static struct resource s3c_fb_resource[] = {
167 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
168 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
169 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
170 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
171 };
172
173 struct platform_device s3c_device_fb = {
174 .name = "s3c-fb",
175 .id = -1,
176 .num_resources = ARRAY_SIZE(s3c_fb_resource),
177 .resource = s3c_fb_resource,
178 .dev = {
179 .dma_mask = &samsung_device_dma_mask,
180 .coherent_dma_mask = DMA_BIT_MASK(32),
181 },
182 };
183
184 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
185 {
186 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
187 &s3c_device_fb);
188 }
189 #endif /* CONFIG_S3C_DEV_FB */
190
191 /* FIMC */
192
193 #ifdef CONFIG_S5P_DEV_FIMC0
194 static struct resource s5p_fimc0_resource[] = {
195 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
196 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
197 };
198
199 struct platform_device s5p_device_fimc0 = {
200 .name = "s5p-fimc",
201 .id = 0,
202 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
203 .resource = s5p_fimc0_resource,
204 .dev = {
205 .dma_mask = &samsung_device_dma_mask,
206 .coherent_dma_mask = DMA_BIT_MASK(32),
207 },
208 };
209
210 struct platform_device s5p_device_fimc_md = {
211 .name = "s5p-fimc-md",
212 .id = -1,
213 };
214 #endif /* CONFIG_S5P_DEV_FIMC0 */
215
216 #ifdef CONFIG_S5P_DEV_FIMC1
217 static struct resource s5p_fimc1_resource[] = {
218 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
219 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
220 };
221
222 struct platform_device s5p_device_fimc1 = {
223 .name = "s5p-fimc",
224 .id = 1,
225 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
226 .resource = s5p_fimc1_resource,
227 .dev = {
228 .dma_mask = &samsung_device_dma_mask,
229 .coherent_dma_mask = DMA_BIT_MASK(32),
230 },
231 };
232 #endif /* CONFIG_S5P_DEV_FIMC1 */
233
234 #ifdef CONFIG_S5P_DEV_FIMC2
235 static struct resource s5p_fimc2_resource[] = {
236 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
237 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
238 };
239
240 struct platform_device s5p_device_fimc2 = {
241 .name = "s5p-fimc",
242 .id = 2,
243 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
244 .resource = s5p_fimc2_resource,
245 .dev = {
246 .dma_mask = &samsung_device_dma_mask,
247 .coherent_dma_mask = DMA_BIT_MASK(32),
248 },
249 };
250 #endif /* CONFIG_S5P_DEV_FIMC2 */
251
252 #ifdef CONFIG_S5P_DEV_FIMC3
253 static struct resource s5p_fimc3_resource[] = {
254 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
255 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
256 };
257
258 struct platform_device s5p_device_fimc3 = {
259 .name = "s5p-fimc",
260 .id = 3,
261 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
262 .resource = s5p_fimc3_resource,
263 .dev = {
264 .dma_mask = &samsung_device_dma_mask,
265 .coherent_dma_mask = DMA_BIT_MASK(32),
266 },
267 };
268 #endif /* CONFIG_S5P_DEV_FIMC3 */
269
270 /* FIMD0 */
271
272 #ifdef CONFIG_S5P_DEV_FIMD0
273 static struct resource s5p_fimd0_resource[] = {
274 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
275 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
276 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
277 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
278 };
279
280 struct platform_device s5p_device_fimd0 = {
281 .name = "s5p-fb",
282 .id = 0,
283 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
284 .resource = s5p_fimd0_resource,
285 .dev = {
286 .dma_mask = &samsung_device_dma_mask,
287 .coherent_dma_mask = DMA_BIT_MASK(32),
288 },
289 };
290
291 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
292 {
293 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
294 &s5p_device_fimd0);
295 }
296 #endif /* CONFIG_S5P_DEV_FIMD0 */
297
298 /* HWMON */
299
300 #ifdef CONFIG_S3C_DEV_HWMON
301 struct platform_device s3c_device_hwmon = {
302 .name = "s3c-hwmon",
303 .id = -1,
304 .dev.parent = &s3c_device_adc.dev,
305 };
306
307 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
308 {
309 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
310 &s3c_device_hwmon);
311 }
312 #endif /* CONFIG_S3C_DEV_HWMON */
313
314 /* HSMMC */
315
316 #ifdef CONFIG_S3C_DEV_HSMMC
317 static struct resource s3c_hsmmc_resource[] = {
318 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
319 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
320 };
321
322 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
323 .max_width = 4,
324 .host_caps = (MMC_CAP_4_BIT_DATA |
325 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
326 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
327 };
328
329 struct platform_device s3c_device_hsmmc0 = {
330 .name = "s3c-sdhci",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
333 .resource = s3c_hsmmc_resource,
334 .dev = {
335 .dma_mask = &samsung_device_dma_mask,
336 .coherent_dma_mask = DMA_BIT_MASK(32),
337 .platform_data = &s3c_hsmmc0_def_platdata,
338 },
339 };
340
341 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
342 {
343 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
344 }
345 #endif /* CONFIG_S3C_DEV_HSMMC */
346
347 #ifdef CONFIG_S3C_DEV_HSMMC1
348 static struct resource s3c_hsmmc1_resource[] = {
349 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
350 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
351 };
352
353 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
354 .max_width = 4,
355 .host_caps = (MMC_CAP_4_BIT_DATA |
356 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
357 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
358 };
359
360 struct platform_device s3c_device_hsmmc1 = {
361 .name = "s3c-sdhci",
362 .id = 1,
363 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
364 .resource = s3c_hsmmc1_resource,
365 .dev = {
366 .dma_mask = &samsung_device_dma_mask,
367 .coherent_dma_mask = DMA_BIT_MASK(32),
368 .platform_data = &s3c_hsmmc1_def_platdata,
369 },
370 };
371
372 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
373 {
374 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
375 }
376 #endif /* CONFIG_S3C_DEV_HSMMC1 */
377
378 /* HSMMC2 */
379
380 #ifdef CONFIG_S3C_DEV_HSMMC2
381 static struct resource s3c_hsmmc2_resource[] = {
382 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
383 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
384 };
385
386 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
387 .max_width = 4,
388 .host_caps = (MMC_CAP_4_BIT_DATA |
389 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
390 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
391 };
392
393 struct platform_device s3c_device_hsmmc2 = {
394 .name = "s3c-sdhci",
395 .id = 2,
396 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
397 .resource = s3c_hsmmc2_resource,
398 .dev = {
399 .dma_mask = &samsung_device_dma_mask,
400 .coherent_dma_mask = DMA_BIT_MASK(32),
401 .platform_data = &s3c_hsmmc2_def_platdata,
402 },
403 };
404
405 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
406 {
407 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
408 }
409 #endif /* CONFIG_S3C_DEV_HSMMC2 */
410
411 #ifdef CONFIG_S3C_DEV_HSMMC3
412 static struct resource s3c_hsmmc3_resource[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
415 };
416
417 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
418 .max_width = 4,
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
421 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
422 };
423
424 struct platform_device s3c_device_hsmmc3 = {
425 .name = "s3c-sdhci",
426 .id = 3,
427 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
428 .resource = s3c_hsmmc3_resource,
429 .dev = {
430 .dma_mask = &samsung_device_dma_mask,
431 .coherent_dma_mask = DMA_BIT_MASK(32),
432 .platform_data = &s3c_hsmmc3_def_platdata,
433 },
434 };
435
436 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
437 {
438 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
439 }
440 #endif /* CONFIG_S3C_DEV_HSMMC3 */
441
442 /* I2C */
443
444 static struct resource s3c_i2c0_resource[] = {
445 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
446 [1] = DEFINE_RES_IRQ(IRQ_IIC),
447 };
448
449 struct platform_device s3c_device_i2c0 = {
450 .name = "s3c2410-i2c",
451 #ifdef CONFIG_S3C_DEV_I2C1
452 .id = 0,
453 #else
454 .id = -1,
455 #endif
456 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
457 .resource = s3c_i2c0_resource,
458 };
459
460 struct s3c2410_platform_i2c default_i2c_data __initdata = {
461 .flags = 0,
462 .slave_addr = 0x10,
463 .frequency = 100*1000,
464 .sda_delay = 100,
465 };
466
467 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
468 {
469 struct s3c2410_platform_i2c *npd;
470
471 if (!pd) {
472 pd = &default_i2c_data;
473 pd->bus_num = 0;
474 }
475
476 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
477 &s3c_device_i2c0);
478
479 if (!npd->cfg_gpio)
480 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
481 }
482
483 #ifdef CONFIG_S3C_DEV_I2C1
484 static struct resource s3c_i2c1_resource[] = {
485 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
486 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
487 };
488
489 struct platform_device s3c_device_i2c1 = {
490 .name = "s3c2410-i2c",
491 .id = 1,
492 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
493 .resource = s3c_i2c1_resource,
494 };
495
496 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
497 {
498 struct s3c2410_platform_i2c *npd;
499
500 if (!pd) {
501 pd = &default_i2c_data;
502 pd->bus_num = 1;
503 }
504
505 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
506 &s3c_device_i2c1);
507
508 if (!npd->cfg_gpio)
509 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
510 }
511 #endif /* CONFIG_S3C_DEV_I2C1 */
512
513 #ifdef CONFIG_S3C_DEV_I2C2
514 static struct resource s3c_i2c2_resource[] = {
515 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
516 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
517 };
518
519 struct platform_device s3c_device_i2c2 = {
520 .name = "s3c2410-i2c",
521 .id = 2,
522 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
523 .resource = s3c_i2c2_resource,
524 };
525
526 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
527 {
528 struct s3c2410_platform_i2c *npd;
529
530 if (!pd) {
531 pd = &default_i2c_data;
532 pd->bus_num = 2;
533 }
534
535 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
536 &s3c_device_i2c2);
537
538 if (!npd->cfg_gpio)
539 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
540 }
541 #endif /* CONFIG_S3C_DEV_I2C2 */
542
543 #ifdef CONFIG_S3C_DEV_I2C3
544 static struct resource s3c_i2c3_resource[] = {
545 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
546 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
547 };
548
549 struct platform_device s3c_device_i2c3 = {
550 .name = "s3c2440-i2c",
551 .id = 3,
552 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
553 .resource = s3c_i2c3_resource,
554 };
555
556 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
557 {
558 struct s3c2410_platform_i2c *npd;
559
560 if (!pd) {
561 pd = &default_i2c_data;
562 pd->bus_num = 3;
563 }
564
565 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
566 &s3c_device_i2c3);
567
568 if (!npd->cfg_gpio)
569 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
570 }
571 #endif /*CONFIG_S3C_DEV_I2C3 */
572
573 #ifdef CONFIG_S3C_DEV_I2C4
574 static struct resource s3c_i2c4_resource[] = {
575 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
576 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
577 };
578
579 struct platform_device s3c_device_i2c4 = {
580 .name = "s3c2440-i2c",
581 .id = 4,
582 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
583 .resource = s3c_i2c4_resource,
584 };
585
586 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
587 {
588 struct s3c2410_platform_i2c *npd;
589
590 if (!pd) {
591 pd = &default_i2c_data;
592 pd->bus_num = 4;
593 }
594
595 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
596 &s3c_device_i2c4);
597
598 if (!npd->cfg_gpio)
599 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
600 }
601 #endif /*CONFIG_S3C_DEV_I2C4 */
602
603 #ifdef CONFIG_S3C_DEV_I2C5
604 static struct resource s3c_i2c5_resource[] = {
605 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
606 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
607 };
608
609 struct platform_device s3c_device_i2c5 = {
610 .name = "s3c2440-i2c",
611 .id = 5,
612 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
613 .resource = s3c_i2c5_resource,
614 };
615
616 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
617 {
618 struct s3c2410_platform_i2c *npd;
619
620 if (!pd) {
621 pd = &default_i2c_data;
622 pd->bus_num = 5;
623 }
624
625 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
626 &s3c_device_i2c5);
627
628 if (!npd->cfg_gpio)
629 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
630 }
631 #endif /*CONFIG_S3C_DEV_I2C5 */
632
633 #ifdef CONFIG_S3C_DEV_I2C6
634 static struct resource s3c_i2c6_resource[] = {
635 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
636 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
637 };
638
639 struct platform_device s3c_device_i2c6 = {
640 .name = "s3c2440-i2c",
641 .id = 6,
642 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
643 .resource = s3c_i2c6_resource,
644 };
645
646 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
647 {
648 struct s3c2410_platform_i2c *npd;
649
650 if (!pd) {
651 pd = &default_i2c_data;
652 pd->bus_num = 6;
653 }
654
655 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
656 &s3c_device_i2c6);
657
658 if (!npd->cfg_gpio)
659 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
660 }
661 #endif /* CONFIG_S3C_DEV_I2C6 */
662
663 #ifdef CONFIG_S3C_DEV_I2C7
664 static struct resource s3c_i2c7_resource[] = {
665 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
666 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
667 };
668
669 struct platform_device s3c_device_i2c7 = {
670 .name = "s3c2440-i2c",
671 .id = 7,
672 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
673 .resource = s3c_i2c7_resource,
674 };
675
676 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
677 {
678 struct s3c2410_platform_i2c *npd;
679
680 if (!pd) {
681 pd = &default_i2c_data;
682 pd->bus_num = 7;
683 }
684
685 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
686 &s3c_device_i2c7);
687
688 if (!npd->cfg_gpio)
689 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
690 }
691 #endif /* CONFIG_S3C_DEV_I2C7 */
692
693 /* I2C HDMIPHY */
694
695 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
696 static struct resource s5p_i2c_resource[] = {
697 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
698 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
699 };
700
701 struct platform_device s5p_device_i2c_hdmiphy = {
702 .name = "s3c2440-hdmiphy-i2c",
703 .id = -1,
704 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
705 .resource = s5p_i2c_resource,
706 };
707
708 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
709 {
710 struct s3c2410_platform_i2c *npd;
711
712 if (!pd) {
713 pd = &default_i2c_data;
714
715 if (soc_is_exynos4210())
716 pd->bus_num = 8;
717 else if (soc_is_s5pv210())
718 pd->bus_num = 3;
719 else
720 pd->bus_num = 0;
721 }
722
723 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
724 &s5p_device_i2c_hdmiphy);
725 }
726 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
727
728 /* I2S */
729
730 #ifdef CONFIG_PLAT_S3C24XX
731 static struct resource s3c_iis_resource[] = {
732 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
733 };
734
735 struct platform_device s3c_device_iis = {
736 .name = "s3c24xx-iis",
737 .id = -1,
738 .num_resources = ARRAY_SIZE(s3c_iis_resource),
739 .resource = s3c_iis_resource,
740 .dev = {
741 .dma_mask = &samsung_device_dma_mask,
742 .coherent_dma_mask = DMA_BIT_MASK(32),
743 }
744 };
745 #endif /* CONFIG_PLAT_S3C24XX */
746
747 /* IDE CFCON */
748
749 #ifdef CONFIG_SAMSUNG_DEV_IDE
750 static struct resource s3c_cfcon_resource[] = {
751 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
752 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
753 };
754
755 struct platform_device s3c_device_cfcon = {
756 .id = 0,
757 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
758 .resource = s3c_cfcon_resource,
759 };
760
761 void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
762 {
763 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
764 &s3c_device_cfcon);
765 }
766 #endif /* CONFIG_SAMSUNG_DEV_IDE */
767
768 /* KEYPAD */
769
770 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
771 static struct resource samsung_keypad_resources[] = {
772 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
773 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
774 };
775
776 struct platform_device samsung_device_keypad = {
777 .name = "samsung-keypad",
778 .id = -1,
779 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
780 .resource = samsung_keypad_resources,
781 };
782
783 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
784 {
785 struct samsung_keypad_platdata *npd;
786
787 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
788 &samsung_device_keypad);
789
790 if (!npd->cfg_gpio)
791 npd->cfg_gpio = samsung_keypad_cfg_gpio;
792 }
793 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
794
795 /* LCD Controller */
796
797 #ifdef CONFIG_PLAT_S3C24XX
798 static struct resource s3c_lcd_resource[] = {
799 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
800 [1] = DEFINE_RES_IRQ(IRQ_LCD),
801 };
802
803 struct platform_device s3c_device_lcd = {
804 .name = "s3c2410-lcd",
805 .id = -1,
806 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
807 .resource = s3c_lcd_resource,
808 .dev = {
809 .dma_mask = &samsung_device_dma_mask,
810 .coherent_dma_mask = DMA_BIT_MASK(32),
811 }
812 };
813
814 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
815 {
816 struct s3c2410fb_mach_info *npd;
817
818 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
819 if (npd) {
820 npd->displays = kmemdup(pd->displays,
821 sizeof(struct s3c2410fb_display) * npd->num_displays,
822 GFP_KERNEL);
823 if (!npd->displays)
824 printk(KERN_ERR "no memory for LCD display data\n");
825 } else {
826 printk(KERN_ERR "no memory for LCD platform data\n");
827 }
828 }
829 #endif /* CONFIG_PLAT_S3C24XX */
830
831 /* MFC */
832
833 #ifdef CONFIG_S5P_DEV_MFC
834 static struct resource s5p_mfc_resource[] = {
835 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
836 [1] = DEFINE_RES_IRQ(IRQ_MFC),
837 };
838
839 struct platform_device s5p_device_mfc = {
840 .name = "s5p-mfc",
841 .id = -1,
842 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
843 .resource = s5p_mfc_resource,
844 };
845
846 /*
847 * MFC hardware has 2 memory interfaces which are modelled as two separate
848 * platform devices to let dma-mapping distinguish between them.
849 *
850 * MFC parent device (s5p_device_mfc) must be registered before memory
851 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
852 */
853
854 struct platform_device s5p_device_mfc_l = {
855 .name = "s5p-mfc-l",
856 .id = -1,
857 .dev = {
858 .parent = &s5p_device_mfc.dev,
859 .dma_mask = &samsung_device_dma_mask,
860 .coherent_dma_mask = DMA_BIT_MASK(32),
861 },
862 };
863
864 struct platform_device s5p_device_mfc_r = {
865 .name = "s5p-mfc-r",
866 .id = -1,
867 .dev = {
868 .parent = &s5p_device_mfc.dev,
869 .dma_mask = &samsung_device_dma_mask,
870 .coherent_dma_mask = DMA_BIT_MASK(32),
871 },
872 };
873 #endif /* CONFIG_S5P_DEV_MFC */
874
875 /* MIPI CSIS */
876
877 #ifdef CONFIG_S5P_DEV_CSIS0
878 static struct resource s5p_mipi_csis0_resource[] = {
879 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
880 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
881 };
882
883 struct platform_device s5p_device_mipi_csis0 = {
884 .name = "s5p-mipi-csis",
885 .id = 0,
886 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
887 .resource = s5p_mipi_csis0_resource,
888 };
889 #endif /* CONFIG_S5P_DEV_CSIS0 */
890
891 #ifdef CONFIG_S5P_DEV_CSIS1
892 static struct resource s5p_mipi_csis1_resource[] = {
893 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
894 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
895 };
896
897 struct platform_device s5p_device_mipi_csis1 = {
898 .name = "s5p-mipi-csis",
899 .id = 1,
900 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
901 .resource = s5p_mipi_csis1_resource,
902 };
903 #endif
904
905 /* NAND */
906
907 #ifdef CONFIG_S3C_DEV_NAND
908 static struct resource s3c_nand_resource[] = {
909 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
910 };
911
912 struct platform_device s3c_device_nand = {
913 .name = "s3c2410-nand",
914 .id = -1,
915 .num_resources = ARRAY_SIZE(s3c_nand_resource),
916 .resource = s3c_nand_resource,
917 };
918
919 /*
920 * s3c_nand_copy_set() - copy nand set data
921 * @set: The new structure, directly copied from the old.
922 *
923 * Copy all the fields from the NAND set field from what is probably __initdata
924 * to new kernel memory. The code returns 0 if the copy happened correctly or
925 * an error code for the calling function to display.
926 *
927 * Note, we currently do not try and look to see if we've already copied the
928 * data in a previous set.
929 */
930 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
931 {
932 void *ptr;
933 int size;
934
935 size = sizeof(struct mtd_partition) * set->nr_partitions;
936 if (size) {
937 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
938 set->partitions = ptr;
939
940 if (!ptr)
941 return -ENOMEM;
942 }
943
944 if (set->nr_map && set->nr_chips) {
945 size = sizeof(int) * set->nr_chips;
946 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
947 set->nr_map = ptr;
948
949 if (!ptr)
950 return -ENOMEM;
951 }
952
953 if (set->ecc_layout) {
954 ptr = kmemdup(set->ecc_layout,
955 sizeof(struct nand_ecclayout), GFP_KERNEL);
956 set->ecc_layout = ptr;
957
958 if (!ptr)
959 return -ENOMEM;
960 }
961
962 return 0;
963 }
964
965 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
966 {
967 struct s3c2410_platform_nand *npd;
968 int size;
969 int ret;
970
971 /* note, if we get a failure in allocation, we simply drop out of the
972 * function. If there is so little memory available at initialisation
973 * time then there is little chance the system is going to run.
974 */
975
976 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
977 &s3c_device_nand);
978 if (!npd)
979 return;
980
981 /* now see if we need to copy any of the nand set data */
982
983 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
984 if (size) {
985 struct s3c2410_nand_set *from = npd->sets;
986 struct s3c2410_nand_set *to;
987 int i;
988
989 to = kmemdup(from, size, GFP_KERNEL);
990 npd->sets = to; /* set, even if we failed */
991
992 if (!to) {
993 printk(KERN_ERR "%s: no memory for sets\n", __func__);
994 return;
995 }
996
997 for (i = 0; i < npd->nr_sets; i++) {
998 ret = s3c_nand_copy_set(to);
999 if (ret) {
1000 printk(KERN_ERR "%s: failed to copy set %d\n",
1001 __func__, i);
1002 return;
1003 }
1004 to++;
1005 }
1006 }
1007 }
1008 #endif /* CONFIG_S3C_DEV_NAND */
1009
1010 /* ONENAND */
1011
1012 #ifdef CONFIG_S3C_DEV_ONENAND
1013 static struct resource s3c_onenand_resources[] = {
1014 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1015 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1016 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1017 };
1018
1019 struct platform_device s3c_device_onenand = {
1020 .name = "samsung-onenand",
1021 .id = 0,
1022 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1023 .resource = s3c_onenand_resources,
1024 };
1025 #endif /* CONFIG_S3C_DEV_ONENAND */
1026
1027 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1028 static struct resource s3c64xx_onenand1_resources[] = {
1029 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1030 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1031 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1032 };
1033
1034 struct platform_device s3c64xx_device_onenand1 = {
1035 .name = "samsung-onenand",
1036 .id = 1,
1037 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1038 .resource = s3c64xx_onenand1_resources,
1039 };
1040
1041 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1042 {
1043 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1044 &s3c64xx_device_onenand1);
1045 }
1046 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1047
1048 #ifdef CONFIG_S5P_DEV_ONENAND
1049 static struct resource s5p_onenand_resources[] = {
1050 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1051 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1052 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1053 };
1054
1055 struct platform_device s5p_device_onenand = {
1056 .name = "s5pc110-onenand",
1057 .id = -1,
1058 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1059 .resource = s5p_onenand_resources,
1060 };
1061 #endif /* CONFIG_S5P_DEV_ONENAND */
1062
1063 /* PMU */
1064
1065 #ifdef CONFIG_PLAT_S5P
1066 static struct resource s5p_pmu_resource[] = {
1067 DEFINE_RES_IRQ(IRQ_PMU)
1068 };
1069
1070 static struct platform_device s5p_device_pmu = {
1071 .name = "arm-pmu",
1072 .id = ARM_PMU_DEVICE_CPU,
1073 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1074 .resource = s5p_pmu_resource,
1075 };
1076
1077 static int __init s5p_pmu_init(void)
1078 {
1079 platform_device_register(&s5p_device_pmu);
1080 return 0;
1081 }
1082 arch_initcall(s5p_pmu_init);
1083 #endif /* CONFIG_PLAT_S5P */
1084
1085 /* PWM Timer */
1086
1087 #ifdef CONFIG_SAMSUNG_DEV_PWM
1088
1089 #define TIMER_RESOURCE_SIZE (1)
1090
1091 #define TIMER_RESOURCE(_tmr, _irq) \
1092 (struct resource [TIMER_RESOURCE_SIZE]) { \
1093 [0] = { \
1094 .start = _irq, \
1095 .end = _irq, \
1096 .flags = IORESOURCE_IRQ \
1097 } \
1098 }
1099
1100 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1101 .name = "s3c24xx-pwm", \
1102 .id = _tmr_no, \
1103 .num_resources = TIMER_RESOURCE_SIZE, \
1104 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1105
1106 /*
1107 * since we already have an static mapping for the timer,
1108 * we do not bother setting any IO resource for the base.
1109 */
1110
1111 struct platform_device s3c_device_timer[] = {
1112 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1113 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1114 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1115 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1116 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1117 };
1118 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1119
1120 /* RTC */
1121
1122 #ifdef CONFIG_PLAT_S3C24XX
1123 static struct resource s3c_rtc_resource[] = {
1124 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1125 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1126 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1127 };
1128
1129 struct platform_device s3c_device_rtc = {
1130 .name = "s3c2410-rtc",
1131 .id = -1,
1132 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1133 .resource = s3c_rtc_resource,
1134 };
1135 #endif /* CONFIG_PLAT_S3C24XX */
1136
1137 #ifdef CONFIG_S3C_DEV_RTC
1138 static struct resource s3c_rtc_resource[] = {
1139 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1140 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1141 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1142 };
1143
1144 struct platform_device s3c_device_rtc = {
1145 .name = "s3c64xx-rtc",
1146 .id = -1,
1147 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1148 .resource = s3c_rtc_resource,
1149 };
1150 #endif /* CONFIG_S3C_DEV_RTC */
1151
1152 /* SDI */
1153
1154 #ifdef CONFIG_PLAT_S3C24XX
1155 static struct resource s3c_sdi_resource[] = {
1156 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1157 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1158 };
1159
1160 struct platform_device s3c_device_sdi = {
1161 .name = "s3c2410-sdi",
1162 .id = -1,
1163 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1164 .resource = s3c_sdi_resource,
1165 };
1166
1167 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1168 {
1169 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1170 &s3c_device_sdi);
1171 }
1172 #endif /* CONFIG_PLAT_S3C24XX */
1173
1174 /* SPI */
1175
1176 #ifdef CONFIG_PLAT_S3C24XX
1177 static struct resource s3c_spi0_resource[] = {
1178 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1179 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1180 };
1181
1182 struct platform_device s3c_device_spi0 = {
1183 .name = "s3c2410-spi",
1184 .id = 0,
1185 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1186 .resource = s3c_spi0_resource,
1187 .dev = {
1188 .dma_mask = &samsung_device_dma_mask,
1189 .coherent_dma_mask = DMA_BIT_MASK(32),
1190 }
1191 };
1192
1193 static struct resource s3c_spi1_resource[] = {
1194 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1195 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1196 };
1197
1198 struct platform_device s3c_device_spi1 = {
1199 .name = "s3c2410-spi",
1200 .id = 1,
1201 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1202 .resource = s3c_spi1_resource,
1203 .dev = {
1204 .dma_mask = &samsung_device_dma_mask,
1205 .coherent_dma_mask = DMA_BIT_MASK(32),
1206 }
1207 };
1208 #endif /* CONFIG_PLAT_S3C24XX */
1209
1210 /* Touchscreen */
1211
1212 #ifdef CONFIG_PLAT_S3C24XX
1213 static struct resource s3c_ts_resource[] = {
1214 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1215 [1] = DEFINE_RES_IRQ(IRQ_TC),
1216 };
1217
1218 struct platform_device s3c_device_ts = {
1219 .name = "s3c2410-ts",
1220 .id = -1,
1221 .dev.parent = &s3c_device_adc.dev,
1222 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1223 .resource = s3c_ts_resource,
1224 };
1225
1226 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1227 {
1228 s3c_set_platdata(hard_s3c2410ts_info,
1229 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1230 }
1231 #endif /* CONFIG_PLAT_S3C24XX */
1232
1233 #ifdef CONFIG_SAMSUNG_DEV_TS
1234 static struct resource s3c_ts_resource[] = {
1235 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1236 [1] = DEFINE_RES_IRQ(IRQ_TC),
1237 };
1238
1239 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1240 .delay = 10000,
1241 .presc = 49,
1242 .oversampling_shift = 2,
1243 };
1244
1245 struct platform_device s3c_device_ts = {
1246 .name = "s3c64xx-ts",
1247 .id = -1,
1248 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1249 .resource = s3c_ts_resource,
1250 };
1251
1252 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1253 {
1254 if (!pd)
1255 pd = &default_ts_data;
1256
1257 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1258 &s3c_device_ts);
1259 }
1260 #endif /* CONFIG_SAMSUNG_DEV_TS */
1261
1262 /* TV */
1263
1264 #ifdef CONFIG_S5P_DEV_TV
1265
1266 static struct resource s5p_hdmi_resources[] = {
1267 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1268 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1269 };
1270
1271 struct platform_device s5p_device_hdmi = {
1272 .name = "s5p-hdmi",
1273 .id = -1,
1274 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1275 .resource = s5p_hdmi_resources,
1276 };
1277
1278 static struct resource s5p_sdo_resources[] = {
1279 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1280 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1281 };
1282
1283 struct platform_device s5p_device_sdo = {
1284 .name = "s5p-sdo",
1285 .id = -1,
1286 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1287 .resource = s5p_sdo_resources,
1288 };
1289
1290 static struct resource s5p_mixer_resources[] = {
1291 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1292 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1293 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1294 };
1295
1296 struct platform_device s5p_device_mixer = {
1297 .name = "s5p-mixer",
1298 .id = -1,
1299 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1300 .resource = s5p_mixer_resources,
1301 .dev = {
1302 .dma_mask = &samsung_device_dma_mask,
1303 .coherent_dma_mask = DMA_BIT_MASK(32),
1304 }
1305 };
1306 #endif /* CONFIG_S5P_DEV_TV */
1307
1308 /* USB */
1309
1310 #ifdef CONFIG_S3C_DEV_USB_HOST
1311 static struct resource s3c_usb_resource[] = {
1312 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1313 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1314 };
1315
1316 struct platform_device s3c_device_ohci = {
1317 .name = "s3c2410-ohci",
1318 .id = -1,
1319 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1320 .resource = s3c_usb_resource,
1321 .dev = {
1322 .dma_mask = &samsung_device_dma_mask,
1323 .coherent_dma_mask = DMA_BIT_MASK(32),
1324 }
1325 };
1326
1327 /*
1328 * s3c_ohci_set_platdata - initialise OHCI device platform data
1329 * @info: The platform data.
1330 *
1331 * This call copies the @info passed in and sets the device .platform_data
1332 * field to that copy. The @info is copied so that the original can be marked
1333 * __initdata.
1334 */
1335
1336 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1337 {
1338 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1339 &s3c_device_ohci);
1340 }
1341 #endif /* CONFIG_S3C_DEV_USB_HOST */
1342
1343 /* USB Device (Gadget) */
1344
1345 #ifdef CONFIG_PLAT_S3C24XX
1346 static struct resource s3c_usbgadget_resource[] = {
1347 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1348 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1349 };
1350
1351 struct platform_device s3c_device_usbgadget = {
1352 .name = "s3c2410-usbgadget",
1353 .id = -1,
1354 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1355 .resource = s3c_usbgadget_resource,
1356 };
1357
1358 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1359 {
1360 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1361 }
1362 #endif /* CONFIG_PLAT_S3C24XX */
1363
1364 /* USB EHCI Host Controller */
1365
1366 #ifdef CONFIG_S5P_DEV_USB_EHCI
1367 static struct resource s5p_ehci_resource[] = {
1368 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1369 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1370 };
1371
1372 struct platform_device s5p_device_ehci = {
1373 .name = "s5p-ehci",
1374 .id = -1,
1375 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1376 .resource = s5p_ehci_resource,
1377 .dev = {
1378 .dma_mask = &samsung_device_dma_mask,
1379 .coherent_dma_mask = DMA_BIT_MASK(32),
1380 }
1381 };
1382
1383 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1384 {
1385 struct s5p_ehci_platdata *npd;
1386
1387 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1388 &s5p_device_ehci);
1389
1390 if (!npd->phy_init)
1391 npd->phy_init = s5p_usb_phy_init;
1392 if (!npd->phy_exit)
1393 npd->phy_exit = s5p_usb_phy_exit;
1394 }
1395 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1396
1397 /* USB HSOTG */
1398
1399 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1400 static struct resource s3c_usb_hsotg_resources[] = {
1401 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1402 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1403 };
1404
1405 struct platform_device s3c_device_usb_hsotg = {
1406 .name = "s3c-hsotg",
1407 .id = -1,
1408 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1409 .resource = s3c_usb_hsotg_resources,
1410 .dev = {
1411 .dma_mask = &samsung_device_dma_mask,
1412 .coherent_dma_mask = DMA_BIT_MASK(32),
1413 },
1414 };
1415 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1416
1417 /* USB High Spped 2.0 Device (Gadget) */
1418
1419 #ifdef CONFIG_PLAT_S3C24XX
1420 static struct resource s3c_hsudc_resource[] = {
1421 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1422 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1423 };
1424
1425 struct platform_device s3c_device_usb_hsudc = {
1426 .name = "s3c-hsudc",
1427 .id = -1,
1428 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1429 .resource = s3c_hsudc_resource,
1430 .dev = {
1431 .dma_mask = &samsung_device_dma_mask,
1432 .coherent_dma_mask = DMA_BIT_MASK(32),
1433 },
1434 };
1435
1436 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1437 {
1438 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1439 }
1440 #endif /* CONFIG_PLAT_S3C24XX */
1441
1442 /* WDT */
1443
1444 #ifdef CONFIG_S3C_DEV_WDT
1445 static struct resource s3c_wdt_resource[] = {
1446 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1447 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1448 };
1449
1450 struct platform_device s3c_device_wdt = {
1451 .name = "s3c2410-wdt",
1452 .id = -1,
1453 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1454 .resource = s3c_wdt_resource,
1455 };
1456 #endif /* CONFIG_S3C_DEV_WDT */
1457
1458 #ifdef CONFIG_S3C64XX_DEV_SPI0
1459 static struct resource s3c64xx_spi0_resource[] = {
1460 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1461 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1462 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1463 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1464 };
1465
1466 struct platform_device s3c64xx_device_spi0 = {
1467 .name = "s3c64xx-spi",
1468 .id = 0,
1469 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1470 .resource = s3c64xx_spi0_resource,
1471 .dev = {
1472 .dma_mask = &samsung_device_dma_mask,
1473 .coherent_dma_mask = DMA_BIT_MASK(32),
1474 },
1475 };
1476
1477 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1478 int src_clk_nr, int num_cs)
1479 {
1480 if (!pd) {
1481 pr_err("%s:Need to pass platform data\n", __func__);
1482 return;
1483 }
1484
1485 /* Reject invalid configuration */
1486 if (!num_cs || src_clk_nr < 0) {
1487 pr_err("%s: Invalid SPI configuration\n", __func__);
1488 return;
1489 }
1490
1491 pd->num_cs = num_cs;
1492 pd->src_clk_nr = src_clk_nr;
1493 if (!pd->cfg_gpio)
1494 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1495
1496 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1497 }
1498 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1499
1500 #ifdef CONFIG_S3C64XX_DEV_SPI1
1501 static struct resource s3c64xx_spi1_resource[] = {
1502 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1503 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1504 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1505 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1506 };
1507
1508 struct platform_device s3c64xx_device_spi1 = {
1509 .name = "s3c64xx-spi",
1510 .id = 1,
1511 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1512 .resource = s3c64xx_spi1_resource,
1513 .dev = {
1514 .dma_mask = &samsung_device_dma_mask,
1515 .coherent_dma_mask = DMA_BIT_MASK(32),
1516 },
1517 };
1518
1519 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1520 int src_clk_nr, int num_cs)
1521 {
1522 if (!pd) {
1523 pr_err("%s:Need to pass platform data\n", __func__);
1524 return;
1525 }
1526
1527 /* Reject invalid configuration */
1528 if (!num_cs || src_clk_nr < 0) {
1529 pr_err("%s: Invalid SPI configuration\n", __func__);
1530 return;
1531 }
1532
1533 pd->num_cs = num_cs;
1534 pd->src_clk_nr = src_clk_nr;
1535 if (!pd->cfg_gpio)
1536 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1537
1538 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1539 }
1540 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1541
1542 #ifdef CONFIG_S3C64XX_DEV_SPI2
1543 static struct resource s3c64xx_spi2_resource[] = {
1544 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1545 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1546 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1547 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1548 };
1549
1550 struct platform_device s3c64xx_device_spi2 = {
1551 .name = "s3c64xx-spi",
1552 .id = 2,
1553 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1554 .resource = s3c64xx_spi2_resource,
1555 .dev = {
1556 .dma_mask = &samsung_device_dma_mask,
1557 .coherent_dma_mask = DMA_BIT_MASK(32),
1558 },
1559 };
1560
1561 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1562 int src_clk_nr, int num_cs)
1563 {
1564 if (!pd) {
1565 pr_err("%s:Need to pass platform data\n", __func__);
1566 return;
1567 }
1568
1569 /* Reject invalid configuration */
1570 if (!num_cs || src_clk_nr < 0) {
1571 pr_err("%s: Invalid SPI configuration\n", __func__);
1572 return;
1573 }
1574
1575 pd->num_cs = num_cs;
1576 pd->src_clk_nr = src_clk_nr;
1577 if (!pd->cfg_gpio)
1578 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1579
1580 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1581 }
1582 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
This page took 0.090253 seconds and 5 git commands to generate.