projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33
34 #include <asm/irq.h>
35 #include <asm/pmu.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39
40 #include <mach/hardware.h>
41 #include <mach/dma.h>
42 #include <mach/irqs.h>
43 #include <mach/map.h>
44
45 #include <plat/cpu.h>
46 #include <plat/devs.h>
47 #include <plat/adc.h>
48 #include <plat/ata.h>
49 #include <plat/ehci.h>
50 #include <plat/fb.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
53 #include <plat/iic.h>
54 #include <plat/keypad.h>
55 #include <plat/mci.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
58 #include <plat/ts.h>
59 #include <plat/udc.h>
60 #include <plat/usb-control.h>
61 #include <plat/usb-phy.h>
62 #include <plat/regs-iic.h>
63 #include <plat/regs-serial.h>
64 #include <plat/regs-spi.h>
65 #include <plat/s3c64xx-spi.h>
66
67 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
68
69 /* AC97 */
70 #ifdef CONFIG_CPU_S3C2440
71 static struct resource s3c_ac97_resource[] = {
72 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
73 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
74 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
75 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
76 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
77 };
78
79 struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88 };
89 #endif /* CONFIG_CPU_S3C2440 */
90
91 /* ADC */
92
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98 };
99
100 struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105 };
106 #endif /* CONFIG_PLAT_S3C24XX */
107
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_TC),
112 [2] = DEFINE_RES_IRQ(IRQ_ADC),
113 };
114
115 struct platform_device s3c_device_adc = {
116 .name = "samsung-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120 };
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123 /* Camif Controller */
124
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_CAM),
129 };
130
131 struct platform_device s3c_device_camif = {
132 .name = "s3c2440-camif",
133 .id = -1,
134 .num_resources = ARRAY_SIZE(s3c_camif_resource),
135 .resource = s3c_camif_resource,
136 .dev = {
137 .dma_mask = &samsung_device_dma_mask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 }
140 };
141 #endif /* CONFIG_CPU_S3C2440 */
142
143 /* ASOC DMA */
144
145 struct platform_device samsung_asoc_dma = {
146 .name = "samsung-audio",
147 .id = -1,
148 .dev = {
149 .dma_mask = &samsung_device_dma_mask,
150 .coherent_dma_mask = DMA_BIT_MASK(32),
151 }
152 };
153
154 struct platform_device samsung_asoc_idma = {
155 .name = "samsung-idma",
156 .id = -1,
157 .dev = {
158 .dma_mask = &samsung_device_dma_mask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
160 }
161 };
162
163 /* FB */
164
165 #ifdef CONFIG_S3C_DEV_FB
166 static struct resource s3c_fb_resource[] = {
167 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
168 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
169 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
170 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
171 };
172
173 struct platform_device s3c_device_fb = {
174 .name = "s3c-fb",
175 .id = -1,
176 .num_resources = ARRAY_SIZE(s3c_fb_resource),
177 .resource = s3c_fb_resource,
178 .dev = {
179 .dma_mask = &samsung_device_dma_mask,
180 .coherent_dma_mask = DMA_BIT_MASK(32),
181 },
182 };
183
184 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
185 {
186 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
187 &s3c_device_fb);
188 }
189 #endif /* CONFIG_S3C_DEV_FB */
190
191 /* FIMC */
192
193 #ifdef CONFIG_S5P_DEV_FIMC0
194 static struct resource s5p_fimc0_resource[] = {
195 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
196 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
197 };
198
199 struct platform_device s5p_device_fimc0 = {
200 .name = "s5p-fimc",
201 .id = 0,
202 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
203 .resource = s5p_fimc0_resource,
204 .dev = {
205 .dma_mask = &samsung_device_dma_mask,
206 .coherent_dma_mask = DMA_BIT_MASK(32),
207 },
208 };
209
210 struct platform_device s5p_device_fimc_md = {
211 .name = "s5p-fimc-md",
212 .id = -1,
213 };
214 #endif /* CONFIG_S5P_DEV_FIMC0 */
215
216 #ifdef CONFIG_S5P_DEV_FIMC1
217 static struct resource s5p_fimc1_resource[] = {
218 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
219 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
220 };
221
222 struct platform_device s5p_device_fimc1 = {
223 .name = "s5p-fimc",
224 .id = 1,
225 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
226 .resource = s5p_fimc1_resource,
227 .dev = {
228 .dma_mask = &samsung_device_dma_mask,
229 .coherent_dma_mask = DMA_BIT_MASK(32),
230 },
231 };
232 #endif /* CONFIG_S5P_DEV_FIMC1 */
233
234 #ifdef CONFIG_S5P_DEV_FIMC2
235 static struct resource s5p_fimc2_resource[] = {
236 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
237 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
238 };
239
240 struct platform_device s5p_device_fimc2 = {
241 .name = "s5p-fimc",
242 .id = 2,
243 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
244 .resource = s5p_fimc2_resource,
245 .dev = {
246 .dma_mask = &samsung_device_dma_mask,
247 .coherent_dma_mask = DMA_BIT_MASK(32),
248 },
249 };
250 #endif /* CONFIG_S5P_DEV_FIMC2 */
251
252 #ifdef CONFIG_S5P_DEV_FIMC3
253 static struct resource s5p_fimc3_resource[] = {
254 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
255 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
256 };
257
258 struct platform_device s5p_device_fimc3 = {
259 .name = "s5p-fimc",
260 .id = 3,
261 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
262 .resource = s5p_fimc3_resource,
263 .dev = {
264 .dma_mask = &samsung_device_dma_mask,
265 .coherent_dma_mask = DMA_BIT_MASK(32),
266 },
267 };
268 #endif /* CONFIG_S5P_DEV_FIMC3 */
269
270 /* FIMD0 */
271
272 #ifdef CONFIG_S5P_DEV_FIMD0
273 static struct resource s5p_fimd0_resource[] = {
274 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
275 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
276 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
277 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
278 };
279
280 struct platform_device s5p_device_fimd0 = {
281 .name = "s5p-fb",
282 .id = 0,
283 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
284 .resource = s5p_fimd0_resource,
285 .dev = {
286 .dma_mask = &samsung_device_dma_mask,
287 .coherent_dma_mask = DMA_BIT_MASK(32),
288 },
289 };
290
291 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
292 {
293 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
294 &s5p_device_fimd0);
295 }
296 #endif /* CONFIG_S5P_DEV_FIMD0 */
297
298 /* HWMON */
299
300 #ifdef CONFIG_S3C_DEV_HWMON
301 struct platform_device s3c_device_hwmon = {
302 .name = "s3c-hwmon",
303 .id = -1,
304 .dev.parent = &s3c_device_adc.dev,
305 };
306
307 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
308 {
309 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
310 &s3c_device_hwmon);
311 }
312 #endif /* CONFIG_S3C_DEV_HWMON */
313
314 /* HSMMC */
315
316 #ifdef CONFIG_S3C_DEV_HSMMC
317 static struct resource s3c_hsmmc_resource[] = {
318 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
319 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
320 };
321
322 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
323 .max_width = 4,
324 .host_caps = (MMC_CAP_4_BIT_DATA |
325 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
326 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
327 };
328
329 struct platform_device s3c_device_hsmmc0 = {
330 .name = "s3c-sdhci",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
333 .resource = s3c_hsmmc_resource,
334 .dev = {
335 .dma_mask = &samsung_device_dma_mask,
336 .coherent_dma_mask = DMA_BIT_MASK(32),
337 .platform_data = &s3c_hsmmc0_def_platdata,
338 },
339 };
340
341 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
342 {
343 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
344 }
345 #endif /* CONFIG_S3C_DEV_HSMMC */
346
347 #ifdef CONFIG_S3C_DEV_HSMMC1
348 static struct resource s3c_hsmmc1_resource[] = {
349 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
350 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
351 };
352
353 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
354 .max_width = 4,
355 .host_caps = (MMC_CAP_4_BIT_DATA |
356 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
357 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
358 };
359
360 struct platform_device s3c_device_hsmmc1 = {
361 .name = "s3c-sdhci",
362 .id = 1,
363 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
364 .resource = s3c_hsmmc1_resource,
365 .dev = {
366 .dma_mask = &samsung_device_dma_mask,
367 .coherent_dma_mask = DMA_BIT_MASK(32),
368 .platform_data = &s3c_hsmmc1_def_platdata,
369 },
370 };
371
372 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
373 {
374 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
375 }
376 #endif /* CONFIG_S3C_DEV_HSMMC1 */
377
378 /* HSMMC2 */
379
380 #ifdef CONFIG_S3C_DEV_HSMMC2
381 static struct resource s3c_hsmmc2_resource[] = {
382 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
383 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
384 };
385
386 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
387 .max_width = 4,
388 .host_caps = (MMC_CAP_4_BIT_DATA |
389 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
390 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
391 };
392
393 struct platform_device s3c_device_hsmmc2 = {
394 .name = "s3c-sdhci",
395 .id = 2,
396 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
397 .resource = s3c_hsmmc2_resource,
398 .dev = {
399 .dma_mask = &samsung_device_dma_mask,
400 .coherent_dma_mask = DMA_BIT_MASK(32),
401 .platform_data = &s3c_hsmmc2_def_platdata,
402 },
403 };
404
405 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
406 {
407 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
408 }
409 #endif /* CONFIG_S3C_DEV_HSMMC2 */
410
411 #ifdef CONFIG_S3C_DEV_HSMMC3
412 static struct resource s3c_hsmmc3_resource[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
415 };
416
417 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
418 .max_width = 4,
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
421 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
422 };
423
424 struct platform_device s3c_device_hsmmc3 = {
425 .name = "s3c-sdhci",
426 .id = 3,
427 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
428 .resource = s3c_hsmmc3_resource,
429 .dev = {
430 .dma_mask = &samsung_device_dma_mask,
431 .coherent_dma_mask = DMA_BIT_MASK(32),
432 .platform_data = &s3c_hsmmc3_def_platdata,
433 },
434 };
435
436 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
437 {
438 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
439 }
440 #endif /* CONFIG_S3C_DEV_HSMMC3 */
441
442 /* I2C */
443
444 static struct resource s3c_i2c0_resource[] = {
445 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
446 [1] = DEFINE_RES_IRQ(IRQ_IIC),
447 };
448
449 struct platform_device s3c_device_i2c0 = {
450 .name = "s3c2410-i2c",
451 #ifdef CONFIG_S3C_DEV_I2C1
452 .id = 0,
453 #else
454 .id = -1,
455 #endif
456 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
457 .resource = s3c_i2c0_resource,
458 };
459
460 struct s3c2410_platform_i2c default_i2c_data __initdata = {
461 .flags = 0,
462 .slave_addr = 0x10,
463 .frequency = 100*1000,
464 .sda_delay = 100,
465 };
466
467 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
468 {
469 struct s3c2410_platform_i2c *npd;
470
471 if (!pd)
472 pd = &default_i2c_data;
473
474 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
475 &s3c_device_i2c0);
476
477 if (!npd->cfg_gpio)
478 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
479 }
480
481 #ifdef CONFIG_S3C_DEV_I2C1
482 static struct resource s3c_i2c1_resource[] = {
483 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
484 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
485 };
486
487 struct platform_device s3c_device_i2c1 = {
488 .name = "s3c2410-i2c",
489 .id = 1,
490 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
491 .resource = s3c_i2c1_resource,
492 };
493
494 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
495 {
496 struct s3c2410_platform_i2c *npd;
497
498 if (!pd) {
499 pd = &default_i2c_data;
500 pd->bus_num = 1;
501 }
502
503 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
504 &s3c_device_i2c1);
505
506 if (!npd->cfg_gpio)
507 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
508 }
509 #endif /* CONFIG_S3C_DEV_I2C1 */
510
511 #ifdef CONFIG_S3C_DEV_I2C2
512 static struct resource s3c_i2c2_resource[] = {
513 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
514 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
515 };
516
517 struct platform_device s3c_device_i2c2 = {
518 .name = "s3c2410-i2c",
519 .id = 2,
520 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
521 .resource = s3c_i2c2_resource,
522 };
523
524 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
525 {
526 struct s3c2410_platform_i2c *npd;
527
528 if (!pd) {
529 pd = &default_i2c_data;
530 pd->bus_num = 2;
531 }
532
533 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
534 &s3c_device_i2c2);
535
536 if (!npd->cfg_gpio)
537 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
538 }
539 #endif /* CONFIG_S3C_DEV_I2C2 */
540
541 #ifdef CONFIG_S3C_DEV_I2C3
542 static struct resource s3c_i2c3_resource[] = {
543 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
544 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
545 };
546
547 struct platform_device s3c_device_i2c3 = {
548 .name = "s3c2440-i2c",
549 .id = 3,
550 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
551 .resource = s3c_i2c3_resource,
552 };
553
554 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
555 {
556 struct s3c2410_platform_i2c *npd;
557
558 if (!pd) {
559 pd = &default_i2c_data;
560 pd->bus_num = 3;
561 }
562
563 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
564 &s3c_device_i2c3);
565
566 if (!npd->cfg_gpio)
567 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
568 }
569 #endif /*CONFIG_S3C_DEV_I2C3 */
570
571 #ifdef CONFIG_S3C_DEV_I2C4
572 static struct resource s3c_i2c4_resource[] = {
573 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
574 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
575 };
576
577 struct platform_device s3c_device_i2c4 = {
578 .name = "s3c2440-i2c",
579 .id = 4,
580 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
581 .resource = s3c_i2c4_resource,
582 };
583
584 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
585 {
586 struct s3c2410_platform_i2c *npd;
587
588 if (!pd) {
589 pd = &default_i2c_data;
590 pd->bus_num = 4;
591 }
592
593 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
594 &s3c_device_i2c4);
595
596 if (!npd->cfg_gpio)
597 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
598 }
599 #endif /*CONFIG_S3C_DEV_I2C4 */
600
601 #ifdef CONFIG_S3C_DEV_I2C5
602 static struct resource s3c_i2c5_resource[] = {
603 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
604 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
605 };
606
607 struct platform_device s3c_device_i2c5 = {
608 .name = "s3c2440-i2c",
609 .id = 5,
610 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
611 .resource = s3c_i2c5_resource,
612 };
613
614 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
615 {
616 struct s3c2410_platform_i2c *npd;
617
618 if (!pd) {
619 pd = &default_i2c_data;
620 pd->bus_num = 5;
621 }
622
623 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
624 &s3c_device_i2c5);
625
626 if (!npd->cfg_gpio)
627 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
628 }
629 #endif /*CONFIG_S3C_DEV_I2C5 */
630
631 #ifdef CONFIG_S3C_DEV_I2C6
632 static struct resource s3c_i2c6_resource[] = {
633 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
634 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
635 };
636
637 struct platform_device s3c_device_i2c6 = {
638 .name = "s3c2440-i2c",
639 .id = 6,
640 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
641 .resource = s3c_i2c6_resource,
642 };
643
644 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
645 {
646 struct s3c2410_platform_i2c *npd;
647
648 if (!pd) {
649 pd = &default_i2c_data;
650 pd->bus_num = 6;
651 }
652
653 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
654 &s3c_device_i2c6);
655
656 if (!npd->cfg_gpio)
657 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
658 }
659 #endif /* CONFIG_S3C_DEV_I2C6 */
660
661 #ifdef CONFIG_S3C_DEV_I2C7
662 static struct resource s3c_i2c7_resource[] = {
663 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
664 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
665 };
666
667 struct platform_device s3c_device_i2c7 = {
668 .name = "s3c2440-i2c",
669 .id = 7,
670 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
671 .resource = s3c_i2c7_resource,
672 };
673
674 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
675 {
676 struct s3c2410_platform_i2c *npd;
677
678 if (!pd) {
679 pd = &default_i2c_data;
680 pd->bus_num = 7;
681 }
682
683 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
684 &s3c_device_i2c7);
685
686 if (!npd->cfg_gpio)
687 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
688 }
689 #endif /* CONFIG_S3C_DEV_I2C7 */
690
691 /* I2C HDMIPHY */
692
693 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
694 static struct resource s5p_i2c_resource[] = {
695 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
696 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
697 };
698
699 struct platform_device s5p_device_i2c_hdmiphy = {
700 .name = "s3c2440-hdmiphy-i2c",
701 .id = -1,
702 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
703 .resource = s5p_i2c_resource,
704 };
705
706 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
707 {
708 struct s3c2410_platform_i2c *npd;
709
710 if (!pd) {
711 pd = &default_i2c_data;
712
713 if (soc_is_exynos4210())
714 pd->bus_num = 8;
715 else if (soc_is_s5pv210())
716 pd->bus_num = 3;
717 else
718 pd->bus_num = 0;
719 }
720
721 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
722 &s5p_device_i2c_hdmiphy);
723 }
724 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
725
726 /* I2S */
727
728 #ifdef CONFIG_PLAT_S3C24XX
729 static struct resource s3c_iis_resource[] = {
730 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
731 };
732
733 struct platform_device s3c_device_iis = {
734 .name = "s3c24xx-iis",
735 .id = -1,
736 .num_resources = ARRAY_SIZE(s3c_iis_resource),
737 .resource = s3c_iis_resource,
738 .dev = {
739 .dma_mask = &samsung_device_dma_mask,
740 .coherent_dma_mask = DMA_BIT_MASK(32),
741 }
742 };
743 #endif /* CONFIG_PLAT_S3C24XX */
744
745 #ifdef CONFIG_CPU_S3C2440
746 struct platform_device s3c2412_device_iis = {
747 .name = "s3c2412-iis",
748 .id = -1,
749 .dev = {
750 .dma_mask = &samsung_device_dma_mask,
751 .coherent_dma_mask = DMA_BIT_MASK(32),
752 }
753 };
754 #endif /* CONFIG_CPU_S3C2440 */
755
756 /* IDE CFCON */
757
758 #ifdef CONFIG_SAMSUNG_DEV_IDE
759 static struct resource s3c_cfcon_resource[] = {
760 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
761 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
762 };
763
764 struct platform_device s3c_device_cfcon = {
765 .id = 0,
766 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
767 .resource = s3c_cfcon_resource,
768 };
769
770 void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
771 {
772 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
773 &s3c_device_cfcon);
774 }
775 #endif /* CONFIG_SAMSUNG_DEV_IDE */
776
777 /* KEYPAD */
778
779 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
780 static struct resource samsung_keypad_resources[] = {
781 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
782 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
783 };
784
785 struct platform_device samsung_device_keypad = {
786 .name = "samsung-keypad",
787 .id = -1,
788 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
789 .resource = samsung_keypad_resources,
790 };
791
792 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
793 {
794 struct samsung_keypad_platdata *npd;
795
796 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
797 &samsung_device_keypad);
798
799 if (!npd->cfg_gpio)
800 npd->cfg_gpio = samsung_keypad_cfg_gpio;
801 }
802 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
803
804 /* LCD Controller */
805
806 #ifdef CONFIG_PLAT_S3C24XX
807 static struct resource s3c_lcd_resource[] = {
808 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
809 [1] = DEFINE_RES_IRQ(IRQ_LCD),
810 };
811
812 struct platform_device s3c_device_lcd = {
813 .name = "s3c2410-lcd",
814 .id = -1,
815 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
816 .resource = s3c_lcd_resource,
817 .dev = {
818 .dma_mask = &samsung_device_dma_mask,
819 .coherent_dma_mask = DMA_BIT_MASK(32),
820 }
821 };
822
823 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
824 {
825 struct s3c2410fb_mach_info *npd;
826
827 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
828 if (npd) {
829 npd->displays = kmemdup(pd->displays,
830 sizeof(struct s3c2410fb_display) * npd->num_displays,
831 GFP_KERNEL);
832 if (!npd->displays)
833 printk(KERN_ERR "no memory for LCD display data\n");
834 } else {
835 printk(KERN_ERR "no memory for LCD platform data\n");
836 }
837 }
838 #endif /* CONFIG_PLAT_S3C24XX */
839
840 /* MFC */
841
842 #ifdef CONFIG_S5P_DEV_MFC
843 static struct resource s5p_mfc_resource[] = {
844 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
845 [1] = DEFINE_RES_IRQ(IRQ_MFC),
846 };
847
848 struct platform_device s5p_device_mfc = {
849 .name = "s5p-mfc",
850 .id = -1,
851 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
852 .resource = s5p_mfc_resource,
853 };
854
855 /*
856 * MFC hardware has 2 memory interfaces which are modelled as two separate
857 * platform devices to let dma-mapping distinguish between them.
858 *
859 * MFC parent device (s5p_device_mfc) must be registered before memory
860 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
861 */
862
863 struct platform_device s5p_device_mfc_l = {
864 .name = "s5p-mfc-l",
865 .id = -1,
866 .dev = {
867 .parent = &s5p_device_mfc.dev,
868 .dma_mask = &samsung_device_dma_mask,
869 .coherent_dma_mask = DMA_BIT_MASK(32),
870 },
871 };
872
873 struct platform_device s5p_device_mfc_r = {
874 .name = "s5p-mfc-r",
875 .id = -1,
876 .dev = {
877 .parent = &s5p_device_mfc.dev,
878 .dma_mask = &samsung_device_dma_mask,
879 .coherent_dma_mask = DMA_BIT_MASK(32),
880 },
881 };
882 #endif /* CONFIG_S5P_DEV_MFC */
883
884 /* MIPI CSIS */
885
886 #ifdef CONFIG_S5P_DEV_CSIS0
887 static struct resource s5p_mipi_csis0_resource[] = {
888 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
889 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
890 };
891
892 struct platform_device s5p_device_mipi_csis0 = {
893 .name = "s5p-mipi-csis",
894 .id = 0,
895 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
896 .resource = s5p_mipi_csis0_resource,
897 };
898 #endif /* CONFIG_S5P_DEV_CSIS0 */
899
900 #ifdef CONFIG_S5P_DEV_CSIS1
901 static struct resource s5p_mipi_csis1_resource[] = {
902 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
903 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
904 };
905
906 struct platform_device s5p_device_mipi_csis1 = {
907 .name = "s5p-mipi-csis",
908 .id = 1,
909 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
910 .resource = s5p_mipi_csis1_resource,
911 };
912 #endif
913
914 /* NAND */
915
916 #ifdef CONFIG_S3C_DEV_NAND
917 static struct resource s3c_nand_resource[] = {
918 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
919 };
920
921 struct platform_device s3c_device_nand = {
922 .name = "s3c2410-nand",
923 .id = -1,
924 .num_resources = ARRAY_SIZE(s3c_nand_resource),
925 .resource = s3c_nand_resource,
926 };
927
928 /*
929 * s3c_nand_copy_set() - copy nand set data
930 * @set: The new structure, directly copied from the old.
931 *
932 * Copy all the fields from the NAND set field from what is probably __initdata
933 * to new kernel memory. The code returns 0 if the copy happened correctly or
934 * an error code for the calling function to display.
935 *
936 * Note, we currently do not try and look to see if we've already copied the
937 * data in a previous set.
938 */
939 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
940 {
941 void *ptr;
942 int size;
943
944 size = sizeof(struct mtd_partition) * set->nr_partitions;
945 if (size) {
946 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
947 set->partitions = ptr;
948
949 if (!ptr)
950 return -ENOMEM;
951 }
952
953 if (set->nr_map && set->nr_chips) {
954 size = sizeof(int) * set->nr_chips;
955 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
956 set->nr_map = ptr;
957
958 if (!ptr)
959 return -ENOMEM;
960 }
961
962 if (set->ecc_layout) {
963 ptr = kmemdup(set->ecc_layout,
964 sizeof(struct nand_ecclayout), GFP_KERNEL);
965 set->ecc_layout = ptr;
966
967 if (!ptr)
968 return -ENOMEM;
969 }
970
971 return 0;
972 }
973
974 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
975 {
976 struct s3c2410_platform_nand *npd;
977 int size;
978 int ret;
979
980 /* note, if we get a failure in allocation, we simply drop out of the
981 * function. If there is so little memory available at initialisation
982 * time then there is little chance the system is going to run.
983 */
984
985 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
986 &s3c_device_nand);
987 if (!npd)
988 return;
989
990 /* now see if we need to copy any of the nand set data */
991
992 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
993 if (size) {
994 struct s3c2410_nand_set *from = npd->sets;
995 struct s3c2410_nand_set *to;
996 int i;
997
998 to = kmemdup(from, size, GFP_KERNEL);
999 npd->sets = to; /* set, even if we failed */
1000
1001 if (!to) {
1002 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1003 return;
1004 }
1005
1006 for (i = 0; i < npd->nr_sets; i++) {
1007 ret = s3c_nand_copy_set(to);
1008 if (ret) {
1009 printk(KERN_ERR "%s: failed to copy set %d\n",
1010 __func__, i);
1011 return;
1012 }
1013 to++;
1014 }
1015 }
1016 }
1017 #endif /* CONFIG_S3C_DEV_NAND */
1018
1019 /* ONENAND */
1020
1021 #ifdef CONFIG_S3C_DEV_ONENAND
1022 static struct resource s3c_onenand_resources[] = {
1023 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1024 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1025 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1026 };
1027
1028 struct platform_device s3c_device_onenand = {
1029 .name = "samsung-onenand",
1030 .id = 0,
1031 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1032 .resource = s3c_onenand_resources,
1033 };
1034 #endif /* CONFIG_S3C_DEV_ONENAND */
1035
1036 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1037 static struct resource s3c64xx_onenand1_resources[] = {
1038 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1039 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1040 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1041 };
1042
1043 struct platform_device s3c64xx_device_onenand1 = {
1044 .name = "samsung-onenand",
1045 .id = 1,
1046 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1047 .resource = s3c64xx_onenand1_resources,
1048 };
1049
1050 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1051 {
1052 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1053 &s3c64xx_device_onenand1);
1054 }
1055 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1056
1057 #ifdef CONFIG_S5P_DEV_ONENAND
1058 static struct resource s5p_onenand_resources[] = {
1059 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1060 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1061 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1062 };
1063
1064 struct platform_device s5p_device_onenand = {
1065 .name = "s5pc110-onenand",
1066 .id = -1,
1067 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1068 .resource = s5p_onenand_resources,
1069 };
1070 #endif /* CONFIG_S5P_DEV_ONENAND */
1071
1072 /* PMU */
1073
1074 #ifdef CONFIG_PLAT_S5P
1075 static struct resource s5p_pmu_resource[] = {
1076 DEFINE_RES_IRQ(IRQ_PMU)
1077 };
1078
1079 struct platform_device s5p_device_pmu = {
1080 .name = "arm-pmu",
1081 .id = ARM_PMU_DEVICE_CPU,
1082 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1083 .resource = s5p_pmu_resource,
1084 };
1085
1086 static int __init s5p_pmu_init(void)
1087 {
1088 platform_device_register(&s5p_device_pmu);
1089 return 0;
1090 }
1091 arch_initcall(s5p_pmu_init);
1092 #endif /* CONFIG_PLAT_S5P */
1093
1094 /* PWM Timer */
1095
1096 #ifdef CONFIG_SAMSUNG_DEV_PWM
1097
1098 #define TIMER_RESOURCE_SIZE (1)
1099
1100 #define TIMER_RESOURCE(_tmr, _irq) \
1101 (struct resource [TIMER_RESOURCE_SIZE]) { \
1102 [0] = { \
1103 .start = _irq, \
1104 .end = _irq, \
1105 .flags = IORESOURCE_IRQ \
1106 } \
1107 }
1108
1109 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1110 .name = "s3c24xx-pwm", \
1111 .id = _tmr_no, \
1112 .num_resources = TIMER_RESOURCE_SIZE, \
1113 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1114
1115 /*
1116 * since we already have an static mapping for the timer,
1117 * we do not bother setting any IO resource for the base.
1118 */
1119
1120 struct platform_device s3c_device_timer[] = {
1121 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1122 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1123 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1124 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1125 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1126 };
1127 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1128
1129 /* RTC */
1130
1131 #ifdef CONFIG_PLAT_S3C24XX
1132 static struct resource s3c_rtc_resource[] = {
1133 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1134 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1135 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1136 };
1137
1138 struct platform_device s3c_device_rtc = {
1139 .name = "s3c2410-rtc",
1140 .id = -1,
1141 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1142 .resource = s3c_rtc_resource,
1143 };
1144 #endif /* CONFIG_PLAT_S3C24XX */
1145
1146 #ifdef CONFIG_S3C_DEV_RTC
1147 static struct resource s3c_rtc_resource[] = {
1148 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1149 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1150 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1151 };
1152
1153 struct platform_device s3c_device_rtc = {
1154 .name = "s3c64xx-rtc",
1155 .id = -1,
1156 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1157 .resource = s3c_rtc_resource,
1158 };
1159 #endif /* CONFIG_S3C_DEV_RTC */
1160
1161 /* SDI */
1162
1163 #ifdef CONFIG_PLAT_S3C24XX
1164 static struct resource s3c_sdi_resource[] = {
1165 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1166 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1167 };
1168
1169 struct platform_device s3c_device_sdi = {
1170 .name = "s3c2410-sdi",
1171 .id = -1,
1172 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1173 .resource = s3c_sdi_resource,
1174 };
1175
1176 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1177 {
1178 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1179 &s3c_device_sdi);
1180 }
1181 #endif /* CONFIG_PLAT_S3C24XX */
1182
1183 /* SPI */
1184
1185 #ifdef CONFIG_PLAT_S3C24XX
1186 static struct resource s3c_spi0_resource[] = {
1187 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1188 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1189 };
1190
1191 struct platform_device s3c_device_spi0 = {
1192 .name = "s3c2410-spi",
1193 .id = 0,
1194 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1195 .resource = s3c_spi0_resource,
1196 .dev = {
1197 .dma_mask = &samsung_device_dma_mask,
1198 .coherent_dma_mask = DMA_BIT_MASK(32),
1199 }
1200 };
1201
1202 static struct resource s3c_spi1_resource[] = {
1203 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1204 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1205 };
1206
1207 struct platform_device s3c_device_spi1 = {
1208 .name = "s3c2410-spi",
1209 .id = 1,
1210 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1211 .resource = s3c_spi1_resource,
1212 .dev = {
1213 .dma_mask = &samsung_device_dma_mask,
1214 .coherent_dma_mask = DMA_BIT_MASK(32),
1215 }
1216 };
1217 #endif /* CONFIG_PLAT_S3C24XX */
1218
1219 /* Touchscreen */
1220
1221 #ifdef CONFIG_PLAT_S3C24XX
1222 static struct resource s3c_ts_resource[] = {
1223 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1224 [1] = DEFINE_RES_IRQ(IRQ_TC),
1225 };
1226
1227 struct platform_device s3c_device_ts = {
1228 .name = "s3c2410-ts",
1229 .id = -1,
1230 .dev.parent = &s3c_device_adc.dev,
1231 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1232 .resource = s3c_ts_resource,
1233 };
1234
1235 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1236 {
1237 s3c_set_platdata(hard_s3c2410ts_info,
1238 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1239 }
1240 #endif /* CONFIG_PLAT_S3C24XX */
1241
1242 #ifdef CONFIG_SAMSUNG_DEV_TS
1243 static struct resource s3c_ts_resource[] = {
1244 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1245 [1] = DEFINE_RES_IRQ(IRQ_TC),
1246 };
1247
1248 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1249 .delay = 10000,
1250 .presc = 49,
1251 .oversampling_shift = 2,
1252 };
1253
1254 struct platform_device s3c_device_ts = {
1255 .name = "s3c64xx-ts",
1256 .id = -1,
1257 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1258 .resource = s3c_ts_resource,
1259 };
1260
1261 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1262 {
1263 if (!pd)
1264 pd = &default_ts_data;
1265
1266 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1267 &s3c_device_ts);
1268 }
1269 #endif /* CONFIG_SAMSUNG_DEV_TS */
1270
1271 /* TV */
1272
1273 #ifdef CONFIG_S5P_DEV_TV
1274
1275 static struct resource s5p_hdmi_resources[] = {
1276 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1277 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1278 };
1279
1280 struct platform_device s5p_device_hdmi = {
1281 .name = "s5p-hdmi",
1282 .id = -1,
1283 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1284 .resource = s5p_hdmi_resources,
1285 };
1286
1287 static struct resource s5p_sdo_resources[] = {
1288 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1289 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1290 };
1291
1292 struct platform_device s5p_device_sdo = {
1293 .name = "s5p-sdo",
1294 .id = -1,
1295 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1296 .resource = s5p_sdo_resources,
1297 };
1298
1299 static struct resource s5p_mixer_resources[] = {
1300 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1301 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1302 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1303 };
1304
1305 struct platform_device s5p_device_mixer = {
1306 .name = "s5p-mixer",
1307 .id = -1,
1308 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1309 .resource = s5p_mixer_resources,
1310 .dev = {
1311 .dma_mask = &samsung_device_dma_mask,
1312 .coherent_dma_mask = DMA_BIT_MASK(32),
1313 }
1314 };
1315 #endif /* CONFIG_S5P_DEV_TV */
1316
1317 /* USB */
1318
1319 #ifdef CONFIG_S3C_DEV_USB_HOST
1320 static struct resource s3c_usb_resource[] = {
1321 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1322 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1323 };
1324
1325 struct platform_device s3c_device_ohci = {
1326 .name = "s3c2410-ohci",
1327 .id = -1,
1328 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1329 .resource = s3c_usb_resource,
1330 .dev = {
1331 .dma_mask = &samsung_device_dma_mask,
1332 .coherent_dma_mask = DMA_BIT_MASK(32),
1333 }
1334 };
1335
1336 /*
1337 * s3c_ohci_set_platdata - initialise OHCI device platform data
1338 * @info: The platform data.
1339 *
1340 * This call copies the @info passed in and sets the device .platform_data
1341 * field to that copy. The @info is copied so that the original can be marked
1342 * __initdata.
1343 */
1344
1345 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1346 {
1347 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1348 &s3c_device_ohci);
1349 }
1350 #endif /* CONFIG_S3C_DEV_USB_HOST */
1351
1352 /* USB Device (Gadget) */
1353
1354 #ifdef CONFIG_PLAT_S3C24XX
1355 static struct resource s3c_usbgadget_resource[] = {
1356 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1357 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1358 };
1359
1360 struct platform_device s3c_device_usbgadget = {
1361 .name = "s3c2410-usbgadget",
1362 .id = -1,
1363 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1364 .resource = s3c_usbgadget_resource,
1365 };
1366
1367 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1368 {
1369 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1370 }
1371 #endif /* CONFIG_PLAT_S3C24XX */
1372
1373 /* USB EHCI Host Controller */
1374
1375 #ifdef CONFIG_S5P_DEV_USB_EHCI
1376 static struct resource s5p_ehci_resource[] = {
1377 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1378 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1379 };
1380
1381 struct platform_device s5p_device_ehci = {
1382 .name = "s5p-ehci",
1383 .id = -1,
1384 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1385 .resource = s5p_ehci_resource,
1386 .dev = {
1387 .dma_mask = &samsung_device_dma_mask,
1388 .coherent_dma_mask = DMA_BIT_MASK(32),
1389 }
1390 };
1391
1392 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1393 {
1394 struct s5p_ehci_platdata *npd;
1395
1396 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1397 &s5p_device_ehci);
1398
1399 if (!npd->phy_init)
1400 npd->phy_init = s5p_usb_phy_init;
1401 if (!npd->phy_exit)
1402 npd->phy_exit = s5p_usb_phy_exit;
1403 }
1404 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1405
1406 /* USB HSOTG */
1407
1408 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1409 static struct resource s3c_usb_hsotg_resources[] = {
1410 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
1411 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1412 };
1413
1414 struct platform_device s3c_device_usb_hsotg = {
1415 .name = "s3c-hsotg",
1416 .id = -1,
1417 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1418 .resource = s3c_usb_hsotg_resources,
1419 .dev = {
1420 .dma_mask = &samsung_device_dma_mask,
1421 .coherent_dma_mask = DMA_BIT_MASK(32),
1422 },
1423 };
1424 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1425
1426 /* USB High Spped 2.0 Device (Gadget) */
1427
1428 #ifdef CONFIG_PLAT_S3C24XX
1429 static struct resource s3c_hsudc_resource[] = {
1430 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1431 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1432 };
1433
1434 struct platform_device s3c_device_usb_hsudc = {
1435 .name = "s3c-hsudc",
1436 .id = -1,
1437 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1438 .resource = s3c_hsudc_resource,
1439 .dev = {
1440 .dma_mask = &samsung_device_dma_mask,
1441 .coherent_dma_mask = DMA_BIT_MASK(32),
1442 },
1443 };
1444
1445 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1446 {
1447 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1448 }
1449 #endif /* CONFIG_PLAT_S3C24XX */
1450
1451 /* WDT */
1452
1453 #ifdef CONFIG_S3C_DEV_WDT
1454 static struct resource s3c_wdt_resource[] = {
1455 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1456 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1457 };
1458
1459 struct platform_device s3c_device_wdt = {
1460 .name = "s3c2410-wdt",
1461 .id = -1,
1462 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1463 .resource = s3c_wdt_resource,
1464 };
1465 #endif /* CONFIG_S3C_DEV_WDT */
1466
1467 #ifdef CONFIG_S3C64XX_DEV_SPI0
1468 static struct resource s3c64xx_spi0_resource[] = {
1469 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1470 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1471 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1472 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1473 };
1474
1475 struct platform_device s3c64xx_device_spi0 = {
1476 .name = "s3c64xx-spi",
1477 .id = 0,
1478 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1479 .resource = s3c64xx_spi0_resource,
1480 .dev = {
1481 .dma_mask = &samsung_device_dma_mask,
1482 .coherent_dma_mask = DMA_BIT_MASK(32),
1483 },
1484 };
1485
1486 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1487 int src_clk_nr, int num_cs)
1488 {
1489 if (!pd) {
1490 pr_err("%s:Need to pass platform data\n", __func__);
1491 return;
1492 }
1493
1494 /* Reject invalid configuration */
1495 if (!num_cs || src_clk_nr < 0) {
1496 pr_err("%s: Invalid SPI configuration\n", __func__);
1497 return;
1498 }
1499
1500 pd->num_cs = num_cs;
1501 pd->src_clk_nr = src_clk_nr;
1502 if (!pd->cfg_gpio)
1503 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1504
1505 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1506 }
1507 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1508
1509 #ifdef CONFIG_S3C64XX_DEV_SPI1
1510 static struct resource s3c64xx_spi1_resource[] = {
1511 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1512 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1513 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1514 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1515 };
1516
1517 struct platform_device s3c64xx_device_spi1 = {
1518 .name = "s3c64xx-spi",
1519 .id = 1,
1520 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1521 .resource = s3c64xx_spi1_resource,
1522 .dev = {
1523 .dma_mask = &samsung_device_dma_mask,
1524 .coherent_dma_mask = DMA_BIT_MASK(32),
1525 },
1526 };
1527
1528 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1529 int src_clk_nr, int num_cs)
1530 {
1531 if (!pd) {
1532 pr_err("%s:Need to pass platform data\n", __func__);
1533 return;
1534 }
1535
1536 /* Reject invalid configuration */
1537 if (!num_cs || src_clk_nr < 0) {
1538 pr_err("%s: Invalid SPI configuration\n", __func__);
1539 return;
1540 }
1541
1542 pd->num_cs = num_cs;
1543 pd->src_clk_nr = src_clk_nr;
1544 if (!pd->cfg_gpio)
1545 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1546
1547 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1548 }
1549 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1550
1551 #ifdef CONFIG_S3C64XX_DEV_SPI2
1552 static struct resource s3c64xx_spi2_resource[] = {
1553 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1554 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1555 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1556 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1557 };
1558
1559 struct platform_device s3c64xx_device_spi2 = {
1560 .name = "s3c64xx-spi",
1561 .id = 2,
1562 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1563 .resource = s3c64xx_spi2_resource,
1564 .dev = {
1565 .dma_mask = &samsung_device_dma_mask,
1566 .coherent_dma_mask = DMA_BIT_MASK(32),
1567 },
1568 };
1569
1570 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1571 int src_clk_nr, int num_cs)
1572 {
1573 if (!pd) {
1574 pr_err("%s:Need to pass platform data\n", __func__);
1575 return;
1576 }
1577
1578 /* Reject invalid configuration */
1579 if (!num_cs || src_clk_nr < 0) {
1580 pr_err("%s: Invalid SPI configuration\n", __func__);
1581 return;
1582 }
1583
1584 pd->num_cs = num_cs;
1585 pd->src_clk_nr = src_clk_nr;
1586 if (!pd->cfg_gpio)
1587 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1588
1589 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1590 }
1591 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
This page took 0.085217 seconds and 6 git commands to generate.