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Merge branch 'for-chris' of git://repo.or.cz/linux-btrfs-devel into integration
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32
33 #include <asm/irq.h>
34 #include <asm/pmu.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/irq.h>
38
39 #include <mach/hardware.h>
40 #include <mach/dma.h>
41 #include <mach/irqs.h>
42 #include <mach/map.h>
43
44 #include <plat/cpu.h>
45 #include <plat/devs.h>
46 #include <plat/adc.h>
47 #include <plat/ata.h>
48 #include <plat/ehci.h>
49 #include <plat/fb.h>
50 #include <plat/fb-s3c2410.h>
51 #include <plat/hwmon.h>
52 #include <plat/iic.h>
53 #include <plat/keypad.h>
54 #include <plat/mci.h>
55 #include <plat/nand.h>
56 #include <plat/sdhci.h>
57 #include <plat/ts.h>
58 #include <plat/udc.h>
59 #include <plat/usb-control.h>
60 #include <plat/usb-phy.h>
61 #include <plat/regs-iic.h>
62 #include <plat/regs-serial.h>
63 #include <plat/regs-spi.h>
64
65 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
66
67 /* AC97 */
68 #ifdef CONFIG_CPU_S3C2440
69 static struct resource s3c_ac97_resource[] = {
70 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
71 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
72 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
73 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
74 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
75 };
76
77 struct platform_device s3c_device_ac97 = {
78 .name = "samsung-ac97",
79 .id = -1,
80 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
81 .resource = s3c_ac97_resource,
82 .dev = {
83 .dma_mask = &samsung_device_dma_mask,
84 .coherent_dma_mask = DMA_BIT_MASK(32),
85 }
86 };
87 #endif /* CONFIG_CPU_S3C2440 */
88
89 /* ADC */
90
91 #ifdef CONFIG_PLAT_S3C24XX
92 static struct resource s3c_adc_resource[] = {
93 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
94 [1] = DEFINE_RES_IRQ(IRQ_TC),
95 [2] = DEFINE_RES_IRQ(IRQ_ADC),
96 };
97
98 struct platform_device s3c_device_adc = {
99 .name = "s3c24xx-adc",
100 .id = -1,
101 .num_resources = ARRAY_SIZE(s3c_adc_resource),
102 .resource = s3c_adc_resource,
103 };
104 #endif /* CONFIG_PLAT_S3C24XX */
105
106 #if defined(CONFIG_SAMSUNG_DEV_ADC)
107 static struct resource s3c_adc_resource[] = {
108 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
109 [1] = DEFINE_RES_IRQ(IRQ_TC),
110 [2] = DEFINE_RES_IRQ(IRQ_ADC),
111 };
112
113 struct platform_device s3c_device_adc = {
114 .name = "samsung-adc",
115 .id = -1,
116 .num_resources = ARRAY_SIZE(s3c_adc_resource),
117 .resource = s3c_adc_resource,
118 };
119 #endif /* CONFIG_SAMSUNG_DEV_ADC */
120
121 /* Camif Controller */
122
123 #ifdef CONFIG_CPU_S3C2440
124 static struct resource s3c_camif_resource[] = {
125 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
126 [1] = DEFINE_RES_IRQ(IRQ_CAM),
127 };
128
129 struct platform_device s3c_device_camif = {
130 .name = "s3c2440-camif",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(s3c_camif_resource),
133 .resource = s3c_camif_resource,
134 .dev = {
135 .dma_mask = &samsung_device_dma_mask,
136 .coherent_dma_mask = DMA_BIT_MASK(32),
137 }
138 };
139 #endif /* CONFIG_CPU_S3C2440 */
140
141 /* ASOC DMA */
142
143 struct platform_device samsung_asoc_dma = {
144 .name = "samsung-audio",
145 .id = -1,
146 .dev = {
147 .dma_mask = &samsung_device_dma_mask,
148 .coherent_dma_mask = DMA_BIT_MASK(32),
149 }
150 };
151
152 struct platform_device samsung_asoc_idma = {
153 .name = "samsung-idma",
154 .id = -1,
155 .dev = {
156 .dma_mask = &samsung_device_dma_mask,
157 .coherent_dma_mask = DMA_BIT_MASK(32),
158 }
159 };
160
161 /* FB */
162
163 #ifdef CONFIG_S3C_DEV_FB
164 static struct resource s3c_fb_resource[] = {
165 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
166 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
167 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
168 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
169 };
170
171 struct platform_device s3c_device_fb = {
172 .name = "s3c-fb",
173 .id = -1,
174 .num_resources = ARRAY_SIZE(s3c_fb_resource),
175 .resource = s3c_fb_resource,
176 .dev = {
177 .dma_mask = &samsung_device_dma_mask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
179 },
180 };
181
182 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
183 {
184 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
185 &s3c_device_fb);
186 }
187 #endif /* CONFIG_S3C_DEV_FB */
188
189 /* FIMC */
190
191 #ifdef CONFIG_S5P_DEV_FIMC0
192 static struct resource s5p_fimc0_resource[] = {
193 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
194 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
195 };
196
197 struct platform_device s5p_device_fimc0 = {
198 .name = "s5p-fimc",
199 .id = 0,
200 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
201 .resource = s5p_fimc0_resource,
202 .dev = {
203 .dma_mask = &samsung_device_dma_mask,
204 .coherent_dma_mask = DMA_BIT_MASK(32),
205 },
206 };
207
208 struct platform_device s5p_device_fimc_md = {
209 .name = "s5p-fimc-md",
210 .id = -1,
211 };
212 #endif /* CONFIG_S5P_DEV_FIMC0 */
213
214 #ifdef CONFIG_S5P_DEV_FIMC1
215 static struct resource s5p_fimc1_resource[] = {
216 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
217 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
218 };
219
220 struct platform_device s5p_device_fimc1 = {
221 .name = "s5p-fimc",
222 .id = 1,
223 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
224 .resource = s5p_fimc1_resource,
225 .dev = {
226 .dma_mask = &samsung_device_dma_mask,
227 .coherent_dma_mask = DMA_BIT_MASK(32),
228 },
229 };
230 #endif /* CONFIG_S5P_DEV_FIMC1 */
231
232 #ifdef CONFIG_S5P_DEV_FIMC2
233 static struct resource s5p_fimc2_resource[] = {
234 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
235 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
236 };
237
238 struct platform_device s5p_device_fimc2 = {
239 .name = "s5p-fimc",
240 .id = 2,
241 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
242 .resource = s5p_fimc2_resource,
243 .dev = {
244 .dma_mask = &samsung_device_dma_mask,
245 .coherent_dma_mask = DMA_BIT_MASK(32),
246 },
247 };
248 #endif /* CONFIG_S5P_DEV_FIMC2 */
249
250 #ifdef CONFIG_S5P_DEV_FIMC3
251 static struct resource s5p_fimc3_resource[] = {
252 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
253 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
254 };
255
256 struct platform_device s5p_device_fimc3 = {
257 .name = "s5p-fimc",
258 .id = 3,
259 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
260 .resource = s5p_fimc3_resource,
261 .dev = {
262 .dma_mask = &samsung_device_dma_mask,
263 .coherent_dma_mask = DMA_BIT_MASK(32),
264 },
265 };
266 #endif /* CONFIG_S5P_DEV_FIMC3 */
267
268 /* FIMD0 */
269
270 #ifdef CONFIG_S5P_DEV_FIMD0
271 static struct resource s5p_fimd0_resource[] = {
272 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
273 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
274 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
275 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
276 };
277
278 struct platform_device s5p_device_fimd0 = {
279 .name = "s5p-fb",
280 .id = 0,
281 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
282 .resource = s5p_fimd0_resource,
283 .dev = {
284 .dma_mask = &samsung_device_dma_mask,
285 .coherent_dma_mask = DMA_BIT_MASK(32),
286 },
287 };
288
289 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
290 {
291 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
292 &s5p_device_fimd0);
293 }
294 #endif /* CONFIG_S5P_DEV_FIMD0 */
295
296 /* HWMON */
297
298 #ifdef CONFIG_S3C_DEV_HWMON
299 struct platform_device s3c_device_hwmon = {
300 .name = "s3c-hwmon",
301 .id = -1,
302 .dev.parent = &s3c_device_adc.dev,
303 };
304
305 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
306 {
307 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
308 &s3c_device_hwmon);
309 }
310 #endif /* CONFIG_S3C_DEV_HWMON */
311
312 /* HSMMC */
313
314 #ifdef CONFIG_S3C_DEV_HSMMC
315 static struct resource s3c_hsmmc_resource[] = {
316 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
317 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
318 };
319
320 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
321 .max_width = 4,
322 .host_caps = (MMC_CAP_4_BIT_DATA |
323 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
324 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
325 };
326
327 struct platform_device s3c_device_hsmmc0 = {
328 .name = "s3c-sdhci",
329 .id = 0,
330 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
331 .resource = s3c_hsmmc_resource,
332 .dev = {
333 .dma_mask = &samsung_device_dma_mask,
334 .coherent_dma_mask = DMA_BIT_MASK(32),
335 .platform_data = &s3c_hsmmc0_def_platdata,
336 },
337 };
338
339 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
340 {
341 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
342 }
343 #endif /* CONFIG_S3C_DEV_HSMMC */
344
345 #ifdef CONFIG_S3C_DEV_HSMMC1
346 static struct resource s3c_hsmmc1_resource[] = {
347 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
348 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
349 };
350
351 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
352 .max_width = 4,
353 .host_caps = (MMC_CAP_4_BIT_DATA |
354 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
355 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
356 };
357
358 struct platform_device s3c_device_hsmmc1 = {
359 .name = "s3c-sdhci",
360 .id = 1,
361 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
362 .resource = s3c_hsmmc1_resource,
363 .dev = {
364 .dma_mask = &samsung_device_dma_mask,
365 .coherent_dma_mask = DMA_BIT_MASK(32),
366 .platform_data = &s3c_hsmmc1_def_platdata,
367 },
368 };
369
370 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
371 {
372 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
373 }
374 #endif /* CONFIG_S3C_DEV_HSMMC1 */
375
376 /* HSMMC2 */
377
378 #ifdef CONFIG_S3C_DEV_HSMMC2
379 static struct resource s3c_hsmmc2_resource[] = {
380 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
381 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
382 };
383
384 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
385 .max_width = 4,
386 .host_caps = (MMC_CAP_4_BIT_DATA |
387 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
388 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
389 };
390
391 struct platform_device s3c_device_hsmmc2 = {
392 .name = "s3c-sdhci",
393 .id = 2,
394 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
395 .resource = s3c_hsmmc2_resource,
396 .dev = {
397 .dma_mask = &samsung_device_dma_mask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &s3c_hsmmc2_def_platdata,
400 },
401 };
402
403 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
404 {
405 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
406 }
407 #endif /* CONFIG_S3C_DEV_HSMMC2 */
408
409 #ifdef CONFIG_S3C_DEV_HSMMC3
410 static struct resource s3c_hsmmc3_resource[] = {
411 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
412 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
413 };
414
415 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
416 .max_width = 4,
417 .host_caps = (MMC_CAP_4_BIT_DATA |
418 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
419 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
420 };
421
422 struct platform_device s3c_device_hsmmc3 = {
423 .name = "s3c-sdhci",
424 .id = 3,
425 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
426 .resource = s3c_hsmmc3_resource,
427 .dev = {
428 .dma_mask = &samsung_device_dma_mask,
429 .coherent_dma_mask = DMA_BIT_MASK(32),
430 .platform_data = &s3c_hsmmc3_def_platdata,
431 },
432 };
433
434 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
435 {
436 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
437 }
438 #endif /* CONFIG_S3C_DEV_HSMMC3 */
439
440 /* I2C */
441
442 static struct resource s3c_i2c0_resource[] = {
443 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
444 [1] = DEFINE_RES_IRQ(IRQ_IIC),
445 };
446
447 struct platform_device s3c_device_i2c0 = {
448 .name = "s3c2410-i2c",
449 #ifdef CONFIG_S3C_DEV_I2C1
450 .id = 0,
451 #else
452 .id = -1,
453 #endif
454 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
455 .resource = s3c_i2c0_resource,
456 };
457
458 struct s3c2410_platform_i2c default_i2c_data __initdata = {
459 .flags = 0,
460 .slave_addr = 0x10,
461 .frequency = 100*1000,
462 .sda_delay = 100,
463 };
464
465 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
466 {
467 struct s3c2410_platform_i2c *npd;
468
469 if (!pd)
470 pd = &default_i2c_data;
471
472 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
473 &s3c_device_i2c0);
474
475 if (!npd->cfg_gpio)
476 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
477 }
478
479 #ifdef CONFIG_S3C_DEV_I2C1
480 static struct resource s3c_i2c1_resource[] = {
481 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
482 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
483 };
484
485 struct platform_device s3c_device_i2c1 = {
486 .name = "s3c2410-i2c",
487 .id = 1,
488 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
489 .resource = s3c_i2c1_resource,
490 };
491
492 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
493 {
494 struct s3c2410_platform_i2c *npd;
495
496 if (!pd) {
497 pd = &default_i2c_data;
498 pd->bus_num = 1;
499 }
500
501 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
502 &s3c_device_i2c1);
503
504 if (!npd->cfg_gpio)
505 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
506 }
507 #endif /* CONFIG_S3C_DEV_I2C1 */
508
509 #ifdef CONFIG_S3C_DEV_I2C2
510 static struct resource s3c_i2c2_resource[] = {
511 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
512 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
513 };
514
515 struct platform_device s3c_device_i2c2 = {
516 .name = "s3c2410-i2c",
517 .id = 2,
518 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
519 .resource = s3c_i2c2_resource,
520 };
521
522 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
523 {
524 struct s3c2410_platform_i2c *npd;
525
526 if (!pd) {
527 pd = &default_i2c_data;
528 pd->bus_num = 2;
529 }
530
531 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
532 &s3c_device_i2c2);
533
534 if (!npd->cfg_gpio)
535 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
536 }
537 #endif /* CONFIG_S3C_DEV_I2C2 */
538
539 #ifdef CONFIG_S3C_DEV_I2C3
540 static struct resource s3c_i2c3_resource[] = {
541 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
542 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
543 };
544
545 struct platform_device s3c_device_i2c3 = {
546 .name = "s3c2440-i2c",
547 .id = 3,
548 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
549 .resource = s3c_i2c3_resource,
550 };
551
552 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
553 {
554 struct s3c2410_platform_i2c *npd;
555
556 if (!pd) {
557 pd = &default_i2c_data;
558 pd->bus_num = 3;
559 }
560
561 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
562 &s3c_device_i2c3);
563
564 if (!npd->cfg_gpio)
565 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
566 }
567 #endif /*CONFIG_S3C_DEV_I2C3 */
568
569 #ifdef CONFIG_S3C_DEV_I2C4
570 static struct resource s3c_i2c4_resource[] = {
571 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
572 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
573 };
574
575 struct platform_device s3c_device_i2c4 = {
576 .name = "s3c2440-i2c",
577 .id = 4,
578 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
579 .resource = s3c_i2c4_resource,
580 };
581
582 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
583 {
584 struct s3c2410_platform_i2c *npd;
585
586 if (!pd) {
587 pd = &default_i2c_data;
588 pd->bus_num = 4;
589 }
590
591 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
592 &s3c_device_i2c4);
593
594 if (!npd->cfg_gpio)
595 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
596 }
597 #endif /*CONFIG_S3C_DEV_I2C4 */
598
599 #ifdef CONFIG_S3C_DEV_I2C5
600 static struct resource s3c_i2c5_resource[] = {
601 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
602 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
603 };
604
605 struct platform_device s3c_device_i2c5 = {
606 .name = "s3c2440-i2c",
607 .id = 5,
608 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
609 .resource = s3c_i2c5_resource,
610 };
611
612 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
613 {
614 struct s3c2410_platform_i2c *npd;
615
616 if (!pd) {
617 pd = &default_i2c_data;
618 pd->bus_num = 5;
619 }
620
621 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
622 &s3c_device_i2c5);
623
624 if (!npd->cfg_gpio)
625 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
626 }
627 #endif /*CONFIG_S3C_DEV_I2C5 */
628
629 #ifdef CONFIG_S3C_DEV_I2C6
630 static struct resource s3c_i2c6_resource[] = {
631 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
632 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
633 };
634
635 struct platform_device s3c_device_i2c6 = {
636 .name = "s3c2440-i2c",
637 .id = 6,
638 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
639 .resource = s3c_i2c6_resource,
640 };
641
642 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
643 {
644 struct s3c2410_platform_i2c *npd;
645
646 if (!pd) {
647 pd = &default_i2c_data;
648 pd->bus_num = 6;
649 }
650
651 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
652 &s3c_device_i2c6);
653
654 if (!npd->cfg_gpio)
655 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
656 }
657 #endif /* CONFIG_S3C_DEV_I2C6 */
658
659 #ifdef CONFIG_S3C_DEV_I2C7
660 static struct resource s3c_i2c7_resource[] = {
661 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
662 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
663 };
664
665 struct platform_device s3c_device_i2c7 = {
666 .name = "s3c2440-i2c",
667 .id = 7,
668 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
669 .resource = s3c_i2c7_resource,
670 };
671
672 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
673 {
674 struct s3c2410_platform_i2c *npd;
675
676 if (!pd) {
677 pd = &default_i2c_data;
678 pd->bus_num = 7;
679 }
680
681 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
682 &s3c_device_i2c7);
683
684 if (!npd->cfg_gpio)
685 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
686 }
687 #endif /* CONFIG_S3C_DEV_I2C7 */
688
689 /* I2C HDMIPHY */
690
691 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
692 static struct resource s5p_i2c_resource[] = {
693 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
694 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
695 };
696
697 struct platform_device s5p_device_i2c_hdmiphy = {
698 .name = "s3c2440-hdmiphy-i2c",
699 .id = -1,
700 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
701 .resource = s5p_i2c_resource,
702 };
703
704 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
705 {
706 struct s3c2410_platform_i2c *npd;
707
708 if (!pd) {
709 pd = &default_i2c_data;
710
711 if (soc_is_exynos4210())
712 pd->bus_num = 8;
713 else if (soc_is_s5pv210())
714 pd->bus_num = 3;
715 else
716 pd->bus_num = 0;
717 }
718
719 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
720 &s5p_device_i2c_hdmiphy);
721 }
722 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
723
724 /* I2S */
725
726 #ifdef CONFIG_PLAT_S3C24XX
727 static struct resource s3c_iis_resource[] = {
728 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
729 };
730
731 struct platform_device s3c_device_iis = {
732 .name = "s3c24xx-iis",
733 .id = -1,
734 .num_resources = ARRAY_SIZE(s3c_iis_resource),
735 .resource = s3c_iis_resource,
736 .dev = {
737 .dma_mask = &samsung_device_dma_mask,
738 .coherent_dma_mask = DMA_BIT_MASK(32),
739 }
740 };
741 #endif /* CONFIG_PLAT_S3C24XX */
742
743 #ifdef CONFIG_CPU_S3C2440
744 struct platform_device s3c2412_device_iis = {
745 .name = "s3c2412-iis",
746 .id = -1,
747 .dev = {
748 .dma_mask = &samsung_device_dma_mask,
749 .coherent_dma_mask = DMA_BIT_MASK(32),
750 }
751 };
752 #endif /* CONFIG_CPU_S3C2440 */
753
754 /* IDE CFCON */
755
756 #ifdef CONFIG_SAMSUNG_DEV_IDE
757 static struct resource s3c_cfcon_resource[] = {
758 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
759 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
760 };
761
762 struct platform_device s3c_device_cfcon = {
763 .id = 0,
764 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
765 .resource = s3c_cfcon_resource,
766 };
767
768 void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
769 {
770 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
771 &s3c_device_cfcon);
772 }
773 #endif /* CONFIG_SAMSUNG_DEV_IDE */
774
775 /* KEYPAD */
776
777 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
778 static struct resource samsung_keypad_resources[] = {
779 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
780 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
781 };
782
783 struct platform_device samsung_device_keypad = {
784 .name = "samsung-keypad",
785 .id = -1,
786 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
787 .resource = samsung_keypad_resources,
788 };
789
790 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
791 {
792 struct samsung_keypad_platdata *npd;
793
794 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
795 &samsung_device_keypad);
796
797 if (!npd->cfg_gpio)
798 npd->cfg_gpio = samsung_keypad_cfg_gpio;
799 }
800 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
801
802 /* LCD Controller */
803
804 #ifdef CONFIG_PLAT_S3C24XX
805 static struct resource s3c_lcd_resource[] = {
806 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
807 [1] = DEFINE_RES_IRQ(IRQ_LCD),
808 };
809
810 struct platform_device s3c_device_lcd = {
811 .name = "s3c2410-lcd",
812 .id = -1,
813 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
814 .resource = s3c_lcd_resource,
815 .dev = {
816 .dma_mask = &samsung_device_dma_mask,
817 .coherent_dma_mask = DMA_BIT_MASK(32),
818 }
819 };
820
821 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
822 {
823 struct s3c2410fb_mach_info *npd;
824
825 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
826 if (npd) {
827 npd->displays = kmemdup(pd->displays,
828 sizeof(struct s3c2410fb_display) * npd->num_displays,
829 GFP_KERNEL);
830 if (!npd->displays)
831 printk(KERN_ERR "no memory for LCD display data\n");
832 } else {
833 printk(KERN_ERR "no memory for LCD platform data\n");
834 }
835 }
836 #endif /* CONFIG_PLAT_S3C24XX */
837
838 /* MFC */
839
840 #ifdef CONFIG_S5P_DEV_MFC
841 static struct resource s5p_mfc_resource[] = {
842 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
843 [1] = DEFINE_RES_IRQ(IRQ_MFC),
844 };
845
846 struct platform_device s5p_device_mfc = {
847 .name = "s5p-mfc",
848 .id = -1,
849 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
850 .resource = s5p_mfc_resource,
851 };
852
853 /*
854 * MFC hardware has 2 memory interfaces which are modelled as two separate
855 * platform devices to let dma-mapping distinguish between them.
856 *
857 * MFC parent device (s5p_device_mfc) must be registered before memory
858 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
859 */
860
861 struct platform_device s5p_device_mfc_l = {
862 .name = "s5p-mfc-l",
863 .id = -1,
864 .dev = {
865 .parent = &s5p_device_mfc.dev,
866 .dma_mask = &samsung_device_dma_mask,
867 .coherent_dma_mask = DMA_BIT_MASK(32),
868 },
869 };
870
871 struct platform_device s5p_device_mfc_r = {
872 .name = "s5p-mfc-r",
873 .id = -1,
874 .dev = {
875 .parent = &s5p_device_mfc.dev,
876 .dma_mask = &samsung_device_dma_mask,
877 .coherent_dma_mask = DMA_BIT_MASK(32),
878 },
879 };
880 #endif /* CONFIG_S5P_DEV_MFC */
881
882 /* MIPI CSIS */
883
884 #ifdef CONFIG_S5P_DEV_CSIS0
885 static struct resource s5p_mipi_csis0_resource[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
887 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
888 };
889
890 struct platform_device s5p_device_mipi_csis0 = {
891 .name = "s5p-mipi-csis",
892 .id = 0,
893 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
894 .resource = s5p_mipi_csis0_resource,
895 };
896 #endif /* CONFIG_S5P_DEV_CSIS0 */
897
898 #ifdef CONFIG_S5P_DEV_CSIS1
899 static struct resource s5p_mipi_csis1_resource[] = {
900 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
901 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
902 };
903
904 struct platform_device s5p_device_mipi_csis1 = {
905 .name = "s5p-mipi-csis",
906 .id = 1,
907 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
908 .resource = s5p_mipi_csis1_resource,
909 };
910 #endif
911
912 /* NAND */
913
914 #ifdef CONFIG_S3C_DEV_NAND
915 static struct resource s3c_nand_resource[] = {
916 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
917 };
918
919 struct platform_device s3c_device_nand = {
920 .name = "s3c2410-nand",
921 .id = -1,
922 .num_resources = ARRAY_SIZE(s3c_nand_resource),
923 .resource = s3c_nand_resource,
924 };
925
926 /*
927 * s3c_nand_copy_set() - copy nand set data
928 * @set: The new structure, directly copied from the old.
929 *
930 * Copy all the fields from the NAND set field from what is probably __initdata
931 * to new kernel memory. The code returns 0 if the copy happened correctly or
932 * an error code for the calling function to display.
933 *
934 * Note, we currently do not try and look to see if we've already copied the
935 * data in a previous set.
936 */
937 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
938 {
939 void *ptr;
940 int size;
941
942 size = sizeof(struct mtd_partition) * set->nr_partitions;
943 if (size) {
944 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
945 set->partitions = ptr;
946
947 if (!ptr)
948 return -ENOMEM;
949 }
950
951 if (set->nr_map && set->nr_chips) {
952 size = sizeof(int) * set->nr_chips;
953 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
954 set->nr_map = ptr;
955
956 if (!ptr)
957 return -ENOMEM;
958 }
959
960 if (set->ecc_layout) {
961 ptr = kmemdup(set->ecc_layout,
962 sizeof(struct nand_ecclayout), GFP_KERNEL);
963 set->ecc_layout = ptr;
964
965 if (!ptr)
966 return -ENOMEM;
967 }
968
969 return 0;
970 }
971
972 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
973 {
974 struct s3c2410_platform_nand *npd;
975 int size;
976 int ret;
977
978 /* note, if we get a failure in allocation, we simply drop out of the
979 * function. If there is so little memory available at initialisation
980 * time then there is little chance the system is going to run.
981 */
982
983 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
984 &s3c_device_nand);
985 if (!npd)
986 return;
987
988 /* now see if we need to copy any of the nand set data */
989
990 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
991 if (size) {
992 struct s3c2410_nand_set *from = npd->sets;
993 struct s3c2410_nand_set *to;
994 int i;
995
996 to = kmemdup(from, size, GFP_KERNEL);
997 npd->sets = to; /* set, even if we failed */
998
999 if (!to) {
1000 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1001 return;
1002 }
1003
1004 for (i = 0; i < npd->nr_sets; i++) {
1005 ret = s3c_nand_copy_set(to);
1006 if (ret) {
1007 printk(KERN_ERR "%s: failed to copy set %d\n",
1008 __func__, i);
1009 return;
1010 }
1011 to++;
1012 }
1013 }
1014 }
1015 #endif /* CONFIG_S3C_DEV_NAND */
1016
1017 /* ONENAND */
1018
1019 #ifdef CONFIG_S3C_DEV_ONENAND
1020 static struct resource s3c_onenand_resources[] = {
1021 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1022 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1023 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1024 };
1025
1026 struct platform_device s3c_device_onenand = {
1027 .name = "samsung-onenand",
1028 .id = 0,
1029 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1030 .resource = s3c_onenand_resources,
1031 };
1032 #endif /* CONFIG_S3C_DEV_ONENAND */
1033
1034 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1035 static struct resource s3c64xx_onenand1_resources[] = {
1036 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1037 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1038 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1039 };
1040
1041 struct platform_device s3c64xx_device_onenand1 = {
1042 .name = "samsung-onenand",
1043 .id = 1,
1044 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1045 .resource = s3c64xx_onenand1_resources,
1046 };
1047
1048 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1049 {
1050 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1051 &s3c64xx_device_onenand1);
1052 }
1053 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1054
1055 #ifdef CONFIG_S5P_DEV_ONENAND
1056 static struct resource s5p_onenand_resources[] = {
1057 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1058 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1059 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1060 };
1061
1062 struct platform_device s5p_device_onenand = {
1063 .name = "s5pc110-onenand",
1064 .id = -1,
1065 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1066 .resource = s5p_onenand_resources,
1067 };
1068 #endif /* CONFIG_S5P_DEV_ONENAND */
1069
1070 /* PMU */
1071
1072 #ifdef CONFIG_PLAT_S5P
1073 static struct resource s5p_pmu_resource[] = {
1074 DEFINE_RES_IRQ(IRQ_PMU)
1075 };
1076
1077 struct platform_device s5p_device_pmu = {
1078 .name = "arm-pmu",
1079 .id = ARM_PMU_DEVICE_CPU,
1080 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1081 .resource = s5p_pmu_resource,
1082 };
1083
1084 static int __init s5p_pmu_init(void)
1085 {
1086 platform_device_register(&s5p_device_pmu);
1087 return 0;
1088 }
1089 arch_initcall(s5p_pmu_init);
1090 #endif /* CONFIG_PLAT_S5P */
1091
1092 /* PWM Timer */
1093
1094 #ifdef CONFIG_SAMSUNG_DEV_PWM
1095
1096 #define TIMER_RESOURCE_SIZE (1)
1097
1098 #define TIMER_RESOURCE(_tmr, _irq) \
1099 (struct resource [TIMER_RESOURCE_SIZE]) { \
1100 [0] = { \
1101 .start = _irq, \
1102 .end = _irq, \
1103 .flags = IORESOURCE_IRQ \
1104 } \
1105 }
1106
1107 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1108 .name = "s3c24xx-pwm", \
1109 .id = _tmr_no, \
1110 .num_resources = TIMER_RESOURCE_SIZE, \
1111 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1112
1113 /*
1114 * since we already have an static mapping for the timer,
1115 * we do not bother setting any IO resource for the base.
1116 */
1117
1118 struct platform_device s3c_device_timer[] = {
1119 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1120 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1121 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1122 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1123 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1124 };
1125 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1126
1127 /* RTC */
1128
1129 #ifdef CONFIG_PLAT_S3C24XX
1130 static struct resource s3c_rtc_resource[] = {
1131 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1132 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1133 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1134 };
1135
1136 struct platform_device s3c_device_rtc = {
1137 .name = "s3c2410-rtc",
1138 .id = -1,
1139 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1140 .resource = s3c_rtc_resource,
1141 };
1142 #endif /* CONFIG_PLAT_S3C24XX */
1143
1144 #ifdef CONFIG_S3C_DEV_RTC
1145 static struct resource s3c_rtc_resource[] = {
1146 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1147 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1148 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1149 };
1150
1151 struct platform_device s3c_device_rtc = {
1152 .name = "s3c64xx-rtc",
1153 .id = -1,
1154 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1155 .resource = s3c_rtc_resource,
1156 };
1157 #endif /* CONFIG_S3C_DEV_RTC */
1158
1159 /* SDI */
1160
1161 #ifdef CONFIG_PLAT_S3C24XX
1162 static struct resource s3c_sdi_resource[] = {
1163 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1164 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1165 };
1166
1167 struct platform_device s3c_device_sdi = {
1168 .name = "s3c2410-sdi",
1169 .id = -1,
1170 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1171 .resource = s3c_sdi_resource,
1172 };
1173
1174 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1175 {
1176 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1177 &s3c_device_sdi);
1178 }
1179 #endif /* CONFIG_PLAT_S3C24XX */
1180
1181 /* SPI */
1182
1183 #ifdef CONFIG_PLAT_S3C24XX
1184 static struct resource s3c_spi0_resource[] = {
1185 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1186 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1187 };
1188
1189 struct platform_device s3c_device_spi0 = {
1190 .name = "s3c2410-spi",
1191 .id = 0,
1192 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1193 .resource = s3c_spi0_resource,
1194 .dev = {
1195 .dma_mask = &samsung_device_dma_mask,
1196 .coherent_dma_mask = DMA_BIT_MASK(32),
1197 }
1198 };
1199
1200 static struct resource s3c_spi1_resource[] = {
1201 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1202 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1203 };
1204
1205 struct platform_device s3c_device_spi1 = {
1206 .name = "s3c2410-spi",
1207 .id = 1,
1208 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1209 .resource = s3c_spi1_resource,
1210 .dev = {
1211 .dma_mask = &samsung_device_dma_mask,
1212 .coherent_dma_mask = DMA_BIT_MASK(32),
1213 }
1214 };
1215 #endif /* CONFIG_PLAT_S3C24XX */
1216
1217 /* Touchscreen */
1218
1219 #ifdef CONFIG_PLAT_S3C24XX
1220 static struct resource s3c_ts_resource[] = {
1221 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1222 [1] = DEFINE_RES_IRQ(IRQ_TC),
1223 };
1224
1225 struct platform_device s3c_device_ts = {
1226 .name = "s3c2410-ts",
1227 .id = -1,
1228 .dev.parent = &s3c_device_adc.dev,
1229 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1230 .resource = s3c_ts_resource,
1231 };
1232
1233 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1234 {
1235 s3c_set_platdata(hard_s3c2410ts_info,
1236 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1237 }
1238 #endif /* CONFIG_PLAT_S3C24XX */
1239
1240 #ifdef CONFIG_SAMSUNG_DEV_TS
1241 static struct resource s3c_ts_resource[] = {
1242 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1243 [1] = DEFINE_RES_IRQ(IRQ_TC),
1244 };
1245
1246 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1247 .delay = 10000,
1248 .presc = 49,
1249 .oversampling_shift = 2,
1250 };
1251
1252 struct platform_device s3c_device_ts = {
1253 .name = "s3c64xx-ts",
1254 .id = -1,
1255 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1256 .resource = s3c_ts_resource,
1257 };
1258
1259 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1260 {
1261 if (!pd)
1262 pd = &default_ts_data;
1263
1264 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1265 &s3c_device_ts);
1266 }
1267 #endif /* CONFIG_SAMSUNG_DEV_TS */
1268
1269 /* TV */
1270
1271 #ifdef CONFIG_S5P_DEV_TV
1272
1273 static struct resource s5p_hdmi_resources[] = {
1274 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1275 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1276 };
1277
1278 struct platform_device s5p_device_hdmi = {
1279 .name = "s5p-hdmi",
1280 .id = -1,
1281 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1282 .resource = s5p_hdmi_resources,
1283 };
1284
1285 static struct resource s5p_sdo_resources[] = {
1286 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1287 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1288 };
1289
1290 struct platform_device s5p_device_sdo = {
1291 .name = "s5p-sdo",
1292 .id = -1,
1293 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1294 .resource = s5p_sdo_resources,
1295 };
1296
1297 static struct resource s5p_mixer_resources[] = {
1298 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1299 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1300 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1301 };
1302
1303 struct platform_device s5p_device_mixer = {
1304 .name = "s5p-mixer",
1305 .id = -1,
1306 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1307 .resource = s5p_mixer_resources,
1308 .dev = {
1309 .dma_mask = &samsung_device_dma_mask,
1310 .coherent_dma_mask = DMA_BIT_MASK(32),
1311 }
1312 };
1313 #endif /* CONFIG_S5P_DEV_TV */
1314
1315 /* USB */
1316
1317 #ifdef CONFIG_S3C_DEV_USB_HOST
1318 static struct resource s3c_usb_resource[] = {
1319 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1320 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1321 };
1322
1323 struct platform_device s3c_device_ohci = {
1324 .name = "s3c2410-ohci",
1325 .id = -1,
1326 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1327 .resource = s3c_usb_resource,
1328 .dev = {
1329 .dma_mask = &samsung_device_dma_mask,
1330 .coherent_dma_mask = DMA_BIT_MASK(32),
1331 }
1332 };
1333
1334 /*
1335 * s3c_ohci_set_platdata - initialise OHCI device platform data
1336 * @info: The platform data.
1337 *
1338 * This call copies the @info passed in and sets the device .platform_data
1339 * field to that copy. The @info is copied so that the original can be marked
1340 * __initdata.
1341 */
1342
1343 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1344 {
1345 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1346 &s3c_device_ohci);
1347 }
1348 #endif /* CONFIG_S3C_DEV_USB_HOST */
1349
1350 /* USB Device (Gadget) */
1351
1352 #ifdef CONFIG_PLAT_S3C24XX
1353 static struct resource s3c_usbgadget_resource[] = {
1354 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1355 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1356 };
1357
1358 struct platform_device s3c_device_usbgadget = {
1359 .name = "s3c2410-usbgadget",
1360 .id = -1,
1361 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1362 .resource = s3c_usbgadget_resource,
1363 };
1364
1365 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1366 {
1367 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1368 }
1369 #endif /* CONFIG_PLAT_S3C24XX */
1370
1371 /* USB EHCI Host Controller */
1372
1373 #ifdef CONFIG_S5P_DEV_USB_EHCI
1374 static struct resource s5p_ehci_resource[] = {
1375 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1376 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1377 };
1378
1379 struct platform_device s5p_device_ehci = {
1380 .name = "s5p-ehci",
1381 .id = -1,
1382 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1383 .resource = s5p_ehci_resource,
1384 .dev = {
1385 .dma_mask = &samsung_device_dma_mask,
1386 .coherent_dma_mask = DMA_BIT_MASK(32),
1387 }
1388 };
1389
1390 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1391 {
1392 struct s5p_ehci_platdata *npd;
1393
1394 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1395 &s5p_device_ehci);
1396
1397 if (!npd->phy_init)
1398 npd->phy_init = s5p_usb_phy_init;
1399 if (!npd->phy_exit)
1400 npd->phy_exit = s5p_usb_phy_exit;
1401 }
1402 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1403
1404 /* USB HSOTG */
1405
1406 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1407 static struct resource s3c_usb_hsotg_resources[] = {
1408 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
1409 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1410 };
1411
1412 struct platform_device s3c_device_usb_hsotg = {
1413 .name = "s3c-hsotg",
1414 .id = -1,
1415 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1416 .resource = s3c_usb_hsotg_resources,
1417 .dev = {
1418 .dma_mask = &samsung_device_dma_mask,
1419 .coherent_dma_mask = DMA_BIT_MASK(32),
1420 },
1421 };
1422 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1423
1424 /* USB High Spped 2.0 Device (Gadget) */
1425
1426 #ifdef CONFIG_PLAT_S3C24XX
1427 static struct resource s3c_hsudc_resource[] = {
1428 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1429 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1430 };
1431
1432 struct platform_device s3c_device_usb_hsudc = {
1433 .name = "s3c-hsudc",
1434 .id = -1,
1435 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1436 .resource = s3c_hsudc_resource,
1437 .dev = {
1438 .dma_mask = &samsung_device_dma_mask,
1439 .coherent_dma_mask = DMA_BIT_MASK(32),
1440 },
1441 };
1442
1443 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1444 {
1445 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1446 }
1447 #endif /* CONFIG_PLAT_S3C24XX */
1448
1449 /* WDT */
1450
1451 #ifdef CONFIG_S3C_DEV_WDT
1452 static struct resource s3c_wdt_resource[] = {
1453 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1454 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1455 };
1456
1457 struct platform_device s3c_device_wdt = {
1458 .name = "s3c2410-wdt",
1459 .id = -1,
1460 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1461 .resource = s3c_wdt_resource,
1462 };
1463 #endif /* CONFIG_S3C_DEV_WDT */
Linux kernel - Deliverables
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