1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
40 #include <mach/hardware.h>
42 #include <mach/irqs.h>
46 #include <plat/devs.h>
49 #include <plat/ehci.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
54 #include <plat/keypad.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
60 #include <plat/usb-control.h>
61 #include <plat/usb-phy.h>
62 #include <plat/regs-iic.h>
63 #include <plat/regs-serial.h>
64 #include <plat/regs-spi.h>
65 #include <plat/s3c64xx-spi.h>
67 static u64 samsung_device_dma_mask
= DMA_BIT_MASK(32);
70 #ifdef CONFIG_CPU_S3C2440
71 static struct resource s3c_ac97_resource
[] = {
72 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97
, S3C2440_SZ_AC97
),
73 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97
),
74 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT
, "PCM out"),
75 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN
, "PCM in"),
76 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN
, "Mic in"),
79 struct platform_device s3c_device_ac97
= {
80 .name
= "samsung-ac97",
82 .num_resources
= ARRAY_SIZE(s3c_ac97_resource
),
83 .resource
= s3c_ac97_resource
,
85 .dma_mask
= &samsung_device_dma_mask
,
86 .coherent_dma_mask
= DMA_BIT_MASK(32),
89 #endif /* CONFIG_CPU_S3C2440 */
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource
[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
96 [1] = DEFINE_RES_IRQ(IRQ_TC
),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
100 struct platform_device s3c_device_adc
= {
101 .name
= "s3c24xx-adc",
103 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
104 .resource
= s3c_adc_resource
,
106 #endif /* CONFIG_PLAT_S3C24XX */
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource
[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
111 [1] = DEFINE_RES_IRQ(IRQ_TC
),
112 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
115 struct platform_device s3c_device_adc
= {
116 .name
= "samsung-adc",
118 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
119 .resource
= s3c_adc_resource
,
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
123 /* Camif Controller */
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource
[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF
, S3C2440_SZ_CAMIF
),
128 [1] = DEFINE_RES_IRQ(IRQ_CAM
),
131 struct platform_device s3c_device_camif
= {
132 .name
= "s3c2440-camif",
134 .num_resources
= ARRAY_SIZE(s3c_camif_resource
),
135 .resource
= s3c_camif_resource
,
137 .dma_mask
= &samsung_device_dma_mask
,
138 .coherent_dma_mask
= DMA_BIT_MASK(32),
141 #endif /* CONFIG_CPU_S3C2440 */
145 struct platform_device samsung_asoc_dma
= {
146 .name
= "samsung-audio",
149 .dma_mask
= &samsung_device_dma_mask
,
150 .coherent_dma_mask
= DMA_BIT_MASK(32),
154 struct platform_device samsung_asoc_idma
= {
155 .name
= "samsung-idma",
158 .dma_mask
= &samsung_device_dma_mask
,
159 .coherent_dma_mask
= DMA_BIT_MASK(32),
165 #ifdef CONFIG_S3C_DEV_FB
166 static struct resource s3c_fb_resource
[] = {
167 [0] = DEFINE_RES_MEM(S3C_PA_FB
, SZ_16K
),
168 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC
),
169 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO
),
170 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM
),
173 struct platform_device s3c_device_fb
= {
176 .num_resources
= ARRAY_SIZE(s3c_fb_resource
),
177 .resource
= s3c_fb_resource
,
179 .dma_mask
= &samsung_device_dma_mask
,
180 .coherent_dma_mask
= DMA_BIT_MASK(32),
184 void __init
s3c_fb_set_platdata(struct s3c_fb_platdata
*pd
)
186 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
189 #endif /* CONFIG_S3C_DEV_FB */
193 #ifdef CONFIG_S5P_DEV_FIMC0
194 static struct resource s5p_fimc0_resource
[] = {
195 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0
, SZ_4K
),
196 [1] = DEFINE_RES_IRQ(IRQ_FIMC0
),
199 struct platform_device s5p_device_fimc0
= {
202 .num_resources
= ARRAY_SIZE(s5p_fimc0_resource
),
203 .resource
= s5p_fimc0_resource
,
205 .dma_mask
= &samsung_device_dma_mask
,
206 .coherent_dma_mask
= DMA_BIT_MASK(32),
210 struct platform_device s5p_device_fimc_md
= {
211 .name
= "s5p-fimc-md",
214 #endif /* CONFIG_S5P_DEV_FIMC0 */
216 #ifdef CONFIG_S5P_DEV_FIMC1
217 static struct resource s5p_fimc1_resource
[] = {
218 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1
, SZ_4K
),
219 [1] = DEFINE_RES_IRQ(IRQ_FIMC1
),
222 struct platform_device s5p_device_fimc1
= {
225 .num_resources
= ARRAY_SIZE(s5p_fimc1_resource
),
226 .resource
= s5p_fimc1_resource
,
228 .dma_mask
= &samsung_device_dma_mask
,
229 .coherent_dma_mask
= DMA_BIT_MASK(32),
232 #endif /* CONFIG_S5P_DEV_FIMC1 */
234 #ifdef CONFIG_S5P_DEV_FIMC2
235 static struct resource s5p_fimc2_resource
[] = {
236 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2
, SZ_4K
),
237 [1] = DEFINE_RES_IRQ(IRQ_FIMC2
),
240 struct platform_device s5p_device_fimc2
= {
243 .num_resources
= ARRAY_SIZE(s5p_fimc2_resource
),
244 .resource
= s5p_fimc2_resource
,
246 .dma_mask
= &samsung_device_dma_mask
,
247 .coherent_dma_mask
= DMA_BIT_MASK(32),
250 #endif /* CONFIG_S5P_DEV_FIMC2 */
252 #ifdef CONFIG_S5P_DEV_FIMC3
253 static struct resource s5p_fimc3_resource
[] = {
254 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3
, SZ_4K
),
255 [1] = DEFINE_RES_IRQ(IRQ_FIMC3
),
258 struct platform_device s5p_device_fimc3
= {
261 .num_resources
= ARRAY_SIZE(s5p_fimc3_resource
),
262 .resource
= s5p_fimc3_resource
,
264 .dma_mask
= &samsung_device_dma_mask
,
265 .coherent_dma_mask
= DMA_BIT_MASK(32),
268 #endif /* CONFIG_S5P_DEV_FIMC3 */
272 #ifdef CONFIG_S5P_DEV_FIMD0
273 static struct resource s5p_fimd0_resource
[] = {
274 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0
, SZ_32K
),
275 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC
),
276 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO
),
277 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM
),
280 struct platform_device s5p_device_fimd0
= {
283 .num_resources
= ARRAY_SIZE(s5p_fimd0_resource
),
284 .resource
= s5p_fimd0_resource
,
286 .dma_mask
= &samsung_device_dma_mask
,
287 .coherent_dma_mask
= DMA_BIT_MASK(32),
291 void __init
s5p_fimd0_set_platdata(struct s3c_fb_platdata
*pd
)
293 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
296 #endif /* CONFIG_S5P_DEV_FIMD0 */
300 #ifdef CONFIG_S3C_DEV_HWMON
301 struct platform_device s3c_device_hwmon
= {
304 .dev
.parent
= &s3c_device_adc
.dev
,
307 void __init
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata
*pd
)
309 s3c_set_platdata(pd
, sizeof(struct s3c_hwmon_pdata
),
312 #endif /* CONFIG_S3C_DEV_HWMON */
316 #ifdef CONFIG_S3C_DEV_HSMMC
317 static struct resource s3c_hsmmc_resource
[] = {
318 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0
, SZ_4K
),
319 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0
),
322 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata
= {
324 .host_caps
= (MMC_CAP_4_BIT_DATA
|
325 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
326 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
329 struct platform_device s3c_device_hsmmc0
= {
332 .num_resources
= ARRAY_SIZE(s3c_hsmmc_resource
),
333 .resource
= s3c_hsmmc_resource
,
335 .dma_mask
= &samsung_device_dma_mask
,
336 .coherent_dma_mask
= DMA_BIT_MASK(32),
337 .platform_data
= &s3c_hsmmc0_def_platdata
,
341 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
*pd
)
343 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc0_def_platdata
);
345 #endif /* CONFIG_S3C_DEV_HSMMC */
347 #ifdef CONFIG_S3C_DEV_HSMMC1
348 static struct resource s3c_hsmmc1_resource
[] = {
349 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1
, SZ_4K
),
350 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1
),
353 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata
= {
355 .host_caps
= (MMC_CAP_4_BIT_DATA
|
356 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
357 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
360 struct platform_device s3c_device_hsmmc1
= {
363 .num_resources
= ARRAY_SIZE(s3c_hsmmc1_resource
),
364 .resource
= s3c_hsmmc1_resource
,
366 .dma_mask
= &samsung_device_dma_mask
,
367 .coherent_dma_mask
= DMA_BIT_MASK(32),
368 .platform_data
= &s3c_hsmmc1_def_platdata
,
372 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
*pd
)
374 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc1_def_platdata
);
376 #endif /* CONFIG_S3C_DEV_HSMMC1 */
380 #ifdef CONFIG_S3C_DEV_HSMMC2
381 static struct resource s3c_hsmmc2_resource
[] = {
382 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2
, SZ_4K
),
383 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2
),
386 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata
= {
388 .host_caps
= (MMC_CAP_4_BIT_DATA
|
389 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
390 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
393 struct platform_device s3c_device_hsmmc2
= {
396 .num_resources
= ARRAY_SIZE(s3c_hsmmc2_resource
),
397 .resource
= s3c_hsmmc2_resource
,
399 .dma_mask
= &samsung_device_dma_mask
,
400 .coherent_dma_mask
= DMA_BIT_MASK(32),
401 .platform_data
= &s3c_hsmmc2_def_platdata
,
405 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
*pd
)
407 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc2_def_platdata
);
409 #endif /* CONFIG_S3C_DEV_HSMMC2 */
411 #ifdef CONFIG_S3C_DEV_HSMMC3
412 static struct resource s3c_hsmmc3_resource
[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3
, SZ_4K
),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3
),
417 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata
= {
419 .host_caps
= (MMC_CAP_4_BIT_DATA
|
420 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
421 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
424 struct platform_device s3c_device_hsmmc3
= {
427 .num_resources
= ARRAY_SIZE(s3c_hsmmc3_resource
),
428 .resource
= s3c_hsmmc3_resource
,
430 .dma_mask
= &samsung_device_dma_mask
,
431 .coherent_dma_mask
= DMA_BIT_MASK(32),
432 .platform_data
= &s3c_hsmmc3_def_platdata
,
436 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
*pd
)
438 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc3_def_platdata
);
440 #endif /* CONFIG_S3C_DEV_HSMMC3 */
444 static struct resource s3c_i2c0_resource
[] = {
445 [0] = DEFINE_RES_MEM(S3C_PA_IIC
, SZ_4K
),
446 [1] = DEFINE_RES_IRQ(IRQ_IIC
),
449 struct platform_device s3c_device_i2c0
= {
450 .name
= "s3c2410-i2c",
451 #ifdef CONFIG_S3C_DEV_I2C1
456 .num_resources
= ARRAY_SIZE(s3c_i2c0_resource
),
457 .resource
= s3c_i2c0_resource
,
460 struct s3c2410_platform_i2c default_i2c_data __initdata
= {
463 .frequency
= 100*1000,
467 void __init
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c
*pd
)
469 struct s3c2410_platform_i2c
*npd
;
472 pd
= &default_i2c_data
;
474 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
478 npd
->cfg_gpio
= s3c_i2c0_cfg_gpio
;
481 #ifdef CONFIG_S3C_DEV_I2C1
482 static struct resource s3c_i2c1_resource
[] = {
483 [0] = DEFINE_RES_MEM(S3C_PA_IIC1
, SZ_4K
),
484 [1] = DEFINE_RES_IRQ(IRQ_IIC1
),
487 struct platform_device s3c_device_i2c1
= {
488 .name
= "s3c2410-i2c",
490 .num_resources
= ARRAY_SIZE(s3c_i2c1_resource
),
491 .resource
= s3c_i2c1_resource
,
494 void __init
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c
*pd
)
496 struct s3c2410_platform_i2c
*npd
;
499 pd
= &default_i2c_data
;
503 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
507 npd
->cfg_gpio
= s3c_i2c1_cfg_gpio
;
509 #endif /* CONFIG_S3C_DEV_I2C1 */
511 #ifdef CONFIG_S3C_DEV_I2C2
512 static struct resource s3c_i2c2_resource
[] = {
513 [0] = DEFINE_RES_MEM(S3C_PA_IIC2
, SZ_4K
),
514 [1] = DEFINE_RES_IRQ(IRQ_IIC2
),
517 struct platform_device s3c_device_i2c2
= {
518 .name
= "s3c2410-i2c",
520 .num_resources
= ARRAY_SIZE(s3c_i2c2_resource
),
521 .resource
= s3c_i2c2_resource
,
524 void __init
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c
*pd
)
526 struct s3c2410_platform_i2c
*npd
;
529 pd
= &default_i2c_data
;
533 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
537 npd
->cfg_gpio
= s3c_i2c2_cfg_gpio
;
539 #endif /* CONFIG_S3C_DEV_I2C2 */
541 #ifdef CONFIG_S3C_DEV_I2C3
542 static struct resource s3c_i2c3_resource
[] = {
543 [0] = DEFINE_RES_MEM(S3C_PA_IIC3
, SZ_4K
),
544 [1] = DEFINE_RES_IRQ(IRQ_IIC3
),
547 struct platform_device s3c_device_i2c3
= {
548 .name
= "s3c2440-i2c",
550 .num_resources
= ARRAY_SIZE(s3c_i2c3_resource
),
551 .resource
= s3c_i2c3_resource
,
554 void __init
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c
*pd
)
556 struct s3c2410_platform_i2c
*npd
;
559 pd
= &default_i2c_data
;
563 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
567 npd
->cfg_gpio
= s3c_i2c3_cfg_gpio
;
569 #endif /*CONFIG_S3C_DEV_I2C3 */
571 #ifdef CONFIG_S3C_DEV_I2C4
572 static struct resource s3c_i2c4_resource
[] = {
573 [0] = DEFINE_RES_MEM(S3C_PA_IIC4
, SZ_4K
),
574 [1] = DEFINE_RES_IRQ(IRQ_IIC4
),
577 struct platform_device s3c_device_i2c4
= {
578 .name
= "s3c2440-i2c",
580 .num_resources
= ARRAY_SIZE(s3c_i2c4_resource
),
581 .resource
= s3c_i2c4_resource
,
584 void __init
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c
*pd
)
586 struct s3c2410_platform_i2c
*npd
;
589 pd
= &default_i2c_data
;
593 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
597 npd
->cfg_gpio
= s3c_i2c4_cfg_gpio
;
599 #endif /*CONFIG_S3C_DEV_I2C4 */
601 #ifdef CONFIG_S3C_DEV_I2C5
602 static struct resource s3c_i2c5_resource
[] = {
603 [0] = DEFINE_RES_MEM(S3C_PA_IIC5
, SZ_4K
),
604 [1] = DEFINE_RES_IRQ(IRQ_IIC5
),
607 struct platform_device s3c_device_i2c5
= {
608 .name
= "s3c2440-i2c",
610 .num_resources
= ARRAY_SIZE(s3c_i2c5_resource
),
611 .resource
= s3c_i2c5_resource
,
614 void __init
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c
*pd
)
616 struct s3c2410_platform_i2c
*npd
;
619 pd
= &default_i2c_data
;
623 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
627 npd
->cfg_gpio
= s3c_i2c5_cfg_gpio
;
629 #endif /*CONFIG_S3C_DEV_I2C5 */
631 #ifdef CONFIG_S3C_DEV_I2C6
632 static struct resource s3c_i2c6_resource
[] = {
633 [0] = DEFINE_RES_MEM(S3C_PA_IIC6
, SZ_4K
),
634 [1] = DEFINE_RES_IRQ(IRQ_IIC6
),
637 struct platform_device s3c_device_i2c6
= {
638 .name
= "s3c2440-i2c",
640 .num_resources
= ARRAY_SIZE(s3c_i2c6_resource
),
641 .resource
= s3c_i2c6_resource
,
644 void __init
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c
*pd
)
646 struct s3c2410_platform_i2c
*npd
;
649 pd
= &default_i2c_data
;
653 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
657 npd
->cfg_gpio
= s3c_i2c6_cfg_gpio
;
659 #endif /* CONFIG_S3C_DEV_I2C6 */
661 #ifdef CONFIG_S3C_DEV_I2C7
662 static struct resource s3c_i2c7_resource
[] = {
663 [0] = DEFINE_RES_MEM(S3C_PA_IIC7
, SZ_4K
),
664 [1] = DEFINE_RES_IRQ(IRQ_IIC7
),
667 struct platform_device s3c_device_i2c7
= {
668 .name
= "s3c2440-i2c",
670 .num_resources
= ARRAY_SIZE(s3c_i2c7_resource
),
671 .resource
= s3c_i2c7_resource
,
674 void __init
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c
*pd
)
676 struct s3c2410_platform_i2c
*npd
;
679 pd
= &default_i2c_data
;
683 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
687 npd
->cfg_gpio
= s3c_i2c7_cfg_gpio
;
689 #endif /* CONFIG_S3C_DEV_I2C7 */
693 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
694 static struct resource s5p_i2c_resource
[] = {
695 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY
, SZ_4K
),
696 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY
),
699 struct platform_device s5p_device_i2c_hdmiphy
= {
700 .name
= "s3c2440-hdmiphy-i2c",
702 .num_resources
= ARRAY_SIZE(s5p_i2c_resource
),
703 .resource
= s5p_i2c_resource
,
706 void __init
s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c
*pd
)
708 struct s3c2410_platform_i2c
*npd
;
711 pd
= &default_i2c_data
;
713 if (soc_is_exynos4210())
715 else if (soc_is_s5pv210())
721 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
722 &s5p_device_i2c_hdmiphy
);
724 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
728 #ifdef CONFIG_PLAT_S3C24XX
729 static struct resource s3c_iis_resource
[] = {
730 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS
, S3C24XX_SZ_IIS
),
733 struct platform_device s3c_device_iis
= {
734 .name
= "s3c24xx-iis",
736 .num_resources
= ARRAY_SIZE(s3c_iis_resource
),
737 .resource
= s3c_iis_resource
,
739 .dma_mask
= &samsung_device_dma_mask
,
740 .coherent_dma_mask
= DMA_BIT_MASK(32),
743 #endif /* CONFIG_PLAT_S3C24XX */
745 #ifdef CONFIG_CPU_S3C2440
746 struct platform_device s3c2412_device_iis
= {
747 .name
= "s3c2412-iis",
750 .dma_mask
= &samsung_device_dma_mask
,
751 .coherent_dma_mask
= DMA_BIT_MASK(32),
754 #endif /* CONFIG_CPU_S3C2440 */
758 #ifdef CONFIG_SAMSUNG_DEV_IDE
759 static struct resource s3c_cfcon_resource
[] = {
760 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON
, SZ_16K
),
761 [1] = DEFINE_RES_IRQ(IRQ_CFCON
),
764 struct platform_device s3c_device_cfcon
= {
766 .num_resources
= ARRAY_SIZE(s3c_cfcon_resource
),
767 .resource
= s3c_cfcon_resource
,
770 void s3c_ide_set_platdata(struct s3c_ide_platdata
*pdata
)
772 s3c_set_platdata(pdata
, sizeof(struct s3c_ide_platdata
),
775 #endif /* CONFIG_SAMSUNG_DEV_IDE */
779 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
780 static struct resource samsung_keypad_resources
[] = {
781 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD
, SZ_32
),
782 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD
),
785 struct platform_device samsung_device_keypad
= {
786 .name
= "samsung-keypad",
788 .num_resources
= ARRAY_SIZE(samsung_keypad_resources
),
789 .resource
= samsung_keypad_resources
,
792 void __init
samsung_keypad_set_platdata(struct samsung_keypad_platdata
*pd
)
794 struct samsung_keypad_platdata
*npd
;
796 npd
= s3c_set_platdata(pd
, sizeof(struct samsung_keypad_platdata
),
797 &samsung_device_keypad
);
800 npd
->cfg_gpio
= samsung_keypad_cfg_gpio
;
802 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
806 #ifdef CONFIG_PLAT_S3C24XX
807 static struct resource s3c_lcd_resource
[] = {
808 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD
, S3C24XX_SZ_LCD
),
809 [1] = DEFINE_RES_IRQ(IRQ_LCD
),
812 struct platform_device s3c_device_lcd
= {
813 .name
= "s3c2410-lcd",
815 .num_resources
= ARRAY_SIZE(s3c_lcd_resource
),
816 .resource
= s3c_lcd_resource
,
818 .dma_mask
= &samsung_device_dma_mask
,
819 .coherent_dma_mask
= DMA_BIT_MASK(32),
823 void __init
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info
*pd
)
825 struct s3c2410fb_mach_info
*npd
;
827 npd
= s3c_set_platdata(pd
, sizeof(*npd
), &s3c_device_lcd
);
829 npd
->displays
= kmemdup(pd
->displays
,
830 sizeof(struct s3c2410fb_display
) * npd
->num_displays
,
833 printk(KERN_ERR
"no memory for LCD display data\n");
835 printk(KERN_ERR
"no memory for LCD platform data\n");
838 #endif /* CONFIG_PLAT_S3C24XX */
842 #ifdef CONFIG_S5P_DEV_MFC
843 static struct resource s5p_mfc_resource
[] = {
844 [0] = DEFINE_RES_MEM(S5P_PA_MFC
, SZ_64K
),
845 [1] = DEFINE_RES_IRQ(IRQ_MFC
),
848 struct platform_device s5p_device_mfc
= {
851 .num_resources
= ARRAY_SIZE(s5p_mfc_resource
),
852 .resource
= s5p_mfc_resource
,
856 * MFC hardware has 2 memory interfaces which are modelled as two separate
857 * platform devices to let dma-mapping distinguish between them.
859 * MFC parent device (s5p_device_mfc) must be registered before memory
860 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
863 struct platform_device s5p_device_mfc_l
= {
867 .parent
= &s5p_device_mfc
.dev
,
868 .dma_mask
= &samsung_device_dma_mask
,
869 .coherent_dma_mask
= DMA_BIT_MASK(32),
873 struct platform_device s5p_device_mfc_r
= {
877 .parent
= &s5p_device_mfc
.dev
,
878 .dma_mask
= &samsung_device_dma_mask
,
879 .coherent_dma_mask
= DMA_BIT_MASK(32),
882 #endif /* CONFIG_S5P_DEV_MFC */
886 #ifdef CONFIG_S5P_DEV_CSIS0
887 static struct resource s5p_mipi_csis0_resource
[] = {
888 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0
, SZ_4K
),
889 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0
),
892 struct platform_device s5p_device_mipi_csis0
= {
893 .name
= "s5p-mipi-csis",
895 .num_resources
= ARRAY_SIZE(s5p_mipi_csis0_resource
),
896 .resource
= s5p_mipi_csis0_resource
,
898 #endif /* CONFIG_S5P_DEV_CSIS0 */
900 #ifdef CONFIG_S5P_DEV_CSIS1
901 static struct resource s5p_mipi_csis1_resource
[] = {
902 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1
, SZ_4K
),
903 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1
),
906 struct platform_device s5p_device_mipi_csis1
= {
907 .name
= "s5p-mipi-csis",
909 .num_resources
= ARRAY_SIZE(s5p_mipi_csis1_resource
),
910 .resource
= s5p_mipi_csis1_resource
,
916 #ifdef CONFIG_S3C_DEV_NAND
917 static struct resource s3c_nand_resource
[] = {
918 [0] = DEFINE_RES_MEM(S3C_PA_NAND
, SZ_1M
),
921 struct platform_device s3c_device_nand
= {
922 .name
= "s3c2410-nand",
924 .num_resources
= ARRAY_SIZE(s3c_nand_resource
),
925 .resource
= s3c_nand_resource
,
929 * s3c_nand_copy_set() - copy nand set data
930 * @set: The new structure, directly copied from the old.
932 * Copy all the fields from the NAND set field from what is probably __initdata
933 * to new kernel memory. The code returns 0 if the copy happened correctly or
934 * an error code for the calling function to display.
936 * Note, we currently do not try and look to see if we've already copied the
937 * data in a previous set.
939 static int __init
s3c_nand_copy_set(struct s3c2410_nand_set
*set
)
944 size
= sizeof(struct mtd_partition
) * set
->nr_partitions
;
946 ptr
= kmemdup(set
->partitions
, size
, GFP_KERNEL
);
947 set
->partitions
= ptr
;
953 if (set
->nr_map
&& set
->nr_chips
) {
954 size
= sizeof(int) * set
->nr_chips
;
955 ptr
= kmemdup(set
->nr_map
, size
, GFP_KERNEL
);
962 if (set
->ecc_layout
) {
963 ptr
= kmemdup(set
->ecc_layout
,
964 sizeof(struct nand_ecclayout
), GFP_KERNEL
);
965 set
->ecc_layout
= ptr
;
974 void __init
s3c_nand_set_platdata(struct s3c2410_platform_nand
*nand
)
976 struct s3c2410_platform_nand
*npd
;
980 /* note, if we get a failure in allocation, we simply drop out of the
981 * function. If there is so little memory available at initialisation
982 * time then there is little chance the system is going to run.
985 npd
= s3c_set_platdata(nand
, sizeof(struct s3c2410_platform_nand
),
990 /* now see if we need to copy any of the nand set data */
992 size
= sizeof(struct s3c2410_nand_set
) * npd
->nr_sets
;
994 struct s3c2410_nand_set
*from
= npd
->sets
;
995 struct s3c2410_nand_set
*to
;
998 to
= kmemdup(from
, size
, GFP_KERNEL
);
999 npd
->sets
= to
; /* set, even if we failed */
1002 printk(KERN_ERR
"%s: no memory for sets\n", __func__
);
1006 for (i
= 0; i
< npd
->nr_sets
; i
++) {
1007 ret
= s3c_nand_copy_set(to
);
1009 printk(KERN_ERR
"%s: failed to copy set %d\n",
1017 #endif /* CONFIG_S3C_DEV_NAND */
1021 #ifdef CONFIG_S3C_DEV_ONENAND
1022 static struct resource s3c_onenand_resources
[] = {
1023 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND
, SZ_1K
),
1024 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF
, S3C_SZ_ONENAND_BUF
),
1025 [2] = DEFINE_RES_IRQ(IRQ_ONENAND
),
1028 struct platform_device s3c_device_onenand
= {
1029 .name
= "samsung-onenand",
1031 .num_resources
= ARRAY_SIZE(s3c_onenand_resources
),
1032 .resource
= s3c_onenand_resources
,
1034 #endif /* CONFIG_S3C_DEV_ONENAND */
1036 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1037 static struct resource s3c64xx_onenand1_resources
[] = {
1038 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1
, SZ_1K
),
1039 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF
, S3C64XX_SZ_ONENAND1_BUF
),
1040 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1
),
1043 struct platform_device s3c64xx_device_onenand1
= {
1044 .name
= "samsung-onenand",
1046 .num_resources
= ARRAY_SIZE(s3c64xx_onenand1_resources
),
1047 .resource
= s3c64xx_onenand1_resources
,
1050 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data
*pdata
)
1052 s3c_set_platdata(pdata
, sizeof(struct onenand_platform_data
),
1053 &s3c64xx_device_onenand1
);
1055 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1057 #ifdef CONFIG_S5P_DEV_ONENAND
1058 static struct resource s5p_onenand_resources
[] = {
1059 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND
, SZ_128K
),
1060 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA
, SZ_8K
),
1061 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI
),
1064 struct platform_device s5p_device_onenand
= {
1065 .name
= "s5pc110-onenand",
1067 .num_resources
= ARRAY_SIZE(s5p_onenand_resources
),
1068 .resource
= s5p_onenand_resources
,
1070 #endif /* CONFIG_S5P_DEV_ONENAND */
1074 #ifdef CONFIG_PLAT_S5P
1075 static struct resource s5p_pmu_resource
[] = {
1076 DEFINE_RES_IRQ(IRQ_PMU
)
1079 struct platform_device s5p_device_pmu
= {
1081 .id
= ARM_PMU_DEVICE_CPU
,
1082 .num_resources
= ARRAY_SIZE(s5p_pmu_resource
),
1083 .resource
= s5p_pmu_resource
,
1086 static int __init
s5p_pmu_init(void)
1088 platform_device_register(&s5p_device_pmu
);
1091 arch_initcall(s5p_pmu_init
);
1092 #endif /* CONFIG_PLAT_S5P */
1096 #ifdef CONFIG_SAMSUNG_DEV_PWM
1098 #define TIMER_RESOURCE_SIZE (1)
1100 #define TIMER_RESOURCE(_tmr, _irq) \
1101 (struct resource [TIMER_RESOURCE_SIZE]) { \
1105 .flags = IORESOURCE_IRQ \
1109 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1110 .name = "s3c24xx-pwm", \
1112 .num_resources = TIMER_RESOURCE_SIZE, \
1113 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1116 * since we already have an static mapping for the timer,
1117 * we do not bother setting any IO resource for the base.
1120 struct platform_device s3c_device_timer
[] = {
1121 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0
) },
1122 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1
) },
1123 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2
) },
1124 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3
) },
1125 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4
) },
1127 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1131 #ifdef CONFIG_PLAT_S3C24XX
1132 static struct resource s3c_rtc_resource
[] = {
1133 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC
, SZ_256
),
1134 [1] = DEFINE_RES_IRQ(IRQ_RTC
),
1135 [2] = DEFINE_RES_IRQ(IRQ_TICK
),
1138 struct platform_device s3c_device_rtc
= {
1139 .name
= "s3c2410-rtc",
1141 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1142 .resource
= s3c_rtc_resource
,
1144 #endif /* CONFIG_PLAT_S3C24XX */
1146 #ifdef CONFIG_S3C_DEV_RTC
1147 static struct resource s3c_rtc_resource
[] = {
1148 [0] = DEFINE_RES_MEM(S3C_PA_RTC
, SZ_256
),
1149 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM
),
1150 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC
),
1153 struct platform_device s3c_device_rtc
= {
1154 .name
= "s3c64xx-rtc",
1156 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1157 .resource
= s3c_rtc_resource
,
1159 #endif /* CONFIG_S3C_DEV_RTC */
1163 #ifdef CONFIG_PLAT_S3C24XX
1164 static struct resource s3c_sdi_resource
[] = {
1165 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI
, S3C24XX_SZ_SDI
),
1166 [1] = DEFINE_RES_IRQ(IRQ_SDI
),
1169 struct platform_device s3c_device_sdi
= {
1170 .name
= "s3c2410-sdi",
1172 .num_resources
= ARRAY_SIZE(s3c_sdi_resource
),
1173 .resource
= s3c_sdi_resource
,
1176 void __init
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata
*pdata
)
1178 s3c_set_platdata(pdata
, sizeof(struct s3c24xx_mci_pdata
),
1181 #endif /* CONFIG_PLAT_S3C24XX */
1185 #ifdef CONFIG_PLAT_S3C24XX
1186 static struct resource s3c_spi0_resource
[] = {
1187 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI
, SZ_32
),
1188 [1] = DEFINE_RES_IRQ(IRQ_SPI0
),
1191 struct platform_device s3c_device_spi0
= {
1192 .name
= "s3c2410-spi",
1194 .num_resources
= ARRAY_SIZE(s3c_spi0_resource
),
1195 .resource
= s3c_spi0_resource
,
1197 .dma_mask
= &samsung_device_dma_mask
,
1198 .coherent_dma_mask
= DMA_BIT_MASK(32),
1202 static struct resource s3c_spi1_resource
[] = {
1203 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1
, SZ_32
),
1204 [1] = DEFINE_RES_IRQ(IRQ_SPI1
),
1207 struct platform_device s3c_device_spi1
= {
1208 .name
= "s3c2410-spi",
1210 .num_resources
= ARRAY_SIZE(s3c_spi1_resource
),
1211 .resource
= s3c_spi1_resource
,
1213 .dma_mask
= &samsung_device_dma_mask
,
1214 .coherent_dma_mask
= DMA_BIT_MASK(32),
1217 #endif /* CONFIG_PLAT_S3C24XX */
1221 #ifdef CONFIG_PLAT_S3C24XX
1222 static struct resource s3c_ts_resource
[] = {
1223 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
1224 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1227 struct platform_device s3c_device_ts
= {
1228 .name
= "s3c2410-ts",
1230 .dev
.parent
= &s3c_device_adc
.dev
,
1231 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1232 .resource
= s3c_ts_resource
,
1235 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*hard_s3c2410ts_info
)
1237 s3c_set_platdata(hard_s3c2410ts_info
,
1238 sizeof(struct s3c2410_ts_mach_info
), &s3c_device_ts
);
1240 #endif /* CONFIG_PLAT_S3C24XX */
1242 #ifdef CONFIG_SAMSUNG_DEV_TS
1243 static struct resource s3c_ts_resource
[] = {
1244 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
1245 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1248 static struct s3c2410_ts_mach_info default_ts_data __initdata
= {
1251 .oversampling_shift
= 2,
1254 struct platform_device s3c_device_ts
= {
1255 .name
= "s3c64xx-ts",
1257 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1258 .resource
= s3c_ts_resource
,
1261 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*pd
)
1264 pd
= &default_ts_data
;
1266 s3c_set_platdata(pd
, sizeof(struct s3c2410_ts_mach_info
),
1269 #endif /* CONFIG_SAMSUNG_DEV_TS */
1273 #ifdef CONFIG_S5P_DEV_TV
1275 static struct resource s5p_hdmi_resources
[] = {
1276 [0] = DEFINE_RES_MEM(S5P_PA_HDMI
, SZ_1M
),
1277 [1] = DEFINE_RES_IRQ(IRQ_HDMI
),
1280 struct platform_device s5p_device_hdmi
= {
1283 .num_resources
= ARRAY_SIZE(s5p_hdmi_resources
),
1284 .resource
= s5p_hdmi_resources
,
1287 static struct resource s5p_sdo_resources
[] = {
1288 [0] = DEFINE_RES_MEM(S5P_PA_SDO
, SZ_64K
),
1289 [1] = DEFINE_RES_IRQ(IRQ_SDO
),
1292 struct platform_device s5p_device_sdo
= {
1295 .num_resources
= ARRAY_SIZE(s5p_sdo_resources
),
1296 .resource
= s5p_sdo_resources
,
1299 static struct resource s5p_mixer_resources
[] = {
1300 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER
, SZ_64K
, "mxr"),
1301 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP
, SZ_64K
, "vp"),
1302 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER
, "irq"),
1305 struct platform_device s5p_device_mixer
= {
1306 .name
= "s5p-mixer",
1308 .num_resources
= ARRAY_SIZE(s5p_mixer_resources
),
1309 .resource
= s5p_mixer_resources
,
1311 .dma_mask
= &samsung_device_dma_mask
,
1312 .coherent_dma_mask
= DMA_BIT_MASK(32),
1315 #endif /* CONFIG_S5P_DEV_TV */
1319 #ifdef CONFIG_S3C_DEV_USB_HOST
1320 static struct resource s3c_usb_resource
[] = {
1321 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST
, SZ_256
),
1322 [1] = DEFINE_RES_IRQ(IRQ_USBH
),
1325 struct platform_device s3c_device_ohci
= {
1326 .name
= "s3c2410-ohci",
1328 .num_resources
= ARRAY_SIZE(s3c_usb_resource
),
1329 .resource
= s3c_usb_resource
,
1331 .dma_mask
= &samsung_device_dma_mask
,
1332 .coherent_dma_mask
= DMA_BIT_MASK(32),
1337 * s3c_ohci_set_platdata - initialise OHCI device platform data
1338 * @info: The platform data.
1340 * This call copies the @info passed in and sets the device .platform_data
1341 * field to that copy. The @info is copied so that the original can be marked
1345 void __init
s3c_ohci_set_platdata(struct s3c2410_hcd_info
*info
)
1347 s3c_set_platdata(info
, sizeof(struct s3c2410_hcd_info
),
1350 #endif /* CONFIG_S3C_DEV_USB_HOST */
1352 /* USB Device (Gadget) */
1354 #ifdef CONFIG_PLAT_S3C24XX
1355 static struct resource s3c_usbgadget_resource
[] = {
1356 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV
, S3C24XX_SZ_USBDEV
),
1357 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1360 struct platform_device s3c_device_usbgadget
= {
1361 .name
= "s3c2410-usbgadget",
1363 .num_resources
= ARRAY_SIZE(s3c_usbgadget_resource
),
1364 .resource
= s3c_usbgadget_resource
,
1367 void __init
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info
*pd
)
1369 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usbgadget
);
1371 #endif /* CONFIG_PLAT_S3C24XX */
1373 /* USB EHCI Host Controller */
1375 #ifdef CONFIG_S5P_DEV_USB_EHCI
1376 static struct resource s5p_ehci_resource
[] = {
1377 [0] = DEFINE_RES_MEM(S5P_PA_EHCI
, SZ_256
),
1378 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST
),
1381 struct platform_device s5p_device_ehci
= {
1384 .num_resources
= ARRAY_SIZE(s5p_ehci_resource
),
1385 .resource
= s5p_ehci_resource
,
1387 .dma_mask
= &samsung_device_dma_mask
,
1388 .coherent_dma_mask
= DMA_BIT_MASK(32),
1392 void __init
s5p_ehci_set_platdata(struct s5p_ehci_platdata
*pd
)
1394 struct s5p_ehci_platdata
*npd
;
1396 npd
= s3c_set_platdata(pd
, sizeof(struct s5p_ehci_platdata
),
1400 npd
->phy_init
= s5p_usb_phy_init
;
1402 npd
->phy_exit
= s5p_usb_phy_exit
;
1404 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1408 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1409 static struct resource s3c_usb_hsotg_resources
[] = {
1410 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG
, SZ_16K
),
1411 [1] = DEFINE_RES_IRQ(IRQ_OTG
),
1414 struct platform_device s3c_device_usb_hsotg
= {
1415 .name
= "s3c-hsotg",
1417 .num_resources
= ARRAY_SIZE(s3c_usb_hsotg_resources
),
1418 .resource
= s3c_usb_hsotg_resources
,
1420 .dma_mask
= &samsung_device_dma_mask
,
1421 .coherent_dma_mask
= DMA_BIT_MASK(32),
1424 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1426 /* USB High Spped 2.0 Device (Gadget) */
1428 #ifdef CONFIG_PLAT_S3C24XX
1429 static struct resource s3c_hsudc_resource
[] = {
1430 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC
, S3C2416_SZ_HSUDC
),
1431 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1434 struct platform_device s3c_device_usb_hsudc
= {
1435 .name
= "s3c-hsudc",
1437 .num_resources
= ARRAY_SIZE(s3c_hsudc_resource
),
1438 .resource
= s3c_hsudc_resource
,
1440 .dma_mask
= &samsung_device_dma_mask
,
1441 .coherent_dma_mask
= DMA_BIT_MASK(32),
1445 void __init
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata
*pd
)
1447 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usb_hsudc
);
1449 #endif /* CONFIG_PLAT_S3C24XX */
1453 #ifdef CONFIG_S3C_DEV_WDT
1454 static struct resource s3c_wdt_resource
[] = {
1455 [0] = DEFINE_RES_MEM(S3C_PA_WDT
, SZ_1K
),
1456 [1] = DEFINE_RES_IRQ(IRQ_WDT
),
1459 struct platform_device s3c_device_wdt
= {
1460 .name
= "s3c2410-wdt",
1462 .num_resources
= ARRAY_SIZE(s3c_wdt_resource
),
1463 .resource
= s3c_wdt_resource
,
1465 #endif /* CONFIG_S3C_DEV_WDT */
1467 #ifdef CONFIG_S3C64XX_DEV_SPI0
1468 static struct resource s3c64xx_spi0_resource
[] = {
1469 [0] = DEFINE_RES_MEM(S3C_PA_SPI0
, SZ_256
),
1470 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX
),
1471 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX
),
1472 [3] = DEFINE_RES_IRQ(IRQ_SPI0
),
1475 struct platform_device s3c64xx_device_spi0
= {
1476 .name
= "s3c64xx-spi",
1478 .num_resources
= ARRAY_SIZE(s3c64xx_spi0_resource
),
1479 .resource
= s3c64xx_spi0_resource
,
1481 .dma_mask
= &samsung_device_dma_mask
,
1482 .coherent_dma_mask
= DMA_BIT_MASK(32),
1486 void __init
s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info
*pd
,
1487 int src_clk_nr
, int num_cs
)
1490 pr_err("%s:Need to pass platform data\n", __func__
);
1494 /* Reject invalid configuration */
1495 if (!num_cs
|| src_clk_nr
< 0) {
1496 pr_err("%s: Invalid SPI configuration\n", __func__
);
1500 pd
->num_cs
= num_cs
;
1501 pd
->src_clk_nr
= src_clk_nr
;
1503 pd
->cfg_gpio
= s3c64xx_spi0_cfg_gpio
;
1505 s3c_set_platdata(pd
, sizeof(*pd
), &s3c64xx_device_spi0
);
1507 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1509 #ifdef CONFIG_S3C64XX_DEV_SPI1
1510 static struct resource s3c64xx_spi1_resource
[] = {
1511 [0] = DEFINE_RES_MEM(S3C_PA_SPI1
, SZ_256
),
1512 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX
),
1513 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX
),
1514 [3] = DEFINE_RES_IRQ(IRQ_SPI1
),
1517 struct platform_device s3c64xx_device_spi1
= {
1518 .name
= "s3c64xx-spi",
1520 .num_resources
= ARRAY_SIZE(s3c64xx_spi1_resource
),
1521 .resource
= s3c64xx_spi1_resource
,
1523 .dma_mask
= &samsung_device_dma_mask
,
1524 .coherent_dma_mask
= DMA_BIT_MASK(32),
1528 void __init
s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info
*pd
,
1529 int src_clk_nr
, int num_cs
)
1532 pr_err("%s:Need to pass platform data\n", __func__
);
1536 /* Reject invalid configuration */
1537 if (!num_cs
|| src_clk_nr
< 0) {
1538 pr_err("%s: Invalid SPI configuration\n", __func__
);
1542 pd
->num_cs
= num_cs
;
1543 pd
->src_clk_nr
= src_clk_nr
;
1545 pd
->cfg_gpio
= s3c64xx_spi1_cfg_gpio
;
1547 s3c_set_platdata(pd
, sizeof(*pd
), &s3c64xx_device_spi1
);
1549 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1551 #ifdef CONFIG_S3C64XX_DEV_SPI2
1552 static struct resource s3c64xx_spi2_resource
[] = {
1553 [0] = DEFINE_RES_MEM(S3C_PA_SPI2
, SZ_256
),
1554 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX
),
1555 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX
),
1556 [3] = DEFINE_RES_IRQ(IRQ_SPI2
),
1559 struct platform_device s3c64xx_device_spi2
= {
1560 .name
= "s3c64xx-spi",
1562 .num_resources
= ARRAY_SIZE(s3c64xx_spi2_resource
),
1563 .resource
= s3c64xx_spi2_resource
,
1565 .dma_mask
= &samsung_device_dma_mask
,
1566 .coherent_dma_mask
= DMA_BIT_MASK(32),
1570 void __init
s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info
*pd
,
1571 int src_clk_nr
, int num_cs
)
1574 pr_err("%s:Need to pass platform data\n", __func__
);
1578 /* Reject invalid configuration */
1579 if (!num_cs
|| src_clk_nr
< 0) {
1580 pr_err("%s: Invalid SPI configuration\n", __func__
);
1584 pd
->num_cs
= num_cs
;
1585 pd
->src_clk_nr
= src_clk_nr
;
1587 pd
->cfg_gpio
= s3c64xx_spi2_cfg_gpio
;
1589 s3c_set_platdata(pd
, sizeof(*pd
), &s3c64xx_device_spi2
);
1591 #endif /* CONFIG_S3C64XX_DEV_SPI2 */