1 /* arch/arm/plat-samsung/include/plat/cpu-freq-core.h
3 * Copyright (c) 2006-2009 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C CPU frequency scaling support - core support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <plat/cpu-freq.h>
19 #define S3C2412_MAX_IO (8)
22 * struct s3c2410_iobank_timing - IO bank timings for S3C2410 style timings
23 * @bankcon: The cached version of settings in this structure.
25 * @tacs: Time from address valid to nCS asserted.
26 * @tcos: Time from nCS asserted to nOE or nWE asserted.
27 * @tacc: Time that nOE or nWE is asserted.
28 * @tcoh: Time nCS is held after nOE or nWE are released.
29 * @tcah: Time address is held for after
30 * @nwait_en: Whether nWAIT is enabled for this bank.
32 * This structure represents the IO timings for a S3C2410 style IO bank
33 * used by the CPU frequency support if it needs to change the settings
36 struct s3c2410_iobank_timing
{
37 unsigned long bankcon
;
42 unsigned int tcoh
; /* nCS hold afrer nOE/nWE */
43 unsigned int tcah
; /* Address hold after nCS */
44 unsigned char nwait_en
; /* nWait enabled for bank. */
48 * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO
49 * @idcy: The idle cycle time between transactions.
50 * @wstrd: nCS release to end of read cycle.
51 * @wstwr: nCS release to end of write cycle.
52 * @wstoen: nCS assertion to nOE assertion time.
53 * @wstwen: nCS assertion to nWE assertion time.
54 * @wstbrd: Burst ready delay.
55 * @smbidcyr: Register cache for smbidcyr value.
56 * @smbwstrd: Register cache for smbwstrd value.
57 * @smbwstwr: Register cache for smbwstwr value.
58 * @smbwstoen: Register cache for smbwstoen value.
59 * @smbwstwen: Register cache for smbwstwen value.
60 * @smbwstbrd: Register cache for smbwstbrd value.
62 * Timing information for a IO bank on an S3C2412 or similar system which
65 struct s3c2412_iobank_timing
{
74 unsigned char smbidcyr
;
75 unsigned char smbwstrd
;
76 unsigned char smbwstwr
;
77 unsigned char smbwstoen
;
78 unsigned char smbwstwen
;
79 unsigned char smbwstbrd
;
83 struct s3c2410_iobank_timing
*io_2410
;
84 struct s3c2412_iobank_timing
*io_2412
;
88 * struct s3c_iotimings - Chip IO timings holder
89 * @bank: The timings for each IO bank.
91 struct s3c_iotimings
{
92 union s3c_iobank bank
[MAX_BANKS
];
96 * struct s3c_plltab - PLL table information.
97 * @vals: List of PLL values.
98 * @size: Size of the PLL table @vals.
101 struct s3c_pllval
*vals
;
106 * struct s3c_cpufreq_config - current cpu frequency configuration
107 * @freq: The current settings for the core clocks.
108 * @max: Maxium settings, derived from core, board and user settings.
109 * @pll: The PLL table entry for the current PLL settings.
110 * @divs: The divisor settings for the core clocks.
111 * @info: The current core driver information.
112 * @board: The information for the board we are running on.
113 * @lock_pll: Set if the PLL settings cannot be changed.
115 * This is for the core drivers that need to know information about
116 * the current settings and values. It should not be needed by any
119 struct s3c_cpufreq_config
{
120 struct s3c_freq freq
;
123 struct cpufreq_frequency_table pll
;
124 struct s3c_clkdivs divs
;
125 struct s3c_cpufreq_info
*info
; /* for core, not drivers */
126 struct s3c_cpufreq_board
*board
;
128 unsigned int lock_pll
:1;
132 * struct s3c_cpufreq_info - Information for the CPU frequency driver.
133 * @name: The name of this implementation.
134 * @max: The maximum frequencies for the system.
135 * @latency: Transition latency to give to cpufreq.
136 * @locktime_m: The lock-time in uS for the MPLL.
137 * @locktime_u: The lock-time in uS for the UPLL.
138 * @locttime_bits: The number of bits each LOCKTIME field.
139 * @need_pll: Set if this driver needs to change the PLL values to achieve
140 * any frequency changes. This is really only need by devices like the
141 * S3C2410 where there is no or limited divider between the PLL and the
143 * @resume_clocks: Update the clocks on resume.
144 * @get_iotiming: Get the current IO timing data, mainly for use at start.
145 * @set_iotiming: Update the IO timings from the cached copies calculated
146 * from the @calc_iotiming entry when changing the frequency.
147 * @calc_iotiming: Calculate and update the cached copies of the IO timings
148 * from the newly calculated frequencies.
149 * @calc_freqtable: Calculate (fill in) the given frequency table from the
150 * current frequency configuration. If the table passed in is NULL,
151 * then the return is the number of elements to be filled for allocation
153 * @set_refresh: Set the memory refresh configuration.
154 * @set_fvco: Set the PLL frequencies.
155 * @set_divs: Update the clock divisors.
156 * @calc_divs: Calculate the clock divisors.
158 struct s3c_cpufreq_info
{
162 unsigned int latency
;
164 unsigned int locktime_m
;
165 unsigned int locktime_u
;
166 unsigned char locktime_bits
;
168 unsigned int need_pll
:1;
170 /* driver routines */
172 void (*resume_clocks
)(void);
174 int (*get_iotiming
)(struct s3c_cpufreq_config
*cfg
,
175 struct s3c_iotimings
*timings
);
177 void (*set_iotiming
)(struct s3c_cpufreq_config
*cfg
,
178 struct s3c_iotimings
*timings
);
180 int (*calc_iotiming
)(struct s3c_cpufreq_config
*cfg
,
181 struct s3c_iotimings
*timings
);
183 int (*calc_freqtable
)(struct s3c_cpufreq_config
*cfg
,
184 struct cpufreq_frequency_table
*t
,
187 void (*debug_io_show
)(struct seq_file
*seq
,
188 struct s3c_cpufreq_config
*cfg
,
189 union s3c_iobank
*iob
);
191 void (*set_refresh
)(struct s3c_cpufreq_config
*cfg
);
192 void (*set_fvco
)(struct s3c_cpufreq_config
*cfg
);
193 void (*set_divs
)(struct s3c_cpufreq_config
*cfg
);
194 int (*calc_divs
)(struct s3c_cpufreq_config
*cfg
);
197 extern int s3c_cpufreq_register(struct s3c_cpufreq_info
*info
);
199 extern int s3c_plltab_register(struct cpufreq_frequency_table
*plls
,
200 unsigned int plls_no
);
202 /* exports and utilities for debugfs */
203 extern struct s3c_cpufreq_config
*s3c_cpufreq_getconfig(void);
204 extern struct s3c_iotimings
*s3c_cpufreq_getiotimings(void);
206 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS
207 #define s3c_cpufreq_debugfs_call(x) x
209 #define s3c_cpufreq_debugfs_call(x) NULL
212 /* Useful utility functions. */
214 extern struct clk
*s3c_cpufreq_clk_get(struct device
*, const char *);
216 /* S3C2410 and compatible exported functions */
218 extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config
*cfg
);
219 extern void s3c2410_set_fvco(struct s3c_cpufreq_config
*cfg
);
221 #ifdef CONFIG_S3C2410_IOTIMING
222 extern void s3c2410_iotiming_debugfs(struct seq_file
*seq
,
223 struct s3c_cpufreq_config
*cfg
,
224 union s3c_iobank
*iob
);
226 extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config
*cfg
,
227 struct s3c_iotimings
*iot
);
229 extern int s3c2410_iotiming_get(struct s3c_cpufreq_config
*cfg
,
230 struct s3c_iotimings
*timings
);
232 extern void s3c2410_iotiming_set(struct s3c_cpufreq_config
*cfg
,
233 struct s3c_iotimings
*iot
);
235 #define s3c2410_iotiming_debugfs NULL
236 #define s3c2410_iotiming_calc NULL
237 #define s3c2410_iotiming_get NULL
238 #define s3c2410_iotiming_set NULL
239 #endif /* CONFIG_S3C2410_IOTIMING */
241 /* S3C2412 compatible routines */
243 #ifdef CONFIG_S3C2412_IOTIMING
244 extern void s3c2412_iotiming_debugfs(struct seq_file
*seq
,
245 struct s3c_cpufreq_config
*cfg
,
246 union s3c_iobank
*iob
);
248 extern int s3c2412_iotiming_get(struct s3c_cpufreq_config
*cfg
,
249 struct s3c_iotimings
*timings
);
251 extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config
*cfg
,
252 struct s3c_iotimings
*iot
);
254 extern void s3c2412_iotiming_set(struct s3c_cpufreq_config
*cfg
,
255 struct s3c_iotimings
*iot
);
257 #define s3c2412_iotiming_debugfs NULL
258 #define s3c2412_iotiming_calc NULL
259 #define s3c2412_iotiming_get NULL
260 #define s3c2412_iotiming_set NULL
261 #endif /* CONFIG_S3C2412_IOTIMING */
263 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG
264 #define s3c_freq_dbg(x...) printk(KERN_INFO x)
266 #define s3c_freq_dbg(x...) do { if (0) printk(x); } while (0)
267 #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG */
269 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG
270 #define s3c_freq_iodbg(x...) printk(KERN_INFO x)
272 #define s3c_freq_iodbg(x...) do { if (0) printk(x); } while (0)
273 #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG */
275 static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table
*table
,
276 int index
, size_t table_size
,
283 if (index
>= table_size
)
286 s3c_freq_dbg("%s: { %d = %u kHz }\n",
287 __func__
, index
, freq
);
289 table
[index
].driver_data
= index
;
290 table
[index
].frequency
= freq
;