arch/arm/plat-samsung/include/plat/gpio-core.h

   1 /* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
   2  *
   3  * Copyright 2008 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * S3C Platform - GPIO core
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12 */
  13
  14 #define GPIOCON_OFF     (0x00)
  15 #define GPIODAT_OFF     (0x04)
  16
  17 #define con_4bit_shift(__off) ((__off) * 4)
  18
  19 /* Define the core gpiolib support functions that the s3c platforms may
  20  * need to extend or change depending on the hardware and the s3c chip
  21  * selected at build or found at run time.
  22  *
  23  * These definitions are not intended for driver inclusion, there is
  24  * nothing here that should not live outside the platform and core
  25  * specific code.
  26 */
  27
  28 struct s3c_gpio_chip;
  29
  30 /**
  31  * struct s3c_gpio_pm - power management (suspend/resume) information
  32  * @save: Routine to save the state of the GPIO block
  33  * @resume: Routine to resume the GPIO block.
  34  */
  35 struct s3c_gpio_pm {
  36         void (*save)(struct s3c_gpio_chip *chip);
  37         void (*resume)(struct s3c_gpio_chip *chip);
  38 };
  39
  40 struct s3c_gpio_cfg;
  41
  42 /**
  43  * struct s3c_gpio_chip - wrapper for specific implementation of gpio
  44  * @chip: The chip structure to be exported via gpiolib.
  45  * @base: The base pointer to the gpio configuration registers.
  46  * @config: special function and pull-resistor control information.
  47  * @pm_save: Save information for suspend/resume support.
  48  *
  49  * This wrapper provides the necessary information for the Samsung
  50  * specific gpios being registered with gpiolib.
  51  */
  52 struct s3c_gpio_chip {
  53         struct gpio_chip        chip;
  54         struct s3c_gpio_cfg     *config;
  55         struct s3c_gpio_pm      *pm;
  56         void __iomem            *base;
  57 #ifdef CONFIG_PM
  58         u32                     pm_save[4];
  59 #endif
  60 };
  61
  62 static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
  63 {
  64         return container_of(gpc, struct s3c_gpio_chip, chip);
  65 }
  66
  67 /** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
  68  * @chip: The chip to register
  69  *
  70  * This is a wrapper to gpiochip_add() that takes our specific gpio chip
  71  * information and makes the necessary alterations for the platform and
  72  * notes the information for use with the configuration systems and any
  73  * other parts of the system.
  74  */
  75 extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
  76
  77 /* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios
  78  * for use with the configuration calls, and other parts of the s3c gpiolib
  79  * support code.
  80  *
  81  * Not all s3c support code will need this, as some configurations of cpu
  82  * may only support one or two different configuration options and have an
  83  * easy gpio to s3c_gpio_chip mapping function. If this is the case, then
  84  * the machine support file should provide its own s3c_gpiolib_getchip()
  85  * and any other necessary functions.
  86  */
  87
  88 /**
  89  * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
  90  * @chip: The gpio chip that is being configured.
  91  * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
  92  *
  93  * This helper deal with the GPIO cases where the control register has 4 bits
  94  * of control per GPIO, generally in the form of:
  95  * 0000 = Input
  96  * 0001 = Output
  97  * others = Special functions (dependant on bank)
  98  *
  99  * Note, since the code to deal with the case where there are two control
 100  * registers instead of one, we do not have a seperate set of function
 101  * (samsung_gpiolib_add_4bit2_chips)for each case.
 102  */
 103 extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
 104                                            int nr_chips);
 105 extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
 106                                             int nr_chips);
 107
 108 extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
 109 extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
 110
 111 #ifdef CONFIG_S3C_GPIO_TRACK
 112 extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
 113
 114 static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
 115 {
 116         return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
 117 }
 118 #else
 119 /* machine specific code should provide s3c_gpiolib_getchip */
 120
 121 #include <mach/gpio-track.h>
 122
 123 static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
 124 #endif
 125
 126 #ifdef CONFIG_PM
 127 extern struct s3c_gpio_pm s3c_gpio_pm_1bit;
 128 extern struct s3c_gpio_pm s3c_gpio_pm_2bit;
 129 extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
 130 #define __gpio_pm(x) x
 131 #else
 132 #define s3c_gpio_pm_1bit NULL
 133 #define s3c_gpio_pm_2bit NULL
 134 #define s3c_gpio_pm_4bit NULL
 135 #define __gpio_pm(x) NULL
 136
 137 #endif /* CONFIG_PM */