arch/arm/plat-samsung/pm-debug.c

   1 /*
   2  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   3  *      Tomasz Figa <t.figa@samsung.com>
   4  * Copyright (C) 2008 Openmoko, Inc.
   5  * Copyright (C) 2004-2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * Samsung common power management (suspend to RAM) debug support
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_s3c.h>
  18 #include <linux/io.h>
  19
  20 #include <asm/mach/map.h>
  21
  22 #include <plat/cpu.h>
  23 #include <plat/pm-common.h>
  24
  25 #ifdef CONFIG_SAMSUNG_ATAGS
  26 #include <plat/pm.h>
  27 #include <mach/pm-core.h>
  28 #else
  29 static inline void s3c_pm_debug_init_uart(void) {}
  30 static inline void s3c_pm_arch_update_uart(void __iomem *regs,
  31                                            struct pm_uart_save *save) {}
  32 #endif
  33
  34 static struct pm_uart_save uart_save;
  35
  36 extern void printascii(const char *);
  37
  38 void s3c_pm_dbg(const char *fmt, ...)
  39 {
  40         va_list va;
  41         char buff[256];
  42
  43         va_start(va, fmt);
  44         vsnprintf(buff, sizeof(buff), fmt, va);
  45         va_end(va);
  46
  47         printascii(buff);
  48 }
  49
  50 void s3c_pm_debug_init(void)
  51 {
  52         /* restart uart clocks so we can use them to output */
  53         s3c_pm_debug_init_uart();
  54 }
  55
  56 static inline void __iomem *s3c_pm_uart_base(void)
  57 {
  58         unsigned long paddr;
  59         unsigned long vaddr;
  60
  61         debug_ll_addr(&paddr, &vaddr);
  62
  63         return (void __iomem *)vaddr;
  64 }
  65
  66 void s3c_pm_save_uarts(void)
  67 {
  68         void __iomem *regs = s3c_pm_uart_base();
  69         struct pm_uart_save *save = &uart_save;
  70
  71         save->ulcon = __raw_readl(regs + S3C2410_ULCON);
  72         save->ucon = __raw_readl(regs + S3C2410_UCON);
  73         save->ufcon = __raw_readl(regs + S3C2410_UFCON);
  74         save->umcon = __raw_readl(regs + S3C2410_UMCON);
  75         save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
  76
  77         if (!soc_is_s3c2410())
  78                 save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
  79
  80         S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
  81                   regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
  82 }
  83
  84 void s3c_pm_restore_uarts(void)
  85 {
  86         void __iomem *regs = s3c_pm_uart_base();
  87         struct pm_uart_save *save = &uart_save;
  88
  89         s3c_pm_arch_update_uart(regs, save);
  90
  91         __raw_writel(save->ulcon, regs + S3C2410_ULCON);
  92         __raw_writel(save->ucon,  regs + S3C2410_UCON);
  93         __raw_writel(save->ufcon, regs + S3C2410_UFCON);
  94         __raw_writel(save->umcon, regs + S3C2410_UMCON);
  95         __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
  96
  97         if (!soc_is_s3c2410())
  98                 __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
  99 }