arch/arm64/Kconfig

   1 config ARM64
   2         def_bool y
   3         select ACPI_CCA_REQUIRED if ACPI
   4         select ACPI_GENERIC_GSI if ACPI
   5         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
   6         select ACPI_MCFG if ACPI
   7         select ARCH_HAS_DEVMEM_IS_ALLOWED
   8         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   9         select ARCH_HAS_ELF_RANDOMIZE
  10         select ARCH_HAS_GCOV_PROFILE_ALL
  11         select ARCH_HAS_SG_CHAIN
  12         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  13         select ARCH_USE_CMPXCHG_LOCKREF
  14         select ARCH_SUPPORTS_ATOMIC_RMW
  15         select ARCH_SUPPORTS_NUMA_BALANCING
  16         select ARCH_WANT_OPTIONAL_GPIOLIB
  17         select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  18         select ARCH_WANT_FRAME_POINTERS
  19         select ARCH_HAS_UBSAN_SANITIZE_ALL
  20         select ARM_AMBA
  21         select ARM_ARCH_TIMER
  22         select ARM_GIC
  23         select AUDIT_ARCH_COMPAT_GENERIC
  24         select ARM_GIC_V2M if PCI
  25         select ARM_GIC_V3
  26         select ARM_GIC_V3_ITS if PCI
  27         select ARM_PSCI_FW
  28         select BUILDTIME_EXTABLE_SORT
  29         select CLONE_BACKWARDS
  30         select COMMON_CLK
  31         select CPU_PM if (SUSPEND || CPU_IDLE)
  32         select DCACHE_WORD_ACCESS
  33         select EDAC_SUPPORT
  34         select FRAME_POINTER
  35         select GENERIC_ALLOCATOR
  36         select GENERIC_CLOCKEVENTS
  37         select GENERIC_CLOCKEVENTS_BROADCAST
  38         select GENERIC_CPU_AUTOPROBE
  39         select GENERIC_EARLY_IOREMAP
  40         select GENERIC_IDLE_POLL_SETUP
  41         select GENERIC_IRQ_PROBE
  42         select GENERIC_IRQ_SHOW
  43         select GENERIC_IRQ_SHOW_LEVEL
  44         select GENERIC_PCI_IOMAP
  45         select GENERIC_SCHED_CLOCK
  46         select GENERIC_SMP_IDLE_THREAD
  47         select GENERIC_STRNCPY_FROM_USER
  48         select GENERIC_STRNLEN_USER
  49         select GENERIC_TIME_VSYSCALL
  50         select HANDLE_DOMAIN_IRQ
  51         select HARDIRQS_SW_RESEND
  52         select HAVE_ALIGNED_STRUCT_PAGE if SLUB
  53         select HAVE_ARCH_AUDITSYSCALL
  54         select HAVE_ARCH_BITREVERSE
  55         select HAVE_ARCH_HUGE_VMAP
  56         select HAVE_ARCH_JUMP_LABEL
  57         select HAVE_ARCH_KASAN if SPARSEMEM_VMEMMAP && !(ARM64_16K_PAGES && ARM64_VA_BITS_48)
  58         select HAVE_ARCH_KGDB
  59         select HAVE_ARCH_MMAP_RND_BITS
  60         select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
  61         select HAVE_ARCH_SECCOMP_FILTER
  62         select HAVE_ARCH_TRACEHOOK
  63         select HAVE_ARCH_TRANSPARENT_HUGEPAGE
  64         select HAVE_ARM_SMCCC
  65         select HAVE_EBPF_JIT
  66         select HAVE_C_RECORDMCOUNT
  67         select HAVE_CC_STACKPROTECTOR
  68         select HAVE_CMPXCHG_DOUBLE
  69         select HAVE_CMPXCHG_LOCAL
  70         select HAVE_CONTEXT_TRACKING
  71         select HAVE_DEBUG_BUGVERBOSE
  72         select HAVE_DEBUG_KMEMLEAK
  73         select HAVE_DMA_API_DEBUG
  74         select HAVE_DMA_CONTIGUOUS
  75         select HAVE_DYNAMIC_FTRACE
  76         select HAVE_EFFICIENT_UNALIGNED_ACCESS
  77         select HAVE_FTRACE_MCOUNT_RECORD
  78         select HAVE_FUNCTION_TRACER
  79         select HAVE_FUNCTION_GRAPH_TRACER
  80         select HAVE_GENERIC_DMA_COHERENT
  81         select HAVE_HW_BREAKPOINT if PERF_EVENTS
  82         select HAVE_IRQ_TIME_ACCOUNTING
  83         select HAVE_MEMBLOCK
  84         select HAVE_MEMBLOCK_NODE_MAP if NUMA
  85         select HAVE_PATA_PLATFORM
  86         select HAVE_PERF_EVENTS
  87         select HAVE_PERF_REGS
  88         select HAVE_PERF_USER_STACK_DUMP
  89         select HAVE_RCU_TABLE_FREE
  90         select HAVE_SYSCALL_TRACEPOINTS
  91         select IOMMU_DMA if IOMMU_SUPPORT
  92         select IRQ_DOMAIN
  93         select IRQ_FORCED_THREADING
  94         select MODULES_USE_ELF_RELA
  95         select NO_BOOTMEM
  96         select OF
  97         select OF_EARLY_FLATTREE
  98         select OF_NUMA if NUMA && OF
  99         select OF_RESERVED_MEM
 100         select PCI_ECAM if ACPI
 101         select PERF_USE_VMALLOC
 102         select POWER_RESET
 103         select POWER_SUPPLY
 104         select SPARSE_IRQ
 105         select SYSCTL_EXCEPTION_TRACE
 106         help
 107           ARM 64-bit (AArch64) Linux support.
 108
 109 config 64BIT
 110         def_bool y
 111
 112 config ARCH_PHYS_ADDR_T_64BIT
 113         def_bool y
 114
 115 config MMU
 116         def_bool y
 117
 118 config ARM64_PAGE_SHIFT
 119         int
 120         default 16 if ARM64_64K_PAGES
 121         default 14 if ARM64_16K_PAGES
 122         default 12
 123
 124 config ARM64_CONT_SHIFT
 125         int
 126         default 5 if ARM64_64K_PAGES
 127         default 7 if ARM64_16K_PAGES
 128         default 4
 129
 130 config ARCH_MMAP_RND_BITS_MIN
 131        default 14 if ARM64_64K_PAGES
 132        default 16 if ARM64_16K_PAGES
 133        default 18
 134
 135 # max bits determined by the following formula:
 136 #  VA_BITS - PAGE_SHIFT - 3
 137 config ARCH_MMAP_RND_BITS_MAX
 138        default 19 if ARM64_VA_BITS=36
 139        default 24 if ARM64_VA_BITS=39
 140        default 27 if ARM64_VA_BITS=42
 141        default 30 if ARM64_VA_BITS=47
 142        default 29 if ARM64_VA_BITS=48 && ARM64_64K_PAGES
 143        default 31 if ARM64_VA_BITS=48 && ARM64_16K_PAGES
 144        default 33 if ARM64_VA_BITS=48
 145        default 14 if ARM64_64K_PAGES
 146        default 16 if ARM64_16K_PAGES
 147        default 18
 148
 149 config ARCH_MMAP_RND_COMPAT_BITS_MIN
 150        default 7 if ARM64_64K_PAGES
 151        default 9 if ARM64_16K_PAGES
 152        default 11
 153
 154 config ARCH_MMAP_RND_COMPAT_BITS_MAX
 155        default 16
 156
 157 config NO_IOPORT_MAP
 158         def_bool y if !PCI
 159
 160 config STACKTRACE_SUPPORT
 161         def_bool y
 162
 163 config ILLEGAL_POINTER_VALUE
 164         hex
 165         default 0xdead000000000000
 166
 167 config LOCKDEP_SUPPORT
 168         def_bool y
 169
 170 config TRACE_IRQFLAGS_SUPPORT
 171         def_bool y
 172
 173 config RWSEM_XCHGADD_ALGORITHM
 174         def_bool y
 175
 176 config GENERIC_BUG
 177         def_bool y
 178         depends on BUG
 179
 180 config GENERIC_BUG_RELATIVE_POINTERS
 181         def_bool y
 182         depends on GENERIC_BUG
 183
 184 config GENERIC_HWEIGHT
 185         def_bool y
 186
 187 config GENERIC_CSUM
 188         def_bool y
 189
 190 config GENERIC_CALIBRATE_DELAY
 191         def_bool y
 192
 193 config ZONE_DMA
 194         def_bool y
 195
 196 config HAVE_GENERIC_RCU_GUP
 197         def_bool y
 198
 199 config ARCH_DMA_ADDR_T_64BIT
 200         def_bool y
 201
 202 config NEED_DMA_MAP_STATE
 203         def_bool y
 204
 205 config NEED_SG_DMA_LENGTH
 206         def_bool y
 207
 208 config SMP
 209         def_bool y
 210
 211 config SWIOTLB
 212         def_bool y
 213
 214 config IOMMU_HELPER
 215         def_bool SWIOTLB
 216
 217 config KERNEL_MODE_NEON
 218         def_bool y
 219
 220 config FIX_EARLYCON_MEM
 221         def_bool y
 222
 223 config PGTABLE_LEVELS
 224         int
 225         default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36
 226         default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 227         default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
 228         default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
 229         default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
 230         default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
 231
 232 source "init/Kconfig"
 233
 234 source "kernel/Kconfig.freezer"
 235
 236 source "arch/arm64/Kconfig.platforms"
 237
 238 menu "Bus support"
 239
 240 config PCI
 241         bool "PCI support"
 242         help
 243           This feature enables support for PCI bus system. If you say Y
 244           here, the kernel will include drivers and infrastructure code
 245           to support PCI bus devices.
 246
 247 config PCI_DOMAINS
 248         def_bool PCI
 249
 250 config PCI_DOMAINS_GENERIC
 251         def_bool PCI
 252
 253 config PCI_SYSCALL
 254         def_bool PCI
 255
 256 source "drivers/pci/Kconfig"
 257
 258 endmenu
 259
 260 menu "Kernel Features"
 261
 262 menu "ARM errata workarounds via the alternatives framework"
 263
 264 config ARM64_ERRATUM_826319
 265         bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
 266         default y
 267         help
 268           This option adds an alternative code sequence to work around ARM
 269           erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
 270           AXI master interface and an L2 cache.
 271
 272           If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
 273           and is unable to accept a certain write via this interface, it will
 274           not progress on read data presented on the read data channel and the
 275           system can deadlock.
 276
 277           The workaround promotes data cache clean instructions to
 278           data cache clean-and-invalidate.
 279           Please note that this does not necessarily enable the workaround,
 280           as it depends on the alternative framework, which will only patch
 281           the kernel if an affected CPU is detected.
 282
 283           If unsure, say Y.
 284
 285 config ARM64_ERRATUM_827319
 286         bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
 287         default y
 288         help
 289           This option adds an alternative code sequence to work around ARM
 290           erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
 291           master interface and an L2 cache.
 292
 293           Under certain conditions this erratum can cause a clean line eviction
 294           to occur at the same time as another transaction to the same address
 295           on the AMBA 5 CHI interface, which can cause data corruption if the
 296           interconnect reorders the two transactions.
 297
 298           The workaround promotes data cache clean instructions to
 299           data cache clean-and-invalidate.
 300           Please note that this does not necessarily enable the workaround,
 301           as it depends on the alternative framework, which will only patch
 302           the kernel if an affected CPU is detected.
 303
 304           If unsure, say Y.
 305
 306 config ARM64_ERRATUM_824069
 307         bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
 308         default y
 309         help
 310           This option adds an alternative code sequence to work around ARM
 311           erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
 312           to a coherent interconnect.
 313
 314           If a Cortex-A53 processor is executing a store or prefetch for
 315           write instruction at the same time as a processor in another
 316           cluster is executing a cache maintenance operation to the same
 317           address, then this erratum might cause a clean cache line to be
 318           incorrectly marked as dirty.
 319
 320           The workaround promotes data cache clean instructions to
 321           data cache clean-and-invalidate.
 322           Please note that this option does not necessarily enable the
 323           workaround, as it depends on the alternative framework, which will
 324           only patch the kernel if an affected CPU is detected.
 325
 326           If unsure, say Y.
 327
 328 config ARM64_ERRATUM_819472
 329         bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
 330         default y
 331         help
 332           This option adds an alternative code sequence to work around ARM
 333           erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
 334           present when it is connected to a coherent interconnect.
 335
 336           If the processor is executing a load and store exclusive sequence at
 337           the same time as a processor in another cluster is executing a cache
 338           maintenance operation to the same address, then this erratum might
 339           cause data corruption.
 340
 341           The workaround promotes data cache clean instructions to
 342           data cache clean-and-invalidate.
 343           Please note that this does not necessarily enable the workaround,
 344           as it depends on the alternative framework, which will only patch
 345           the kernel if an affected CPU is detected.
 346
 347           If unsure, say Y.
 348
 349 config ARM64_ERRATUM_832075
 350         bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
 351         default y
 352         help
 353           This option adds an alternative code sequence to work around ARM
 354           erratum 832075 on Cortex-A57 parts up to r1p2.
 355
 356           Affected Cortex-A57 parts might deadlock when exclusive load/store
 357           instructions to Write-Back memory are mixed with Device loads.
 358
 359           The workaround is to promote device loads to use Load-Acquire
 360           semantics.
 361           Please note that this does not necessarily enable the workaround,
 362           as it depends on the alternative framework, which will only patch
 363           the kernel if an affected CPU is detected.
 364
 365           If unsure, say Y.
 366
 367 config ARM64_ERRATUM_834220
 368         bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a Stage 1 fault"
 369         depends on KVM
 370         default y
 371         help
 372           This option adds an alternative code sequence to work around ARM
 373           erratum 834220 on Cortex-A57 parts up to r1p2.
 374
 375           Affected Cortex-A57 parts might report a Stage 2 translation
 376           fault as the result of a Stage 1 fault for load crossing a
 377           page boundary when there is a permission or device memory
 378           alignment fault at Stage 1 and a translation fault at Stage 2.
 379
 380           The workaround is to verify that the Stage 1 translation
 381           doesn't generate a fault before handling the Stage 2 fault.
 382           Please note that this does not necessarily enable the workaround,
 383           as it depends on the alternative framework, which will only patch
 384           the kernel if an affected CPU is detected.
 385
 386           If unsure, say Y.
 387
 388 config ARM64_ERRATUM_845719
 389         bool "Cortex-A53: 845719: a load might read incorrect data"
 390         depends on COMPAT
 391         default y
 392         help
 393           This option adds an alternative code sequence to work around ARM
 394           erratum 845719 on Cortex-A53 parts up to r0p4.
 395
 396           When running a compat (AArch32) userspace on an affected Cortex-A53
 397           part, a load at EL0 from a virtual address that matches the bottom 32
 398           bits of the virtual address used by a recent load at (AArch64) EL1
 399           might return incorrect data.
 400
 401           The workaround is to write the contextidr_el1 register on exception
 402           return to a 32-bit task.
 403           Please note that this does not necessarily enable the workaround,
 404           as it depends on the alternative framework, which will only patch
 405           the kernel if an affected CPU is detected.
 406
 407           If unsure, say Y.
 408
 409 config ARM64_ERRATUM_843419
 410         bool "Cortex-A53: 843419: A load or store might access an incorrect address"
 411         depends on MODULES
 412         default y
 413         select ARM64_MODULE_CMODEL_LARGE
 414         help
 415           This option builds kernel modules using the large memory model in
 416           order to avoid the use of the ADRP instruction, which can cause
 417           a subsequent memory access to use an incorrect address on Cortex-A53
 418           parts up to r0p4.
 419
 420           Note that the kernel itself must be linked with a version of ld
 421           which fixes potentially affected ADRP instructions through the
 422           use of veneers.
 423
 424           If unsure, say Y.
 425
 426 config CAVIUM_ERRATUM_22375
 427         bool "Cavium erratum 22375, 24313"
 428         default y
 429         help
 430           Enable workaround for erratum 22375, 24313.
 431
 432           This implements two gicv3-its errata workarounds for ThunderX. Both
 433           with small impact affecting only ITS table allocation.
 434
 435             erratum 22375: only alloc 8MB table size
 436             erratum 24313: ignore memory access type
 437
 438           The fixes are in ITS initialization and basically ignore memory access
 439           type and table size provided by the TYPER and BASER registers.
 440
 441           If unsure, say Y.
 442
 443 config CAVIUM_ERRATUM_23144
 444         bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
 445         depends on NUMA
 446         default y
 447         help
 448           ITS SYNC command hang for cross node io and collections/cpu mapping.
 449
 450           If unsure, say Y.
 451
 452 config CAVIUM_ERRATUM_23154
 453         bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
 454         default y
 455         help
 456           The gicv3 of ThunderX requires a modified version for
 457           reading the IAR status to ensure data synchronization
 458           (access to icc_iar1_el1 is not sync'ed before and after).
 459
 460           If unsure, say Y.
 461
 462 config CAVIUM_ERRATUM_27456
 463         bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption"
 464         default y
 465         help
 466           On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
 467           instructions may cause the icache to become corrupted if it
 468           contains data for a non-current ASID.  The fix is to
 469           invalidate the icache when changing the mm context.
 470
 471           If unsure, say Y.
 472
 473 endmenu
 474
 475
 476 choice
 477         prompt "Page size"
 478         default ARM64_4K_PAGES
 479         help
 480           Page size (translation granule) configuration.
 481
 482 config ARM64_4K_PAGES
 483         bool "4KB"
 484         help
 485           This feature enables 4KB pages support.
 486
 487 config ARM64_16K_PAGES
 488         bool "16KB"
 489         help
 490           The system will use 16KB pages support. AArch32 emulation
 491           requires applications compiled with 16K (or a multiple of 16K)
 492           aligned segments.
 493
 494 config ARM64_64K_PAGES
 495         bool "64KB"
 496         help
 497           This feature enables 64KB pages support (4KB by default)
 498           allowing only two levels of page tables and faster TLB
 499           look-up. AArch32 emulation requires applications compiled
 500           with 64K aligned segments.
 501
 502 endchoice
 503
 504 choice
 505         prompt "Virtual address space size"
 506         default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 507         default ARM64_VA_BITS_47 if ARM64_16K_PAGES
 508         default ARM64_VA_BITS_42 if ARM64_64K_PAGES
 509         help
 510           Allows choosing one of multiple possible virtual address
 511           space sizes. The level of translation table is determined by
 512           a combination of page size and virtual address space size.
 513
 514 config ARM64_VA_BITS_36
 515         bool "36-bit" if EXPERT
 516         depends on ARM64_16K_PAGES
 517
 518 config ARM64_VA_BITS_39
 519         bool "39-bit"
 520         depends on ARM64_4K_PAGES
 521
 522 config ARM64_VA_BITS_42
 523         bool "42-bit"
 524         depends on ARM64_64K_PAGES
 525
 526 config ARM64_VA_BITS_47
 527         bool "47-bit"
 528         depends on ARM64_16K_PAGES
 529
 530 config ARM64_VA_BITS_48
 531         bool "48-bit"
 532
 533 endchoice
 534
 535 config ARM64_VA_BITS
 536         int
 537         default 36 if ARM64_VA_BITS_36
 538         default 39 if ARM64_VA_BITS_39
 539         default 42 if ARM64_VA_BITS_42
 540         default 47 if ARM64_VA_BITS_47
 541         default 48 if ARM64_VA_BITS_48
 542
 543 config CPU_BIG_ENDIAN
 544        bool "Build big-endian kernel"
 545        help
 546          Say Y if you plan on running a kernel in big-endian mode.
 547
 548 config SCHED_MC
 549         bool "Multi-core scheduler support"
 550         help
 551           Multi-core scheduler support improves the CPU scheduler's decision
 552           making when dealing with multi-core CPU chips at a cost of slightly
 553           increased overhead in some places. If unsure say N here.
 554
 555 config SCHED_SMT
 556         bool "SMT scheduler support"
 557         help
 558           Improves the CPU scheduler's decision making when dealing with
 559           MultiThreading at a cost of slightly increased overhead in some
 560           places. If unsure say N here.
 561
 562 config NR_CPUS
 563         int "Maximum number of CPUs (2-4096)"
 564         range 2 4096
 565         # These have to remain sorted largest to smallest
 566         default "64"
 567
 568 config HOTPLUG_CPU
 569         bool "Support for hot-pluggable CPUs"
 570         select GENERIC_IRQ_MIGRATION
 571         help
 572           Say Y here to experiment with turning CPUs off and on.  CPUs
 573           can be controlled through /sys/devices/system/cpu.
 574
 575 # Common NUMA Features
 576 config NUMA
 577         bool "Numa Memory Allocation and Scheduler Support"
 578         depends on SMP
 579         help
 580           Enable NUMA (Non Uniform Memory Access) support.
 581
 582           The kernel will try to allocate memory used by a CPU on the
 583           local memory of the CPU and add some more
 584           NUMA awareness to the kernel.
 585
 586 config NODES_SHIFT
 587         int "Maximum NUMA Nodes (as a power of 2)"
 588         range 1 10
 589         default "2"
 590         depends on NEED_MULTIPLE_NODES
 591         help
 592           Specify the maximum number of NUMA Nodes available on the target
 593           system.  Increases memory reserved to accommodate various tables.
 594
 595 config USE_PERCPU_NUMA_NODE_ID
 596         def_bool y
 597         depends on NUMA
 598
 599 source kernel/Kconfig.preempt
 600 source kernel/Kconfig.hz
 601
 602 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
 603         depends on !HIBERNATION
 604         def_bool y
 605
 606 config ARCH_HAS_HOLES_MEMORYMODEL
 607         def_bool y if SPARSEMEM
 608
 609 config ARCH_SPARSEMEM_ENABLE
 610         def_bool y
 611         select SPARSEMEM_VMEMMAP_ENABLE
 612
 613 config ARCH_SPARSEMEM_DEFAULT
 614         def_bool ARCH_SPARSEMEM_ENABLE
 615
 616 config ARCH_SELECT_MEMORY_MODEL
 617         def_bool ARCH_SPARSEMEM_ENABLE
 618
 619 config HAVE_ARCH_PFN_VALID
 620         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 621
 622 config HW_PERF_EVENTS
 623         def_bool y
 624         depends on ARM_PMU
 625
 626 config SYS_SUPPORTS_HUGETLBFS
 627         def_bool y
 628
 629 config ARCH_WANT_HUGE_PMD_SHARE
 630         def_bool y if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)
 631
 632 config ARCH_HAS_CACHE_LINE_SIZE
 633         def_bool y
 634
 635 source "mm/Kconfig"
 636
 637 config SECCOMP
 638         bool "Enable seccomp to safely compute untrusted bytecode"
 639         ---help---
 640           This kernel feature is useful for number crunching applications
 641           that may need to compute untrusted bytecode during their
 642           execution. By using pipes or other transports made available to
 643           the process as file descriptors supporting the read/write
 644           syscalls, it's possible to isolate those applications in
 645           their own address space using seccomp. Once seccomp is
 646           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
 647           and the task is only allowed to execute a few safe syscalls
 648           defined by each seccomp mode.
 649
 650 config PARAVIRT
 651         bool "Enable paravirtualization code"
 652         help
 653           This changes the kernel so it can modify itself when it is run
 654           under a hypervisor, potentially improving performance significantly
 655           over full virtualization.
 656
 657 config PARAVIRT_TIME_ACCOUNTING
 658         bool "Paravirtual steal time accounting"
 659         select PARAVIRT
 660         default n
 661         help
 662           Select this option to enable fine granularity task steal time
 663           accounting. Time spent executing other tasks in parallel with
 664           the current vCPU is discounted from the vCPU power. To account for
 665           that, there can be a small performance impact.
 666
 667           If in doubt, say N here.
 668
 669 config XEN_DOM0
 670         def_bool y
 671         depends on XEN
 672
 673 config XEN
 674         bool "Xen guest support on ARM64"
 675         depends on ARM64 && OF
 676         select SWIOTLB_XEN
 677         select PARAVIRT
 678         help
 679           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
 680
 681 config FORCE_MAX_ZONEORDER
 682         int
 683         default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 684         default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)
 685         default "11"
 686         help
 687           The kernel memory allocator divides physically contiguous memory
 688           blocks into "zones", where each zone is a power of two number of
 689           pages.  This option selects the largest power of two that the kernel
 690           keeps in the memory allocator.  If you need to allocate very large
 691           blocks of physically contiguous memory, then you may need to
 692           increase this value.
 693
 694           This config option is actually maximum order plus one. For example,
 695           a value of 11 means that the largest free memory block is 2^10 pages.
 696
 697           We make sure that we can allocate upto a HugePage size for each configuration.
 698           Hence we have :
 699                 MAX_ORDER = (PMD_SHIFT - PAGE_SHIFT) + 1 => PAGE_SHIFT - 2
 700
 701           However for 4K, we choose a higher default value, 11 as opposed to 10, giving us
 702           4M allocations matching the default size used by generic code.
 703
 704 menuconfig ARMV8_DEPRECATED
 705         bool "Emulate deprecated/obsolete ARMv8 instructions"
 706         depends on COMPAT
 707         help
 708           Legacy software support may require certain instructions
 709           that have been deprecated or obsoleted in the architecture.
 710
 711           Enable this config to enable selective emulation of these
 712           features.
 713
 714           If unsure, say Y
 715
 716 if ARMV8_DEPRECATED
 717
 718 config SWP_EMULATION
 719         bool "Emulate SWP/SWPB instructions"
 720         help
 721           ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
 722           they are always undefined. Say Y here to enable software
 723           emulation of these instructions for userspace using LDXR/STXR.
 724
 725           In some older versions of glibc [<=2.8] SWP is used during futex
 726           trylock() operations with the assumption that the code will not
 727           be preempted. This invalid assumption may be more likely to fail
 728           with SWP emulation enabled, leading to deadlock of the user
 729           application.
 730
 731           NOTE: when accessing uncached shared regions, LDXR/STXR rely
 732           on an external transaction monitoring block called a global
 733           monitor to maintain update atomicity. If your system does not
 734           implement a global monitor, this option can cause programs that
 735           perform SWP operations to uncached memory to deadlock.
 736
 737           If unsure, say Y
 738
 739 config CP15_BARRIER_EMULATION
 740         bool "Emulate CP15 Barrier instructions"
 741         help
 742           The CP15 barrier instructions - CP15ISB, CP15DSB, and
 743           CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
 744           strongly recommended to use the ISB, DSB, and DMB
 745           instructions instead.
 746
 747           Say Y here to enable software emulation of these
 748           instructions for AArch32 userspace code. When this option is
 749           enabled, CP15 barrier usage is traced which can help
 750           identify software that needs updating.
 751
 752           If unsure, say Y
 753
 754 config SETEND_EMULATION
 755         bool "Emulate SETEND instruction"
 756         help
 757           The SETEND instruction alters the data-endianness of the
 758           AArch32 EL0, and is deprecated in ARMv8.
 759
 760           Say Y here to enable software emulation of the instruction
 761           for AArch32 userspace code.
 762
 763           Note: All the cpus on the system must have mixed endian support at EL0
 764           for this feature to be enabled. If a new CPU - which doesn't support mixed
 765           endian - is hotplugged in after this feature has been enabled, there could
 766           be unexpected results in the applications.
 767
 768           If unsure, say Y
 769 endif
 770
 771 menu "ARMv8.1 architectural features"
 772
 773 config ARM64_HW_AFDBM
 774         bool "Support for hardware updates of the Access and Dirty page flags"
 775         default y
 776         help
 777           The ARMv8.1 architecture extensions introduce support for
 778           hardware updates of the access and dirty information in page
 779           table entries. When enabled in TCR_EL1 (HA and HD bits) on
 780           capable processors, accesses to pages with PTE_AF cleared will
 781           set this bit instead of raising an access flag fault.
 782           Similarly, writes to read-only pages with the DBM bit set will
 783           clear the read-only bit (AP[2]) instead of raising a
 784           permission fault.
 785
 786           Kernels built with this configuration option enabled continue
 787           to work on pre-ARMv8.1 hardware and the performance impact is
 788           minimal. If unsure, say Y.
 789
 790 config ARM64_PAN
 791         bool "Enable support for Privileged Access Never (PAN)"
 792         default y
 793         help
 794          Privileged Access Never (PAN; part of the ARMv8.1 Extensions)
 795          prevents the kernel or hypervisor from accessing user-space (EL0)
 796          memory directly.
 797
 798          Choosing this option will cause any unprotected (not using
 799          copy_to_user et al) memory access to fail with a permission fault.
 800
 801          The feature is detected at runtime, and will remain as a 'nop'
 802          instruction if the cpu does not implement the feature.
 803
 804 config ARM64_LSE_ATOMICS
 805         bool "Atomic instructions"
 806         help
 807           As part of the Large System Extensions, ARMv8.1 introduces new
 808           atomic instructions that are designed specifically to scale in
 809           very large systems.
 810
 811           Say Y here to make use of these instructions for the in-kernel
 812           atomic routines. This incurs a small overhead on CPUs that do
 813           not support these instructions and requires the kernel to be
 814           built with binutils >= 2.25.
 815
 816 config ARM64_VHE
 817         bool "Enable support for Virtualization Host Extensions (VHE)"
 818         default y
 819         help
 820           Virtualization Host Extensions (VHE) allow the kernel to run
 821           directly at EL2 (instead of EL1) on processors that support
 822           it. This leads to better performance for KVM, as they reduce
 823           the cost of the world switch.
 824
 825           Selecting this option allows the VHE feature to be detected
 826           at runtime, and does not affect processors that do not
 827           implement this feature.
 828
 829 endmenu
 830
 831 menu "ARMv8.2 architectural features"
 832
 833 config ARM64_UAO
 834         bool "Enable support for User Access Override (UAO)"
 835         default y
 836         help
 837           User Access Override (UAO; part of the ARMv8.2 Extensions)
 838           causes the 'unprivileged' variant of the load/store instructions to
 839           be overriden to be privileged.
 840
 841           This option changes get_user() and friends to use the 'unprivileged'
 842           variant of the load/store instructions. This ensures that user-space
 843           really did have access to the supplied memory. When addr_limit is
 844           set to kernel memory the UAO bit will be set, allowing privileged
 845           access to kernel memory.
 846
 847           Choosing this option will cause copy_to_user() et al to use user-space
 848           memory permissions.
 849
 850           The feature is detected at runtime, the kernel will use the
 851           regular load/store instructions if the cpu does not implement the
 852           feature.
 853
 854 endmenu
 855
 856 config ARM64_MODULE_CMODEL_LARGE
 857         bool
 858
 859 config ARM64_MODULE_PLTS
 860         bool
 861         select ARM64_MODULE_CMODEL_LARGE
 862         select HAVE_MOD_ARCH_SPECIFIC
 863
 864 config RELOCATABLE
 865         bool
 866         help
 867           This builds the kernel as a Position Independent Executable (PIE),
 868           which retains all relocation metadata required to relocate the
 869           kernel binary at runtime to a different virtual address than the
 870           address it was linked at.
 871           Since AArch64 uses the RELA relocation format, this requires a
 872           relocation pass at runtime even if the kernel is loaded at the
 873           same address it was linked at.
 874
 875 config RANDOMIZE_BASE
 876         bool "Randomize the address of the kernel image"
 877         select ARM64_MODULE_PLTS
 878         select RELOCATABLE
 879         help
 880           Randomizes the virtual address at which the kernel image is
 881           loaded, as a security feature that deters exploit attempts
 882           relying on knowledge of the location of kernel internals.
 883
 884           It is the bootloader's job to provide entropy, by passing a
 885           random u64 value in /chosen/kaslr-seed at kernel entry.
 886
 887           When booting via the UEFI stub, it will invoke the firmware's
 888           EFI_RNG_PROTOCOL implementation (if available) to supply entropy
 889           to the kernel proper. In addition, it will randomise the physical
 890           location of the kernel Image as well.
 891
 892           If unsure, say N.
 893
 894 config RANDOMIZE_MODULE_REGION_FULL
 895         bool "Randomize the module region independently from the core kernel"
 896         depends on RANDOMIZE_BASE
 897         default y
 898         help
 899           Randomizes the location of the module region without considering the
 900           location of the core kernel. This way, it is impossible for modules
 901           to leak information about the location of core kernel data structures
 902           but it does imply that function calls between modules and the core
 903           kernel will need to be resolved via veneers in the module PLT.
 904
 905           When this option is not set, the module region will be randomized over
 906           a limited range that contains the [_stext, _etext] interval of the
 907           core kernel, so branch relocations are always in range.
 908
 909 endmenu
 910
 911 menu "Boot options"
 912
 913 config ARM64_ACPI_PARKING_PROTOCOL
 914         bool "Enable support for the ARM64 ACPI parking protocol"
 915         depends on ACPI
 916         help
 917           Enable support for the ARM64 ACPI parking protocol. If disabled
 918           the kernel will not allow booting through the ARM64 ACPI parking
 919           protocol even if the corresponding data is present in the ACPI
 920           MADT table.
 921
 922 config CMDLINE
 923         string "Default kernel command string"
 924         default ""
 925         help
 926           Provide a set of default command-line options at build time by
 927           entering them here. As a minimum, you should specify the the
 928           root device (e.g. root=/dev/nfs).
 929
 930 config CMDLINE_FORCE
 931         bool "Always use the default kernel command string"
 932         help
 933           Always use the default kernel command string, even if the boot
 934           loader passes other arguments to the kernel.
 935           This is useful if you cannot or don't want to change the
 936           command-line options your boot loader passes to the kernel.
 937
 938 config EFI_STUB
 939         bool
 940
 941 config EFI
 942         bool "UEFI runtime support"
 943         depends on OF && !CPU_BIG_ENDIAN
 944         select LIBFDT
 945         select UCS2_STRING
 946         select EFI_PARAMS_FROM_FDT
 947         select EFI_RUNTIME_WRAPPERS
 948         select EFI_STUB
 949         select EFI_ARMSTUB
 950         default y
 951         help
 952           This option provides support for runtime services provided
 953           by UEFI firmware (such as non-volatile variables, realtime
 954           clock, and platform reset). A UEFI stub is also provided to
 955           allow the kernel to be booted as an EFI application. This
 956           is only useful on systems that have UEFI firmware.
 957
 958 config DMI
 959         bool "Enable support for SMBIOS (DMI) tables"
 960         depends on EFI
 961         default y
 962         help
 963           This enables SMBIOS/DMI feature for systems.
 964
 965           This option is only useful on systems that have UEFI firmware.
 966           However, even with this option, the resultant kernel should
 967           continue to boot on existing non-UEFI platforms.
 968
 969 endmenu
 970
 971 menu "Userspace binary formats"
 972
 973 source "fs/Kconfig.binfmt"
 974
 975 config COMPAT
 976         bool "Kernel support for 32-bit EL0"
 977         depends on ARM64_4K_PAGES || EXPERT
 978         select COMPAT_BINFMT_ELF
 979         select HAVE_UID16
 980         select OLD_SIGSUSPEND3
 981         select COMPAT_OLD_SIGACTION
 982         help
 983           This option enables support for a 32-bit EL0 running under a 64-bit
 984           kernel at EL1. AArch32-specific components such as system calls,
 985           the user helper functions, VFP support and the ptrace interface are
 986           handled appropriately by the kernel.
 987
 988           If you use a page size other than 4KB (i.e, 16KB or 64KB), please be aware
 989           that you will only be able to execute AArch32 binaries that were compiled
 990           with page size aligned segments.
 991
 992           If you want to execute 32-bit userspace applications, say Y.
 993
 994 config SYSVIPC_COMPAT
 995         def_bool y
 996         depends on COMPAT && SYSVIPC
 997
 998 endmenu
 999
1000 menu "Power management options"
1001
1002 source "kernel/power/Kconfig"
1003
1004 config ARCH_HIBERNATION_POSSIBLE
1005         def_bool y
1006         depends on CPU_PM
1007
1008 config ARCH_HIBERNATION_HEADER
1009         def_bool y
1010         depends on HIBERNATION
1011
1012 config ARCH_SUSPEND_POSSIBLE
1013         def_bool y
1014
1015 endmenu
1016
1017 menu "CPU Power Management"
1018
1019 source "drivers/cpuidle/Kconfig"
1020
1021 source "drivers/cpufreq/Kconfig"
1022
1023 endmenu
1024
1025 source "net/Kconfig"
1026
1027 source "drivers/Kconfig"
1028
1029 source "drivers/firmware/Kconfig"
1030
1031 source "drivers/acpi/Kconfig"
1032
1033 source "fs/Kconfig"
1034
1035 source "arch/arm64/kvm/Kconfig"
1036
1037 source "arch/arm64/Kconfig.debug"
1038
1039 source "security/Kconfig"
1040
1041 source "crypto/Kconfig"
1042 if CRYPTO
1043 source "arch/arm64/crypto/Kconfig"
1044 endif
1045
1046 source "lib/Kconfig"