arch/arm64/Kconfig

   1 config ARM64
   2         def_bool y
   3         select ACPI_CCA_REQUIRED if ACPI
   4         select ACPI_GENERIC_GSI if ACPI
   5         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
   6         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   7         select ARCH_HAS_ELF_RANDOMIZE
   8         select ARCH_HAS_GCOV_PROFILE_ALL
   9         select ARCH_HAS_SG_CHAIN
  10         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  11         select ARCH_USE_CMPXCHG_LOCKREF
  12         select ARCH_SUPPORTS_ATOMIC_RMW
  13         select ARCH_WANT_OPTIONAL_GPIOLIB
  14         select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  15         select ARCH_WANT_FRAME_POINTERS
  16         select ARM_AMBA
  17         select ARM_ARCH_TIMER
  18         select ARM_GIC
  19         select AUDIT_ARCH_COMPAT_GENERIC
  20         select ARM_GIC_V2M if PCI_MSI
  21         select ARM_GIC_V3
  22         select ARM_GIC_V3_ITS if PCI_MSI
  23         select BUILDTIME_EXTABLE_SORT
  24         select CLONE_BACKWARDS
  25         select COMMON_CLK
  26         select CPU_PM if (SUSPEND || CPU_IDLE)
  27         select DCACHE_WORD_ACCESS
  28         select EDAC_SUPPORT
  29         select GENERIC_ALLOCATOR
  30         select GENERIC_CLOCKEVENTS
  31         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  32         select GENERIC_CPU_AUTOPROBE
  33         select GENERIC_EARLY_IOREMAP
  34         select GENERIC_IRQ_PROBE
  35         select GENERIC_IRQ_SHOW
  36         select GENERIC_IRQ_SHOW_LEVEL
  37         select GENERIC_PCI_IOMAP
  38         select GENERIC_SCHED_CLOCK
  39         select GENERIC_SMP_IDLE_THREAD
  40         select GENERIC_STRNCPY_FROM_USER
  41         select GENERIC_STRNLEN_USER
  42         select GENERIC_TIME_VSYSCALL
  43         select HANDLE_DOMAIN_IRQ
  44         select HARDIRQS_SW_RESEND
  45         select HAVE_ALIGNED_STRUCT_PAGE if SLUB
  46         select HAVE_ARCH_AUDITSYSCALL
  47         select HAVE_ARCH_BITREVERSE
  48         select HAVE_ARCH_JUMP_LABEL
  49         select HAVE_ARCH_KGDB
  50         select HAVE_ARCH_SECCOMP_FILTER
  51         select HAVE_ARCH_TRACEHOOK
  52         select HAVE_BPF_JIT
  53         select HAVE_C_RECORDMCOUNT
  54         select HAVE_CC_STACKPROTECTOR
  55         select HAVE_CMPXCHG_DOUBLE
  56         select HAVE_DEBUG_BUGVERBOSE
  57         select HAVE_DEBUG_KMEMLEAK
  58         select HAVE_DMA_API_DEBUG
  59         select HAVE_DMA_ATTRS
  60         select HAVE_DMA_CONTIGUOUS
  61         select HAVE_DYNAMIC_FTRACE
  62         select HAVE_EFFICIENT_UNALIGNED_ACCESS
  63         select HAVE_FTRACE_MCOUNT_RECORD
  64         select HAVE_FUNCTION_TRACER
  65         select HAVE_FUNCTION_GRAPH_TRACER
  66         select HAVE_GENERIC_DMA_COHERENT
  67         select HAVE_HW_BREAKPOINT if PERF_EVENTS
  68         select HAVE_MEMBLOCK
  69         select HAVE_PATA_PLATFORM
  70         select HAVE_PERF_EVENTS
  71         select HAVE_PERF_REGS
  72         select HAVE_PERF_USER_STACK_DUMP
  73         select HAVE_RCU_TABLE_FREE
  74         select HAVE_SYSCALL_TRACEPOINTS
  75         select IRQ_DOMAIN
  76         select IRQ_FORCED_THREADING
  77         select MODULES_USE_ELF_RELA
  78         select NO_BOOTMEM
  79         select OF
  80         select OF_EARLY_FLATTREE
  81         select OF_RESERVED_MEM
  82         select PERF_USE_VMALLOC
  83         select POWER_RESET
  84         select POWER_SUPPLY
  85         select RTC_LIB
  86         select SPARSE_IRQ
  87         select SYSCTL_EXCEPTION_TRACE
  88         select HAVE_CONTEXT_TRACKING
  89         help
  90           ARM 64-bit (AArch64) Linux support.
  91
  92 config 64BIT
  93         def_bool y
  94
  95 config ARCH_PHYS_ADDR_T_64BIT
  96         def_bool y
  97
  98 config MMU
  99         def_bool y
 100
 101 config NO_IOPORT_MAP
 102         def_bool y if !PCI
 103
 104 config STACKTRACE_SUPPORT
 105         def_bool y
 106
 107 config LOCKDEP_SUPPORT
 108         def_bool y
 109
 110 config TRACE_IRQFLAGS_SUPPORT
 111         def_bool y
 112
 113 config RWSEM_XCHGADD_ALGORITHM
 114         def_bool y
 115
 116 config GENERIC_HWEIGHT
 117         def_bool y
 118
 119 config GENERIC_CSUM
 120         def_bool y
 121
 122 config GENERIC_CALIBRATE_DELAY
 123         def_bool y
 124
 125 config ZONE_DMA
 126         def_bool y
 127
 128 config HAVE_GENERIC_RCU_GUP
 129         def_bool y
 130
 131 config ARCH_DMA_ADDR_T_64BIT
 132         def_bool y
 133
 134 config NEED_DMA_MAP_STATE
 135         def_bool y
 136
 137 config NEED_SG_DMA_LENGTH
 138         def_bool y
 139
 140 config SWIOTLB
 141         def_bool y
 142
 143 config IOMMU_HELPER
 144         def_bool SWIOTLB
 145
 146 config KERNEL_MODE_NEON
 147         def_bool y
 148
 149 config FIX_EARLYCON_MEM
 150         def_bool y
 151
 152 config PGTABLE_LEVELS
 153         int
 154         default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 155         default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
 156         default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
 157         default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
 158
 159 source "init/Kconfig"
 160
 161 source "kernel/Kconfig.freezer"
 162
 163 menu "Platform selection"
 164
 165 config ARCH_EXYNOS
 166         bool
 167         help
 168           This enables support for Samsung Exynos SoC family
 169
 170 config ARCH_EXYNOS7
 171         bool "ARMv8 based Samsung Exynos7"
 172         select ARCH_EXYNOS
 173         select COMMON_CLK_SAMSUNG
 174         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 175         select HAVE_S3C_RTC if RTC_CLASS
 176         select PINCTRL
 177         select PINCTRL_EXYNOS
 178
 179         help
 180           This enables support for Samsung Exynos7 SoC family
 181
 182 config ARCH_FSL_LS2085A
 183         bool "Freescale LS2085A SOC"
 184         help
 185           This enables support for Freescale LS2085A SOC.
 186
 187 config ARCH_HISI
 188         bool "Hisilicon SoC Family"
 189         help
 190           This enables support for Hisilicon ARMv8 SoC family
 191
 192 config ARCH_MEDIATEK
 193         bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
 194         select ARM_GIC
 195         select PINCTRL
 196         help
 197           Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
 198
 199 config ARCH_QCOM
 200         bool "Qualcomm Platforms"
 201         select PINCTRL
 202         help
 203           This enables support for the ARMv8 based Qualcomm chipsets.
 204
 205 config ARCH_SEATTLE
 206         bool "AMD Seattle SoC Family"
 207         help
 208           This enables support for AMD Seattle SOC Family
 209
 210 config ARCH_TEGRA
 211         bool "NVIDIA Tegra SoC Family"
 212         select ARCH_HAS_RESET_CONTROLLER
 213         select ARCH_REQUIRE_GPIOLIB
 214         select CLKDEV_LOOKUP
 215         select CLKSRC_MMIO
 216         select CLKSRC_OF
 217         select GENERIC_CLOCKEVENTS
 218         select HAVE_CLK
 219         select PINCTRL
 220         select RESET_CONTROLLER
 221         help
 222           This enables support for the NVIDIA Tegra SoC family.
 223
 224 config ARCH_TEGRA_132_SOC
 225         bool "NVIDIA Tegra132 SoC"
 226         depends on ARCH_TEGRA
 227         select PINCTRL_TEGRA124
 228         select USB_ULPI if USB_PHY
 229         select USB_ULPI_VIEWPORT if USB_PHY
 230         help
 231           Enable support for NVIDIA Tegra132 SoC, based on the Denver
 232           ARMv8 CPU.  The Tegra132 SoC is similar to the Tegra124 SoC,
 233           but contains an NVIDIA Denver CPU complex in place of
 234           Tegra124's "4+1" Cortex-A15 CPU complex.
 235
 236 config ARCH_SPRD
 237         bool "Spreadtrum SoC platform"
 238         help
 239           Support for Spreadtrum ARM based SoCs
 240
 241 config ARCH_THUNDER
 242         bool "Cavium Inc. Thunder SoC Family"
 243         help
 244           This enables support for Cavium's Thunder Family of SoCs.
 245
 246 config ARCH_VEXPRESS
 247         bool "ARMv8 software model (Versatile Express)"
 248         select ARCH_REQUIRE_GPIOLIB
 249         select COMMON_CLK_VERSATILE
 250         select POWER_RESET_VEXPRESS
 251         select VEXPRESS_CONFIG
 252         help
 253           This enables support for the ARMv8 software model (Versatile
 254           Express).
 255
 256 config ARCH_XGENE
 257         bool "AppliedMicro X-Gene SOC Family"
 258         help
 259           This enables support for AppliedMicro X-Gene SOC Family
 260
 261 config ARCH_ZYNQMP
 262         bool "Xilinx ZynqMP Family"
 263         help
 264           This enables support for Xilinx ZynqMP Family
 265
 266 endmenu
 267
 268 menu "Bus support"
 269
 270 config PCI
 271         bool "PCI support"
 272         help
 273           This feature enables support for PCI bus system. If you say Y
 274           here, the kernel will include drivers and infrastructure code
 275           to support PCI bus devices.
 276
 277 config PCI_DOMAINS
 278         def_bool PCI
 279
 280 config PCI_DOMAINS_GENERIC
 281         def_bool PCI
 282
 283 config PCI_SYSCALL
 284         def_bool PCI
 285
 286 source "drivers/pci/Kconfig"
 287 source "drivers/pci/pcie/Kconfig"
 288 source "drivers/pci/hotplug/Kconfig"
 289
 290 endmenu
 291
 292 menu "Kernel Features"
 293
 294 menu "ARM errata workarounds via the alternatives framework"
 295
 296 config ARM64_ERRATUM_826319
 297         bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
 298         default y
 299         help
 300           This option adds an alternative code sequence to work around ARM
 301           erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
 302           AXI master interface and an L2 cache.
 303
 304           If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
 305           and is unable to accept a certain write via this interface, it will
 306           not progress on read data presented on the read data channel and the
 307           system can deadlock.
 308
 309           The workaround promotes data cache clean instructions to
 310           data cache clean-and-invalidate.
 311           Please note that this does not necessarily enable the workaround,
 312           as it depends on the alternative framework, which will only patch
 313           the kernel if an affected CPU is detected.
 314
 315           If unsure, say Y.
 316
 317 config ARM64_ERRATUM_827319
 318         bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
 319         default y
 320         help
 321           This option adds an alternative code sequence to work around ARM
 322           erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
 323           master interface and an L2 cache.
 324
 325           Under certain conditions this erratum can cause a clean line eviction
 326           to occur at the same time as another transaction to the same address
 327           on the AMBA 5 CHI interface, which can cause data corruption if the
 328           interconnect reorders the two transactions.
 329
 330           The workaround promotes data cache clean instructions to
 331           data cache clean-and-invalidate.
 332           Please note that this does not necessarily enable the workaround,
 333           as it depends on the alternative framework, which will only patch
 334           the kernel if an affected CPU is detected.
 335
 336           If unsure, say Y.
 337
 338 config ARM64_ERRATUM_824069
 339         bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
 340         default y
 341         help
 342           This option adds an alternative code sequence to work around ARM
 343           erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
 344           to a coherent interconnect.
 345
 346           If a Cortex-A53 processor is executing a store or prefetch for
 347           write instruction at the same time as a processor in another
 348           cluster is executing a cache maintenance operation to the same
 349           address, then this erratum might cause a clean cache line to be
 350           incorrectly marked as dirty.
 351
 352           The workaround promotes data cache clean instructions to
 353           data cache clean-and-invalidate.
 354           Please note that this option does not necessarily enable the
 355           workaround, as it depends on the alternative framework, which will
 356           only patch the kernel if an affected CPU is detected.
 357
 358           If unsure, say Y.
 359
 360 config ARM64_ERRATUM_819472
 361         bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
 362         default y
 363         help
 364           This option adds an alternative code sequence to work around ARM
 365           erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
 366           present when it is connected to a coherent interconnect.
 367
 368           If the processor is executing a load and store exclusive sequence at
 369           the same time as a processor in another cluster is executing a cache
 370           maintenance operation to the same address, then this erratum might
 371           cause data corruption.
 372
 373           The workaround promotes data cache clean instructions to
 374           data cache clean-and-invalidate.
 375           Please note that this does not necessarily enable the workaround,
 376           as it depends on the alternative framework, which will only patch
 377           the kernel if an affected CPU is detected.
 378
 379           If unsure, say Y.
 380
 381 config ARM64_ERRATUM_832075
 382         bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
 383         default y
 384         help
 385           This option adds an alternative code sequence to work around ARM
 386           erratum 832075 on Cortex-A57 parts up to r1p2.
 387
 388           Affected Cortex-A57 parts might deadlock when exclusive load/store
 389           instructions to Write-Back memory are mixed with Device loads.
 390
 391           The workaround is to promote device loads to use Load-Acquire
 392           semantics.
 393           Please note that this does not necessarily enable the workaround,
 394           as it depends on the alternative framework, which will only patch
 395           the kernel if an affected CPU is detected.
 396
 397           If unsure, say Y.
 398
 399 config ARM64_ERRATUM_845719
 400         bool "Cortex-A53: 845719: a load might read incorrect data"
 401         depends on COMPAT
 402         default y
 403         help
 404           This option adds an alternative code sequence to work around ARM
 405           erratum 845719 on Cortex-A53 parts up to r0p4.
 406
 407           When running a compat (AArch32) userspace on an affected Cortex-A53
 408           part, a load at EL0 from a virtual address that matches the bottom 32
 409           bits of the virtual address used by a recent load at (AArch64) EL1
 410           might return incorrect data.
 411
 412           The workaround is to write the contextidr_el1 register on exception
 413           return to a 32-bit task.
 414           Please note that this does not necessarily enable the workaround,
 415           as it depends on the alternative framework, which will only patch
 416           the kernel if an affected CPU is detected.
 417
 418           If unsure, say Y.
 419
 420 endmenu
 421
 422
 423 choice
 424         prompt "Page size"
 425         default ARM64_4K_PAGES
 426         help
 427           Page size (translation granule) configuration.
 428
 429 config ARM64_4K_PAGES
 430         bool "4KB"
 431         help
 432           This feature enables 4KB pages support.
 433
 434 config ARM64_64K_PAGES
 435         bool "64KB"
 436         help
 437           This feature enables 64KB pages support (4KB by default)
 438           allowing only two levels of page tables and faster TLB
 439           look-up. AArch32 emulation is not available when this feature
 440           is enabled.
 441
 442 endchoice
 443
 444 choice
 445         prompt "Virtual address space size"
 446         default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 447         default ARM64_VA_BITS_42 if ARM64_64K_PAGES
 448         help
 449           Allows choosing one of multiple possible virtual address
 450           space sizes. The level of translation table is determined by
 451           a combination of page size and virtual address space size.
 452
 453 config ARM64_VA_BITS_39
 454         bool "39-bit"
 455         depends on ARM64_4K_PAGES
 456
 457 config ARM64_VA_BITS_42
 458         bool "42-bit"
 459         depends on ARM64_64K_PAGES
 460
 461 config ARM64_VA_BITS_48
 462         bool "48-bit"
 463
 464 endchoice
 465
 466 config ARM64_VA_BITS
 467         int
 468         default 39 if ARM64_VA_BITS_39
 469         default 42 if ARM64_VA_BITS_42
 470         default 48 if ARM64_VA_BITS_48
 471
 472 config CPU_BIG_ENDIAN
 473        bool "Build big-endian kernel"
 474        help
 475          Say Y if you plan on running a kernel in big-endian mode.
 476
 477 config SMP
 478         bool "Symmetric Multi-Processing"
 479         help
 480           This enables support for systems with more than one CPU.  If
 481           you say N here, the kernel will run on single and
 482           multiprocessor machines, but will use only one CPU of a
 483           multiprocessor machine. If you say Y here, the kernel will run
 484           on many, but not all, single processor machines. On a single
 485           processor machine, the kernel will run faster if you say N
 486           here.
 487
 488           If you don't know what to do here, say N.
 489
 490 config SCHED_MC
 491         bool "Multi-core scheduler support"
 492         depends on SMP
 493         help
 494           Multi-core scheduler support improves the CPU scheduler's decision
 495           making when dealing with multi-core CPU chips at a cost of slightly
 496           increased overhead in some places. If unsure say N here.
 497
 498 config SCHED_SMT
 499         bool "SMT scheduler support"
 500         depends on SMP
 501         help
 502           Improves the CPU scheduler's decision making when dealing with
 503           MultiThreading at a cost of slightly increased overhead in some
 504           places. If unsure say N here.
 505
 506 config NR_CPUS
 507         int "Maximum number of CPUs (2-4096)"
 508         range 2 4096
 509         depends on SMP
 510         # These have to remain sorted largest to smallest
 511         default "64"
 512
 513 config HOTPLUG_CPU
 514         bool "Support for hot-pluggable CPUs"
 515         depends on SMP
 516         help
 517           Say Y here to experiment with turning CPUs off and on.  CPUs
 518           can be controlled through /sys/devices/system/cpu.
 519
 520 source kernel/Kconfig.preempt
 521
 522 config UP_LATE_INIT
 523        def_bool y
 524        depends on !SMP
 525
 526 config HZ
 527         int
 528         default 100
 529
 530 config ARCH_HAS_HOLES_MEMORYMODEL
 531         def_bool y if SPARSEMEM
 532
 533 config ARCH_SPARSEMEM_ENABLE
 534         def_bool y
 535         select SPARSEMEM_VMEMMAP_ENABLE
 536
 537 config ARCH_SPARSEMEM_DEFAULT
 538         def_bool ARCH_SPARSEMEM_ENABLE
 539
 540 config ARCH_SELECT_MEMORY_MODEL
 541         def_bool ARCH_SPARSEMEM_ENABLE
 542
 543 config HAVE_ARCH_PFN_VALID
 544         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 545
 546 config HW_PERF_EVENTS
 547         bool "Enable hardware performance counter support for perf events"
 548         depends on PERF_EVENTS
 549         default y
 550         help
 551           Enable hardware performance counter support for perf events. If
 552           disabled, perf events will use software events only.
 553
 554 config SYS_SUPPORTS_HUGETLBFS
 555         def_bool y
 556
 557 config ARCH_WANT_GENERAL_HUGETLB
 558         def_bool y
 559
 560 config ARCH_WANT_HUGE_PMD_SHARE
 561         def_bool y if !ARM64_64K_PAGES
 562
 563 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
 564         def_bool y
 565
 566 config ARCH_HAS_CACHE_LINE_SIZE
 567         def_bool y
 568
 569 source "mm/Kconfig"
 570
 571 config SECCOMP
 572         bool "Enable seccomp to safely compute untrusted bytecode"
 573         ---help---
 574           This kernel feature is useful for number crunching applications
 575           that may need to compute untrusted bytecode during their
 576           execution. By using pipes or other transports made available to
 577           the process as file descriptors supporting the read/write
 578           syscalls, it's possible to isolate those applications in
 579           their own address space using seccomp. Once seccomp is
 580           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
 581           and the task is only allowed to execute a few safe syscalls
 582           defined by each seccomp mode.
 583
 584 config XEN_DOM0
 585         def_bool y
 586         depends on XEN
 587
 588 config XEN
 589         bool "Xen guest support on ARM64"
 590         depends on ARM64 && OF
 591         select SWIOTLB_XEN
 592         help
 593           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
 594
 595 config FORCE_MAX_ZONEORDER
 596         int
 597         default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 598         default "11"
 599
 600 menuconfig ARMV8_DEPRECATED
 601         bool "Emulate deprecated/obsolete ARMv8 instructions"
 602         depends on COMPAT
 603         help
 604           Legacy software support may require certain instructions
 605           that have been deprecated or obsoleted in the architecture.
 606
 607           Enable this config to enable selective emulation of these
 608           features.
 609
 610           If unsure, say Y
 611
 612 if ARMV8_DEPRECATED
 613
 614 config SWP_EMULATION
 615         bool "Emulate SWP/SWPB instructions"
 616         help
 617           ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
 618           they are always undefined. Say Y here to enable software
 619           emulation of these instructions for userspace using LDXR/STXR.
 620
 621           In some older versions of glibc [<=2.8] SWP is used during futex
 622           trylock() operations with the assumption that the code will not
 623           be preempted. This invalid assumption may be more likely to fail
 624           with SWP emulation enabled, leading to deadlock of the user
 625           application.
 626
 627           NOTE: when accessing uncached shared regions, LDXR/STXR rely
 628           on an external transaction monitoring block called a global
 629           monitor to maintain update atomicity. If your system does not
 630           implement a global monitor, this option can cause programs that
 631           perform SWP operations to uncached memory to deadlock.
 632
 633           If unsure, say Y
 634
 635 config CP15_BARRIER_EMULATION
 636         bool "Emulate CP15 Barrier instructions"
 637         help
 638           The CP15 barrier instructions - CP15ISB, CP15DSB, and
 639           CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
 640           strongly recommended to use the ISB, DSB, and DMB
 641           instructions instead.
 642
 643           Say Y here to enable software emulation of these
 644           instructions for AArch32 userspace code. When this option is
 645           enabled, CP15 barrier usage is traced which can help
 646           identify software that needs updating.
 647
 648           If unsure, say Y
 649
 650 config SETEND_EMULATION
 651         bool "Emulate SETEND instruction"
 652         help
 653           The SETEND instruction alters the data-endianness of the
 654           AArch32 EL0, and is deprecated in ARMv8.
 655
 656           Say Y here to enable software emulation of the instruction
 657           for AArch32 userspace code.
 658
 659           Note: All the cpus on the system must have mixed endian support at EL0
 660           for this feature to be enabled. If a new CPU - which doesn't support mixed
 661           endian - is hotplugged in after this feature has been enabled, there could
 662           be unexpected results in the applications.
 663
 664           If unsure, say Y
 665 endif
 666
 667 endmenu
 668
 669 menu "Boot options"
 670
 671 config CMDLINE
 672         string "Default kernel command string"
 673         default ""
 674         help
 675           Provide a set of default command-line options at build time by
 676           entering them here. As a minimum, you should specify the the
 677           root device (e.g. root=/dev/nfs).
 678
 679 config CMDLINE_FORCE
 680         bool "Always use the default kernel command string"
 681         help
 682           Always use the default kernel command string, even if the boot
 683           loader passes other arguments to the kernel.
 684           This is useful if you cannot or don't want to change the
 685           command-line options your boot loader passes to the kernel.
 686
 687 config EFI_STUB
 688         bool
 689
 690 config EFI
 691         bool "UEFI runtime support"
 692         depends on OF && !CPU_BIG_ENDIAN
 693         select LIBFDT
 694         select UCS2_STRING
 695         select EFI_PARAMS_FROM_FDT
 696         select EFI_RUNTIME_WRAPPERS
 697         select EFI_STUB
 698         select EFI_ARMSTUB
 699         default y
 700         help
 701           This option provides support for runtime services provided
 702           by UEFI firmware (such as non-volatile variables, realtime
 703           clock, and platform reset). A UEFI stub is also provided to
 704           allow the kernel to be booted as an EFI application. This
 705           is only useful on systems that have UEFI firmware.
 706
 707 config DMI
 708         bool "Enable support for SMBIOS (DMI) tables"
 709         depends on EFI
 710         default y
 711         help
 712           This enables SMBIOS/DMI feature for systems.
 713
 714           This option is only useful on systems that have UEFI firmware.
 715           However, even with this option, the resultant kernel should
 716           continue to boot on existing non-UEFI platforms.
 717
 718 endmenu
 719
 720 menu "Userspace binary formats"
 721
 722 source "fs/Kconfig.binfmt"
 723
 724 config COMPAT
 725         bool "Kernel support for 32-bit EL0"
 726         depends on !ARM64_64K_PAGES || EXPERT
 727         select COMPAT_BINFMT_ELF
 728         select HAVE_UID16
 729         select OLD_SIGSUSPEND3
 730         select COMPAT_OLD_SIGACTION
 731         help
 732           This option enables support for a 32-bit EL0 running under a 64-bit
 733           kernel at EL1. AArch32-specific components such as system calls,
 734           the user helper functions, VFP support and the ptrace interface are
 735           handled appropriately by the kernel.
 736
 737           If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
 738           will only be able to execute AArch32 binaries that were compiled with
 739           64k aligned segments.
 740
 741           If you want to execute 32-bit userspace applications, say Y.
 742
 743 config SYSVIPC_COMPAT
 744         def_bool y
 745         depends on COMPAT && SYSVIPC
 746
 747 endmenu
 748
 749 menu "Power management options"
 750
 751 source "kernel/power/Kconfig"
 752
 753 config ARCH_SUSPEND_POSSIBLE
 754         def_bool y
 755
 756 endmenu
 757
 758 menu "CPU Power Management"
 759
 760 source "drivers/cpuidle/Kconfig"
 761
 762 source "drivers/cpufreq/Kconfig"
 763
 764 endmenu
 765
 766 source "net/Kconfig"
 767
 768 source "drivers/Kconfig"
 769
 770 source "drivers/firmware/Kconfig"
 771
 772 source "drivers/acpi/Kconfig"
 773
 774 source "fs/Kconfig"
 775
 776 source "arch/arm64/kvm/Kconfig"
 777
 778 source "arch/arm64/Kconfig.debug"
 779
 780 source "security/Kconfig"
 781
 782 source "crypto/Kconfig"
 783 if CRYPTO
 784 source "arch/arm64/crypto/Kconfig"
 785 endif
 786
 787 source "lib/Kconfig"