arch/arm64/Kconfig

   1 config ARM64
   2         def_bool y
   3         select ACPI_GENERIC_GSI if ACPI
   4         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAS_ELF_RANDOMIZE
   7         select ARCH_HAS_GCOV_PROFILE_ALL
   8         select ARCH_HAS_SG_CHAIN
   9         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  10         select ARCH_USE_CMPXCHG_LOCKREF
  11         select ARCH_SUPPORTS_ATOMIC_RMW
  12         select ARCH_WANT_OPTIONAL_GPIOLIB
  13         select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  14         select ARCH_WANT_FRAME_POINTERS
  15         select ARM_AMBA
  16         select ARM_ARCH_TIMER
  17         select ARM_GIC
  18         select AUDIT_ARCH_COMPAT_GENERIC
  19         select ARM_GIC_V2M if PCI_MSI
  20         select ARM_GIC_V3
  21         select ARM_GIC_V3_ITS if PCI_MSI
  22         select BUILDTIME_EXTABLE_SORT
  23         select CLONE_BACKWARDS
  24         select COMMON_CLK
  25         select CPU_PM if (SUSPEND || CPU_IDLE)
  26         select DCACHE_WORD_ACCESS
  27         select GENERIC_ALLOCATOR
  28         select GENERIC_CLOCKEVENTS
  29         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  30         select GENERIC_CPU_AUTOPROBE
  31         select GENERIC_EARLY_IOREMAP
  32         select GENERIC_IRQ_PROBE
  33         select GENERIC_IRQ_SHOW
  34         select GENERIC_PCI_IOMAP
  35         select GENERIC_SCHED_CLOCK
  36         select GENERIC_SMP_IDLE_THREAD
  37         select GENERIC_STRNCPY_FROM_USER
  38         select GENERIC_STRNLEN_USER
  39         select GENERIC_TIME_VSYSCALL
  40         select HANDLE_DOMAIN_IRQ
  41         select HARDIRQS_SW_RESEND
  42         select HAVE_ALIGNED_STRUCT_PAGE if SLUB
  43         select HAVE_ARCH_AUDITSYSCALL
  44         select HAVE_ARCH_BITREVERSE
  45         select HAVE_ARCH_JUMP_LABEL
  46         select HAVE_ARCH_KGDB
  47         select HAVE_ARCH_SECCOMP_FILTER
  48         select HAVE_ARCH_TRACEHOOK
  49         select HAVE_BPF_JIT
  50         select HAVE_C_RECORDMCOUNT
  51         select HAVE_CC_STACKPROTECTOR
  52         select HAVE_CMPXCHG_DOUBLE
  53         select HAVE_DEBUG_BUGVERBOSE
  54         select HAVE_DEBUG_KMEMLEAK
  55         select HAVE_DMA_API_DEBUG
  56         select HAVE_DMA_ATTRS
  57         select HAVE_DMA_CONTIGUOUS
  58         select HAVE_DYNAMIC_FTRACE
  59         select HAVE_EFFICIENT_UNALIGNED_ACCESS
  60         select HAVE_FTRACE_MCOUNT_RECORD
  61         select HAVE_FUNCTION_TRACER
  62         select HAVE_FUNCTION_GRAPH_TRACER
  63         select HAVE_GENERIC_DMA_COHERENT
  64         select HAVE_HW_BREAKPOINT if PERF_EVENTS
  65         select HAVE_MEMBLOCK
  66         select HAVE_PATA_PLATFORM
  67         select HAVE_PERF_EVENTS
  68         select HAVE_PERF_REGS
  69         select HAVE_PERF_USER_STACK_DUMP
  70         select HAVE_RCU_TABLE_FREE
  71         select HAVE_SYSCALL_TRACEPOINTS
  72         select IRQ_DOMAIN
  73         select MODULES_USE_ELF_RELA
  74         select NO_BOOTMEM
  75         select OF
  76         select OF_EARLY_FLATTREE
  77         select OF_RESERVED_MEM
  78         select PERF_USE_VMALLOC
  79         select POWER_RESET
  80         select POWER_SUPPLY
  81         select RTC_LIB
  82         select SPARSE_IRQ
  83         select SYSCTL_EXCEPTION_TRACE
  84         select HAVE_CONTEXT_TRACKING
  85         help
  86           ARM 64-bit (AArch64) Linux support.
  87
  88 config 64BIT
  89         def_bool y
  90
  91 config ARCH_PHYS_ADDR_T_64BIT
  92         def_bool y
  93
  94 config MMU
  95         def_bool y
  96
  97 config NO_IOPORT_MAP
  98         def_bool y if !PCI
  99
 100 config STACKTRACE_SUPPORT
 101         def_bool y
 102
 103 config LOCKDEP_SUPPORT
 104         def_bool y
 105
 106 config TRACE_IRQFLAGS_SUPPORT
 107         def_bool y
 108
 109 config RWSEM_XCHGADD_ALGORITHM
 110         def_bool y
 111
 112 config GENERIC_HWEIGHT
 113         def_bool y
 114
 115 config GENERIC_CSUM
 116         def_bool y
 117
 118 config GENERIC_CALIBRATE_DELAY
 119         def_bool y
 120
 121 config ZONE_DMA
 122         def_bool y
 123
 124 config HAVE_GENERIC_RCU_GUP
 125         def_bool y
 126
 127 config ARCH_DMA_ADDR_T_64BIT
 128         def_bool y
 129
 130 config NEED_DMA_MAP_STATE
 131         def_bool y
 132
 133 config NEED_SG_DMA_LENGTH
 134         def_bool y
 135
 136 config SWIOTLB
 137         def_bool y
 138
 139 config IOMMU_HELPER
 140         def_bool SWIOTLB
 141
 142 config KERNEL_MODE_NEON
 143         def_bool y
 144
 145 config FIX_EARLYCON_MEM
 146         def_bool y
 147
 148 config PGTABLE_LEVELS
 149         int
 150         default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 151         default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
 152         default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
 153         default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
 154
 155 source "init/Kconfig"
 156
 157 source "kernel/Kconfig.freezer"
 158
 159 menu "Platform selection"
 160
 161 config ARCH_EXYNOS
 162         bool
 163         help
 164           This enables support for Samsung Exynos SoC family
 165
 166 config ARCH_EXYNOS7
 167         bool "ARMv8 based Samsung Exynos7"
 168         select ARCH_EXYNOS
 169         select COMMON_CLK_SAMSUNG
 170         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 171         select HAVE_S3C_RTC if RTC_CLASS
 172         select PINCTRL
 173         select PINCTRL_EXYNOS
 174
 175         help
 176           This enables support for Samsung Exynos7 SoC family
 177
 178 config ARCH_FSL_LS2085A
 179         bool "Freescale LS2085A SOC"
 180         help
 181           This enables support for Freescale LS2085A SOC.
 182
 183 config ARCH_MEDIATEK
 184         bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
 185         select ARM_GIC
 186         select PINCTRL
 187         help
 188           Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
 189
 190 config ARCH_QCOM
 191         bool "Qualcomm Platforms"
 192         select PINCTRL
 193         help
 194           This enables support for the ARMv8 based Qualcomm chipsets.
 195
 196 config ARCH_SEATTLE
 197         bool "AMD Seattle SoC Family"
 198         help
 199           This enables support for AMD Seattle SOC Family
 200
 201 config ARCH_TEGRA
 202         bool "NVIDIA Tegra SoC Family"
 203         select ARCH_HAS_RESET_CONTROLLER
 204         select ARCH_REQUIRE_GPIOLIB
 205         select CLKDEV_LOOKUP
 206         select CLKSRC_MMIO
 207         select CLKSRC_OF
 208         select GENERIC_CLOCKEVENTS
 209         select HAVE_CLK
 210         select PINCTRL
 211         select RESET_CONTROLLER
 212         help
 213           This enables support for the NVIDIA Tegra SoC family.
 214
 215 config ARCH_TEGRA_132_SOC
 216         bool "NVIDIA Tegra132 SoC"
 217         depends on ARCH_TEGRA
 218         select PINCTRL_TEGRA124
 219         select USB_ULPI if USB_PHY
 220         select USB_ULPI_VIEWPORT if USB_PHY
 221         help
 222           Enable support for NVIDIA Tegra132 SoC, based on the Denver
 223           ARMv8 CPU.  The Tegra132 SoC is similar to the Tegra124 SoC,
 224           but contains an NVIDIA Denver CPU complex in place of
 225           Tegra124's "4+1" Cortex-A15 CPU complex.
 226
 227 config ARCH_SPRD
 228         bool "Spreadtrum SoC platform"
 229         help
 230           Support for Spreadtrum ARM based SoCs
 231
 232 config ARCH_THUNDER
 233         bool "Cavium Inc. Thunder SoC Family"
 234         help
 235           This enables support for Cavium's Thunder Family of SoCs.
 236
 237 config ARCH_VEXPRESS
 238         bool "ARMv8 software model (Versatile Express)"
 239         select ARCH_REQUIRE_GPIOLIB
 240         select COMMON_CLK_VERSATILE
 241         select POWER_RESET_VEXPRESS
 242         select VEXPRESS_CONFIG
 243         help
 244           This enables support for the ARMv8 software model (Versatile
 245           Express).
 246
 247 config ARCH_XGENE
 248         bool "AppliedMicro X-Gene SOC Family"
 249         help
 250           This enables support for AppliedMicro X-Gene SOC Family
 251
 252 config ARCH_ZYNQMP
 253         bool "Xilinx ZynqMP Family"
 254         help
 255           This enables support for Xilinx ZynqMP Family
 256
 257 endmenu
 258
 259 menu "Bus support"
 260
 261 config PCI
 262         bool "PCI support"
 263         help
 264           This feature enables support for PCI bus system. If you say Y
 265           here, the kernel will include drivers and infrastructure code
 266           to support PCI bus devices.
 267
 268 config PCI_DOMAINS
 269         def_bool PCI
 270
 271 config PCI_DOMAINS_GENERIC
 272         def_bool PCI
 273
 274 config PCI_SYSCALL
 275         def_bool PCI
 276
 277 source "drivers/pci/Kconfig"
 278 source "drivers/pci/pcie/Kconfig"
 279 source "drivers/pci/hotplug/Kconfig"
 280
 281 endmenu
 282
 283 menu "Kernel Features"
 284
 285 menu "ARM errata workarounds via the alternatives framework"
 286
 287 config ARM64_ERRATUM_826319
 288         bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
 289         default y
 290         help
 291           This option adds an alternative code sequence to work around ARM
 292           erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
 293           AXI master interface and an L2 cache.
 294
 295           If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
 296           and is unable to accept a certain write via this interface, it will
 297           not progress on read data presented on the read data channel and the
 298           system can deadlock.
 299
 300           The workaround promotes data cache clean instructions to
 301           data cache clean-and-invalidate.
 302           Please note that this does not necessarily enable the workaround,
 303           as it depends on the alternative framework, which will only patch
 304           the kernel if an affected CPU is detected.
 305
 306           If unsure, say Y.
 307
 308 config ARM64_ERRATUM_827319
 309         bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
 310         default y
 311         help
 312           This option adds an alternative code sequence to work around ARM
 313           erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
 314           master interface and an L2 cache.
 315
 316           Under certain conditions this erratum can cause a clean line eviction
 317           to occur at the same time as another transaction to the same address
 318           on the AMBA 5 CHI interface, which can cause data corruption if the
 319           interconnect reorders the two transactions.
 320
 321           The workaround promotes data cache clean instructions to
 322           data cache clean-and-invalidate.
 323           Please note that this does not necessarily enable the workaround,
 324           as it depends on the alternative framework, which will only patch
 325           the kernel if an affected CPU is detected.
 326
 327           If unsure, say Y.
 328
 329 config ARM64_ERRATUM_824069
 330         bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
 331         default y
 332         help
 333           This option adds an alternative code sequence to work around ARM
 334           erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
 335           to a coherent interconnect.
 336
 337           If a Cortex-A53 processor is executing a store or prefetch for
 338           write instruction at the same time as a processor in another
 339           cluster is executing a cache maintenance operation to the same
 340           address, then this erratum might cause a clean cache line to be
 341           incorrectly marked as dirty.
 342
 343           The workaround promotes data cache clean instructions to
 344           data cache clean-and-invalidate.
 345           Please note that this option does not necessarily enable the
 346           workaround, as it depends on the alternative framework, which will
 347           only patch the kernel if an affected CPU is detected.
 348
 349           If unsure, say Y.
 350
 351 config ARM64_ERRATUM_819472
 352         bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
 353         default y
 354         help
 355           This option adds an alternative code sequence to work around ARM
 356           erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
 357           present when it is connected to a coherent interconnect.
 358
 359           If the processor is executing a load and store exclusive sequence at
 360           the same time as a processor in another cluster is executing a cache
 361           maintenance operation to the same address, then this erratum might
 362           cause data corruption.
 363
 364           The workaround promotes data cache clean instructions to
 365           data cache clean-and-invalidate.
 366           Please note that this does not necessarily enable the workaround,
 367           as it depends on the alternative framework, which will only patch
 368           the kernel if an affected CPU is detected.
 369
 370           If unsure, say Y.
 371
 372 config ARM64_ERRATUM_832075
 373         bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
 374         default y
 375         help
 376           This option adds an alternative code sequence to work around ARM
 377           erratum 832075 on Cortex-A57 parts up to r1p2.
 378
 379           Affected Cortex-A57 parts might deadlock when exclusive load/store
 380           instructions to Write-Back memory are mixed with Device loads.
 381
 382           The workaround is to promote device loads to use Load-Acquire
 383           semantics.
 384           Please note that this does not necessarily enable the workaround,
 385           as it depends on the alternative framework, which will only patch
 386           the kernel if an affected CPU is detected.
 387
 388           If unsure, say Y.
 389
 390 config ARM64_ERRATUM_845719
 391         bool "Cortex-A53: 845719: a load might read incorrect data"
 392         depends on COMPAT
 393         default y
 394         help
 395           This option adds an alternative code sequence to work around ARM
 396           erratum 845719 on Cortex-A53 parts up to r0p4.
 397
 398           When running a compat (AArch32) userspace on an affected Cortex-A53
 399           part, a load at EL0 from a virtual address that matches the bottom 32
 400           bits of the virtual address used by a recent load at (AArch64) EL1
 401           might return incorrect data.
 402
 403           The workaround is to write the contextidr_el1 register on exception
 404           return to a 32-bit task.
 405           Please note that this does not necessarily enable the workaround,
 406           as it depends on the alternative framework, which will only patch
 407           the kernel if an affected CPU is detected.
 408
 409           If unsure, say Y.
 410
 411 endmenu
 412
 413
 414 choice
 415         prompt "Page size"
 416         default ARM64_4K_PAGES
 417         help
 418           Page size (translation granule) configuration.
 419
 420 config ARM64_4K_PAGES
 421         bool "4KB"
 422         help
 423           This feature enables 4KB pages support.
 424
 425 config ARM64_64K_PAGES
 426         bool "64KB"
 427         help
 428           This feature enables 64KB pages support (4KB by default)
 429           allowing only two levels of page tables and faster TLB
 430           look-up. AArch32 emulation is not available when this feature
 431           is enabled.
 432
 433 endchoice
 434
 435 choice
 436         prompt "Virtual address space size"
 437         default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 438         default ARM64_VA_BITS_42 if ARM64_64K_PAGES
 439         help
 440           Allows choosing one of multiple possible virtual address
 441           space sizes. The level of translation table is determined by
 442           a combination of page size and virtual address space size.
 443
 444 config ARM64_VA_BITS_39
 445         bool "39-bit"
 446         depends on ARM64_4K_PAGES
 447
 448 config ARM64_VA_BITS_42
 449         bool "42-bit"
 450         depends on ARM64_64K_PAGES
 451
 452 config ARM64_VA_BITS_48
 453         bool "48-bit"
 454
 455 endchoice
 456
 457 config ARM64_VA_BITS
 458         int
 459         default 39 if ARM64_VA_BITS_39
 460         default 42 if ARM64_VA_BITS_42
 461         default 48 if ARM64_VA_BITS_48
 462
 463 config CPU_BIG_ENDIAN
 464        bool "Build big-endian kernel"
 465        help
 466          Say Y if you plan on running a kernel in big-endian mode.
 467
 468 config SMP
 469         bool "Symmetric Multi-Processing"
 470         help
 471           This enables support for systems with more than one CPU.  If
 472           you say N here, the kernel will run on single and
 473           multiprocessor machines, but will use only one CPU of a
 474           multiprocessor machine. If you say Y here, the kernel will run
 475           on many, but not all, single processor machines. On a single
 476           processor machine, the kernel will run faster if you say N
 477           here.
 478
 479           If you don't know what to do here, say N.
 480
 481 config SCHED_MC
 482         bool "Multi-core scheduler support"
 483         depends on SMP
 484         help
 485           Multi-core scheduler support improves the CPU scheduler's decision
 486           making when dealing with multi-core CPU chips at a cost of slightly
 487           increased overhead in some places. If unsure say N here.
 488
 489 config SCHED_SMT
 490         bool "SMT scheduler support"
 491         depends on SMP
 492         help
 493           Improves the CPU scheduler's decision making when dealing with
 494           MultiThreading at a cost of slightly increased overhead in some
 495           places. If unsure say N here.
 496
 497 config NR_CPUS
 498         int "Maximum number of CPUs (2-4096)"
 499         range 2 4096
 500         depends on SMP
 501         # These have to remain sorted largest to smallest
 502         default "64"
 503
 504 config HOTPLUG_CPU
 505         bool "Support for hot-pluggable CPUs"
 506         depends on SMP
 507         help
 508           Say Y here to experiment with turning CPUs off and on.  CPUs
 509           can be controlled through /sys/devices/system/cpu.
 510
 511 source kernel/Kconfig.preempt
 512
 513 config UP_LATE_INIT
 514        def_bool y
 515        depends on !SMP
 516
 517 config HZ
 518         int
 519         default 100
 520
 521 config ARCH_HAS_HOLES_MEMORYMODEL
 522         def_bool y if SPARSEMEM
 523
 524 config ARCH_SPARSEMEM_ENABLE
 525         def_bool y
 526         select SPARSEMEM_VMEMMAP_ENABLE
 527
 528 config ARCH_SPARSEMEM_DEFAULT
 529         def_bool ARCH_SPARSEMEM_ENABLE
 530
 531 config ARCH_SELECT_MEMORY_MODEL
 532         def_bool ARCH_SPARSEMEM_ENABLE
 533
 534 config HAVE_ARCH_PFN_VALID
 535         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 536
 537 config HW_PERF_EVENTS
 538         bool "Enable hardware performance counter support for perf events"
 539         depends on PERF_EVENTS
 540         default y
 541         help
 542           Enable hardware performance counter support for perf events. If
 543           disabled, perf events will use software events only.
 544
 545 config SYS_SUPPORTS_HUGETLBFS
 546         def_bool y
 547
 548 config ARCH_WANT_GENERAL_HUGETLB
 549         def_bool y
 550
 551 config ARCH_WANT_HUGE_PMD_SHARE
 552         def_bool y if !ARM64_64K_PAGES
 553
 554 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
 555         def_bool y
 556
 557 config ARCH_HAS_CACHE_LINE_SIZE
 558         def_bool y
 559
 560 source "mm/Kconfig"
 561
 562 config SECCOMP
 563         bool "Enable seccomp to safely compute untrusted bytecode"
 564         ---help---
 565           This kernel feature is useful for number crunching applications
 566           that may need to compute untrusted bytecode during their
 567           execution. By using pipes or other transports made available to
 568           the process as file descriptors supporting the read/write
 569           syscalls, it's possible to isolate those applications in
 570           their own address space using seccomp. Once seccomp is
 571           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
 572           and the task is only allowed to execute a few safe syscalls
 573           defined by each seccomp mode.
 574
 575 config XEN_DOM0
 576         def_bool y
 577         depends on XEN
 578
 579 config XEN
 580         bool "Xen guest support on ARM64"
 581         depends on ARM64 && OF
 582         select SWIOTLB_XEN
 583         help
 584           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
 585
 586 config FORCE_MAX_ZONEORDER
 587         int
 588         default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 589         default "11"
 590
 591 menuconfig ARMV8_DEPRECATED
 592         bool "Emulate deprecated/obsolete ARMv8 instructions"
 593         depends on COMPAT
 594         help
 595           Legacy software support may require certain instructions
 596           that have been deprecated or obsoleted in the architecture.
 597
 598           Enable this config to enable selective emulation of these
 599           features.
 600
 601           If unsure, say Y
 602
 603 if ARMV8_DEPRECATED
 604
 605 config SWP_EMULATION
 606         bool "Emulate SWP/SWPB instructions"
 607         help
 608           ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
 609           they are always undefined. Say Y here to enable software
 610           emulation of these instructions for userspace using LDXR/STXR.
 611
 612           In some older versions of glibc [<=2.8] SWP is used during futex
 613           trylock() operations with the assumption that the code will not
 614           be preempted. This invalid assumption may be more likely to fail
 615           with SWP emulation enabled, leading to deadlock of the user
 616           application.
 617
 618           NOTE: when accessing uncached shared regions, LDXR/STXR rely
 619           on an external transaction monitoring block called a global
 620           monitor to maintain update atomicity. If your system does not
 621           implement a global monitor, this option can cause programs that
 622           perform SWP operations to uncached memory to deadlock.
 623
 624           If unsure, say Y
 625
 626 config CP15_BARRIER_EMULATION
 627         bool "Emulate CP15 Barrier instructions"
 628         help
 629           The CP15 barrier instructions - CP15ISB, CP15DSB, and
 630           CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
 631           strongly recommended to use the ISB, DSB, and DMB
 632           instructions instead.
 633
 634           Say Y here to enable software emulation of these
 635           instructions for AArch32 userspace code. When this option is
 636           enabled, CP15 barrier usage is traced which can help
 637           identify software that needs updating.
 638
 639           If unsure, say Y
 640
 641 config SETEND_EMULATION
 642         bool "Emulate SETEND instruction"
 643         help
 644           The SETEND instruction alters the data-endianness of the
 645           AArch32 EL0, and is deprecated in ARMv8.
 646
 647           Say Y here to enable software emulation of the instruction
 648           for AArch32 userspace code.
 649
 650           Note: All the cpus on the system must have mixed endian support at EL0
 651           for this feature to be enabled. If a new CPU - which doesn't support mixed
 652           endian - is hotplugged in after this feature has been enabled, there could
 653           be unexpected results in the applications.
 654
 655           If unsure, say Y
 656 endif
 657
 658 endmenu
 659
 660 menu "Boot options"
 661
 662 config CMDLINE
 663         string "Default kernel command string"
 664         default ""
 665         help
 666           Provide a set of default command-line options at build time by
 667           entering them here. As a minimum, you should specify the the
 668           root device (e.g. root=/dev/nfs).
 669
 670 config CMDLINE_FORCE
 671         bool "Always use the default kernel command string"
 672         help
 673           Always use the default kernel command string, even if the boot
 674           loader passes other arguments to the kernel.
 675           This is useful if you cannot or don't want to change the
 676           command-line options your boot loader passes to the kernel.
 677
 678 config EFI_STUB
 679         bool
 680
 681 config EFI
 682         bool "UEFI runtime support"
 683         depends on OF && !CPU_BIG_ENDIAN
 684         select LIBFDT
 685         select UCS2_STRING
 686         select EFI_PARAMS_FROM_FDT
 687         select EFI_RUNTIME_WRAPPERS
 688         select EFI_STUB
 689         select EFI_ARMSTUB
 690         default y
 691         help
 692           This option provides support for runtime services provided
 693           by UEFI firmware (such as non-volatile variables, realtime
 694           clock, and platform reset). A UEFI stub is also provided to
 695           allow the kernel to be booted as an EFI application. This
 696           is only useful on systems that have UEFI firmware.
 697
 698 config DMI
 699         bool "Enable support for SMBIOS (DMI) tables"
 700         depends on EFI
 701         default y
 702         help
 703           This enables SMBIOS/DMI feature for systems.
 704
 705           This option is only useful on systems that have UEFI firmware.
 706           However, even with this option, the resultant kernel should
 707           continue to boot on existing non-UEFI platforms.
 708
 709 endmenu
 710
 711 menu "Userspace binary formats"
 712
 713 source "fs/Kconfig.binfmt"
 714
 715 config COMPAT
 716         bool "Kernel support for 32-bit EL0"
 717         depends on !ARM64_64K_PAGES || EXPERT
 718         select COMPAT_BINFMT_ELF
 719         select HAVE_UID16
 720         select OLD_SIGSUSPEND3
 721         select COMPAT_OLD_SIGACTION
 722         help
 723           This option enables support for a 32-bit EL0 running under a 64-bit
 724           kernel at EL1. AArch32-specific components such as system calls,
 725           the user helper functions, VFP support and the ptrace interface are
 726           handled appropriately by the kernel.
 727
 728           If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
 729           will only be able to execute AArch32 binaries that were compiled with
 730           64k aligned segments.
 731
 732           If you want to execute 32-bit userspace applications, say Y.
 733
 734 config SYSVIPC_COMPAT
 735         def_bool y
 736         depends on COMPAT && SYSVIPC
 737
 738 endmenu
 739
 740 menu "Power management options"
 741
 742 source "kernel/power/Kconfig"
 743
 744 config ARCH_SUSPEND_POSSIBLE
 745         def_bool y
 746
 747 endmenu
 748
 749 menu "CPU Power Management"
 750
 751 source "drivers/cpuidle/Kconfig"
 752
 753 source "drivers/cpufreq/Kconfig"
 754
 755 endmenu
 756
 757 source "net/Kconfig"
 758
 759 source "drivers/Kconfig"
 760
 761 source "drivers/firmware/Kconfig"
 762
 763 source "drivers/acpi/Kconfig"
 764
 765 source "fs/Kconfig"
 766
 767 source "arch/arm64/kvm/Kconfig"
 768
 769 source "arch/arm64/Kconfig.debug"
 770
 771 source "security/Kconfig"
 772
 773 source "crypto/Kconfig"
 774 if CRYPTO
 775 source "arch/arm64/crypto/Kconfig"
 776 endif
 777
 778 source "lib/Kconfig"