arch/arm64/Kconfig

   1 config ARM64
   2         def_bool y
   3         select ACPI_CCA_REQUIRED if ACPI
   4         select ACPI_GENERIC_GSI if ACPI
   5         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
   6         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   7         select ARCH_HAS_ELF_RANDOMIZE
   8         select ARCH_HAS_GCOV_PROFILE_ALL
   9         select ARCH_HAS_SG_CHAIN
  10         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  11         select ARCH_USE_CMPXCHG_LOCKREF
  12         select ARCH_SUPPORTS_ATOMIC_RMW
  13         select ARCH_WANT_OPTIONAL_GPIOLIB
  14         select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  15         select ARCH_WANT_FRAME_POINTERS
  16         select ARM_AMBA
  17         select ARM_ARCH_TIMER
  18         select ARM_GIC
  19         select AUDIT_ARCH_COMPAT_GENERIC
  20         select ARM_GIC_V2M if PCI_MSI
  21         select ARM_GIC_V3
  22         select ARM_GIC_V3_ITS if PCI_MSI
  23         select BUILDTIME_EXTABLE_SORT
  24         select CLONE_BACKWARDS
  25         select COMMON_CLK
  26         select CPU_PM if (SUSPEND || CPU_IDLE)
  27         select DCACHE_WORD_ACCESS
  28         select EDAC_SUPPORT
  29         select GENERIC_ALLOCATOR
  30         select GENERIC_CLOCKEVENTS
  31         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  32         select GENERIC_CPU_AUTOPROBE
  33         select GENERIC_EARLY_IOREMAP
  34         select GENERIC_IRQ_PROBE
  35         select GENERIC_IRQ_SHOW
  36         select GENERIC_IRQ_SHOW_LEVEL
  37         select GENERIC_PCI_IOMAP
  38         select GENERIC_SCHED_CLOCK
  39         select GENERIC_SMP_IDLE_THREAD
  40         select GENERIC_STRNCPY_FROM_USER
  41         select GENERIC_STRNLEN_USER
  42         select GENERIC_TIME_VSYSCALL
  43         select HANDLE_DOMAIN_IRQ
  44         select HARDIRQS_SW_RESEND
  45         select HAVE_ALIGNED_STRUCT_PAGE if SLUB
  46         select HAVE_ARCH_AUDITSYSCALL
  47         select HAVE_ARCH_BITREVERSE
  48         select HAVE_ARCH_JUMP_LABEL
  49         select HAVE_ARCH_KGDB
  50         select HAVE_ARCH_SECCOMP_FILTER
  51         select HAVE_ARCH_TRACEHOOK
  52         select HAVE_BPF_JIT
  53         select HAVE_C_RECORDMCOUNT
  54         select HAVE_CC_STACKPROTECTOR
  55         select HAVE_CMPXCHG_DOUBLE
  56         select HAVE_DEBUG_BUGVERBOSE
  57         select HAVE_DEBUG_KMEMLEAK
  58         select HAVE_DMA_API_DEBUG
  59         select HAVE_DMA_ATTRS
  60         select HAVE_DMA_CONTIGUOUS
  61         select HAVE_DYNAMIC_FTRACE
  62         select HAVE_EFFICIENT_UNALIGNED_ACCESS
  63         select HAVE_FTRACE_MCOUNT_RECORD
  64         select HAVE_FUNCTION_TRACER
  65         select HAVE_FUNCTION_GRAPH_TRACER
  66         select HAVE_GENERIC_DMA_COHERENT
  67         select HAVE_HW_BREAKPOINT if PERF_EVENTS
  68         select HAVE_MEMBLOCK
  69         select HAVE_PATA_PLATFORM
  70         select HAVE_PERF_EVENTS
  71         select HAVE_PERF_REGS
  72         select HAVE_PERF_USER_STACK_DUMP
  73         select HAVE_RCU_TABLE_FREE
  74         select HAVE_SYSCALL_TRACEPOINTS
  75         select IRQ_DOMAIN
  76         select IRQ_FORCED_THREADING
  77         select MODULES_USE_ELF_RELA
  78         select NO_BOOTMEM
  79         select OF
  80         select OF_EARLY_FLATTREE
  81         select OF_RESERVED_MEM
  82         select PERF_USE_VMALLOC
  83         select POWER_RESET
  84         select POWER_SUPPLY
  85         select RTC_LIB
  86         select SPARSE_IRQ
  87         select SYSCTL_EXCEPTION_TRACE
  88         select HAVE_CONTEXT_TRACKING
  89         help
  90           ARM 64-bit (AArch64) Linux support.
  91
  92 config 64BIT
  93         def_bool y
  94
  95 config ARCH_PHYS_ADDR_T_64BIT
  96         def_bool y
  97
  98 config MMU
  99         def_bool y
 100
 101 config NO_IOPORT_MAP
 102         def_bool y if !PCI
 103
 104 config STACKTRACE_SUPPORT
 105         def_bool y
 106
 107 config LOCKDEP_SUPPORT
 108         def_bool y
 109
 110 config TRACE_IRQFLAGS_SUPPORT
 111         def_bool y
 112
 113 config RWSEM_XCHGADD_ALGORITHM
 114         def_bool y
 115
 116 config GENERIC_HWEIGHT
 117         def_bool y
 118
 119 config GENERIC_CSUM
 120         def_bool y
 121
 122 config GENERIC_CALIBRATE_DELAY
 123         def_bool y
 124
 125 config ZONE_DMA
 126         def_bool y
 127
 128 config HAVE_GENERIC_RCU_GUP
 129         def_bool y
 130
 131 config ARCH_DMA_ADDR_T_64BIT
 132         def_bool y
 133
 134 config NEED_DMA_MAP_STATE
 135         def_bool y
 136
 137 config NEED_SG_DMA_LENGTH
 138         def_bool y
 139
 140 config SWIOTLB
 141         def_bool y
 142
 143 config IOMMU_HELPER
 144         def_bool SWIOTLB
 145
 146 config KERNEL_MODE_NEON
 147         def_bool y
 148
 149 config FIX_EARLYCON_MEM
 150         def_bool y
 151
 152 config PGTABLE_LEVELS
 153         int
 154         default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 155         default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
 156         default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
 157         default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
 158
 159 source "init/Kconfig"
 160
 161 source "kernel/Kconfig.freezer"
 162
 163 source "arch/arm64/Kconfig.platforms"
 164
 165 menu "Bus support"
 166
 167 config PCI
 168         bool "PCI support"
 169         help
 170           This feature enables support for PCI bus system. If you say Y
 171           here, the kernel will include drivers and infrastructure code
 172           to support PCI bus devices.
 173
 174 config PCI_DOMAINS
 175         def_bool PCI
 176
 177 config PCI_DOMAINS_GENERIC
 178         def_bool PCI
 179
 180 config PCI_SYSCALL
 181         def_bool PCI
 182
 183 source "drivers/pci/Kconfig"
 184 source "drivers/pci/pcie/Kconfig"
 185 source "drivers/pci/hotplug/Kconfig"
 186
 187 endmenu
 188
 189 menu "Kernel Features"
 190
 191 menu "ARM errata workarounds via the alternatives framework"
 192
 193 config ARM64_ERRATUM_826319
 194         bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
 195         default y
 196         help
 197           This option adds an alternative code sequence to work around ARM
 198           erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
 199           AXI master interface and an L2 cache.
 200
 201           If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
 202           and is unable to accept a certain write via this interface, it will
 203           not progress on read data presented on the read data channel and the
 204           system can deadlock.
 205
 206           The workaround promotes data cache clean instructions to
 207           data cache clean-and-invalidate.
 208           Please note that this does not necessarily enable the workaround,
 209           as it depends on the alternative framework, which will only patch
 210           the kernel if an affected CPU is detected.
 211
 212           If unsure, say Y.
 213
 214 config ARM64_ERRATUM_827319
 215         bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
 216         default y
 217         help
 218           This option adds an alternative code sequence to work around ARM
 219           erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
 220           master interface and an L2 cache.
 221
 222           Under certain conditions this erratum can cause a clean line eviction
 223           to occur at the same time as another transaction to the same address
 224           on the AMBA 5 CHI interface, which can cause data corruption if the
 225           interconnect reorders the two transactions.
 226
 227           The workaround promotes data cache clean instructions to
 228           data cache clean-and-invalidate.
 229           Please note that this does not necessarily enable the workaround,
 230           as it depends on the alternative framework, which will only patch
 231           the kernel if an affected CPU is detected.
 232
 233           If unsure, say Y.
 234
 235 config ARM64_ERRATUM_824069
 236         bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
 237         default y
 238         help
 239           This option adds an alternative code sequence to work around ARM
 240           erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
 241           to a coherent interconnect.
 242
 243           If a Cortex-A53 processor is executing a store or prefetch for
 244           write instruction at the same time as a processor in another
 245           cluster is executing a cache maintenance operation to the same
 246           address, then this erratum might cause a clean cache line to be
 247           incorrectly marked as dirty.
 248
 249           The workaround promotes data cache clean instructions to
 250           data cache clean-and-invalidate.
 251           Please note that this option does not necessarily enable the
 252           workaround, as it depends on the alternative framework, which will
 253           only patch the kernel if an affected CPU is detected.
 254
 255           If unsure, say Y.
 256
 257 config ARM64_ERRATUM_819472
 258         bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
 259         default y
 260         help
 261           This option adds an alternative code sequence to work around ARM
 262           erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
 263           present when it is connected to a coherent interconnect.
 264
 265           If the processor is executing a load and store exclusive sequence at
 266           the same time as a processor in another cluster is executing a cache
 267           maintenance operation to the same address, then this erratum might
 268           cause data corruption.
 269
 270           The workaround promotes data cache clean instructions to
 271           data cache clean-and-invalidate.
 272           Please note that this does not necessarily enable the workaround,
 273           as it depends on the alternative framework, which will only patch
 274           the kernel if an affected CPU is detected.
 275
 276           If unsure, say Y.
 277
 278 config ARM64_ERRATUM_832075
 279         bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
 280         default y
 281         help
 282           This option adds an alternative code sequence to work around ARM
 283           erratum 832075 on Cortex-A57 parts up to r1p2.
 284
 285           Affected Cortex-A57 parts might deadlock when exclusive load/store
 286           instructions to Write-Back memory are mixed with Device loads.
 287
 288           The workaround is to promote device loads to use Load-Acquire
 289           semantics.
 290           Please note that this does not necessarily enable the workaround,
 291           as it depends on the alternative framework, which will only patch
 292           the kernel if an affected CPU is detected.
 293
 294           If unsure, say Y.
 295
 296 config ARM64_ERRATUM_845719
 297         bool "Cortex-A53: 845719: a load might read incorrect data"
 298         depends on COMPAT
 299         default y
 300         help
 301           This option adds an alternative code sequence to work around ARM
 302           erratum 845719 on Cortex-A53 parts up to r0p4.
 303
 304           When running a compat (AArch32) userspace on an affected Cortex-A53
 305           part, a load at EL0 from a virtual address that matches the bottom 32
 306           bits of the virtual address used by a recent load at (AArch64) EL1
 307           might return incorrect data.
 308
 309           The workaround is to write the contextidr_el1 register on exception
 310           return to a 32-bit task.
 311           Please note that this does not necessarily enable the workaround,
 312           as it depends on the alternative framework, which will only patch
 313           the kernel if an affected CPU is detected.
 314
 315           If unsure, say Y.
 316
 317 endmenu
 318
 319
 320 choice
 321         prompt "Page size"
 322         default ARM64_4K_PAGES
 323         help
 324           Page size (translation granule) configuration.
 325
 326 config ARM64_4K_PAGES
 327         bool "4KB"
 328         help
 329           This feature enables 4KB pages support.
 330
 331 config ARM64_64K_PAGES
 332         bool "64KB"
 333         help
 334           This feature enables 64KB pages support (4KB by default)
 335           allowing only two levels of page tables and faster TLB
 336           look-up. AArch32 emulation is not available when this feature
 337           is enabled.
 338
 339 endchoice
 340
 341 choice
 342         prompt "Virtual address space size"
 343         default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 344         default ARM64_VA_BITS_42 if ARM64_64K_PAGES
 345         help
 346           Allows choosing one of multiple possible virtual address
 347           space sizes. The level of translation table is determined by
 348           a combination of page size and virtual address space size.
 349
 350 config ARM64_VA_BITS_39
 351         bool "39-bit"
 352         depends on ARM64_4K_PAGES
 353
 354 config ARM64_VA_BITS_42
 355         bool "42-bit"
 356         depends on ARM64_64K_PAGES
 357
 358 config ARM64_VA_BITS_48
 359         bool "48-bit"
 360
 361 endchoice
 362
 363 config ARM64_VA_BITS
 364         int
 365         default 39 if ARM64_VA_BITS_39
 366         default 42 if ARM64_VA_BITS_42
 367         default 48 if ARM64_VA_BITS_48
 368
 369 config CPU_BIG_ENDIAN
 370        bool "Build big-endian kernel"
 371        help
 372          Say Y if you plan on running a kernel in big-endian mode.
 373
 374 config SMP
 375         bool "Symmetric Multi-Processing"
 376         help
 377           This enables support for systems with more than one CPU.  If
 378           you say N here, the kernel will run on single and
 379           multiprocessor machines, but will use only one CPU of a
 380           multiprocessor machine. If you say Y here, the kernel will run
 381           on many, but not all, single processor machines. On a single
 382           processor machine, the kernel will run faster if you say N
 383           here.
 384
 385           If you don't know what to do here, say N.
 386
 387 config SCHED_MC
 388         bool "Multi-core scheduler support"
 389         depends on SMP
 390         help
 391           Multi-core scheduler support improves the CPU scheduler's decision
 392           making when dealing with multi-core CPU chips at a cost of slightly
 393           increased overhead in some places. If unsure say N here.
 394
 395 config SCHED_SMT
 396         bool "SMT scheduler support"
 397         depends on SMP
 398         help
 399           Improves the CPU scheduler's decision making when dealing with
 400           MultiThreading at a cost of slightly increased overhead in some
 401           places. If unsure say N here.
 402
 403 config NR_CPUS
 404         int "Maximum number of CPUs (2-4096)"
 405         range 2 4096
 406         depends on SMP
 407         # These have to remain sorted largest to smallest
 408         default "64"
 409
 410 config HOTPLUG_CPU
 411         bool "Support for hot-pluggable CPUs"
 412         depends on SMP
 413         help
 414           Say Y here to experiment with turning CPUs off and on.  CPUs
 415           can be controlled through /sys/devices/system/cpu.
 416
 417 source kernel/Kconfig.preempt
 418
 419 config UP_LATE_INIT
 420        def_bool y
 421        depends on !SMP
 422
 423 config HZ
 424         int
 425         default 100
 426
 427 config ARCH_HAS_HOLES_MEMORYMODEL
 428         def_bool y if SPARSEMEM
 429
 430 config ARCH_SPARSEMEM_ENABLE
 431         def_bool y
 432         select SPARSEMEM_VMEMMAP_ENABLE
 433
 434 config ARCH_SPARSEMEM_DEFAULT
 435         def_bool ARCH_SPARSEMEM_ENABLE
 436
 437 config ARCH_SELECT_MEMORY_MODEL
 438         def_bool ARCH_SPARSEMEM_ENABLE
 439
 440 config HAVE_ARCH_PFN_VALID
 441         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 442
 443 config HW_PERF_EVENTS
 444         bool "Enable hardware performance counter support for perf events"
 445         depends on PERF_EVENTS
 446         default y
 447         help
 448           Enable hardware performance counter support for perf events. If
 449           disabled, perf events will use software events only.
 450
 451 config SYS_SUPPORTS_HUGETLBFS
 452         def_bool y
 453
 454 config ARCH_WANT_GENERAL_HUGETLB
 455         def_bool y
 456
 457 config ARCH_WANT_HUGE_PMD_SHARE
 458         def_bool y if !ARM64_64K_PAGES
 459
 460 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
 461         def_bool y
 462
 463 config ARCH_HAS_CACHE_LINE_SIZE
 464         def_bool y
 465
 466 source "mm/Kconfig"
 467
 468 config SECCOMP
 469         bool "Enable seccomp to safely compute untrusted bytecode"
 470         ---help---
 471           This kernel feature is useful for number crunching applications
 472           that may need to compute untrusted bytecode during their
 473           execution. By using pipes or other transports made available to
 474           the process as file descriptors supporting the read/write
 475           syscalls, it's possible to isolate those applications in
 476           their own address space using seccomp. Once seccomp is
 477           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
 478           and the task is only allowed to execute a few safe syscalls
 479           defined by each seccomp mode.
 480
 481 config XEN_DOM0
 482         def_bool y
 483         depends on XEN
 484
 485 config XEN
 486         bool "Xen guest support on ARM64"
 487         depends on ARM64 && OF
 488         select SWIOTLB_XEN
 489         help
 490           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
 491
 492 config FORCE_MAX_ZONEORDER
 493         int
 494         default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 495         default "11"
 496
 497 menuconfig ARMV8_DEPRECATED
 498         bool "Emulate deprecated/obsolete ARMv8 instructions"
 499         depends on COMPAT
 500         help
 501           Legacy software support may require certain instructions
 502           that have been deprecated or obsoleted in the architecture.
 503
 504           Enable this config to enable selective emulation of these
 505           features.
 506
 507           If unsure, say Y
 508
 509 if ARMV8_DEPRECATED
 510
 511 config SWP_EMULATION
 512         bool "Emulate SWP/SWPB instructions"
 513         help
 514           ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
 515           they are always undefined. Say Y here to enable software
 516           emulation of these instructions for userspace using LDXR/STXR.
 517
 518           In some older versions of glibc [<=2.8] SWP is used during futex
 519           trylock() operations with the assumption that the code will not
 520           be preempted. This invalid assumption may be more likely to fail
 521           with SWP emulation enabled, leading to deadlock of the user
 522           application.
 523
 524           NOTE: when accessing uncached shared regions, LDXR/STXR rely
 525           on an external transaction monitoring block called a global
 526           monitor to maintain update atomicity. If your system does not
 527           implement a global monitor, this option can cause programs that
 528           perform SWP operations to uncached memory to deadlock.
 529
 530           If unsure, say Y
 531
 532 config CP15_BARRIER_EMULATION
 533         bool "Emulate CP15 Barrier instructions"
 534         help
 535           The CP15 barrier instructions - CP15ISB, CP15DSB, and
 536           CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
 537           strongly recommended to use the ISB, DSB, and DMB
 538           instructions instead.
 539
 540           Say Y here to enable software emulation of these
 541           instructions for AArch32 userspace code. When this option is
 542           enabled, CP15 barrier usage is traced which can help
 543           identify software that needs updating.
 544
 545           If unsure, say Y
 546
 547 config SETEND_EMULATION
 548         bool "Emulate SETEND instruction"
 549         help
 550           The SETEND instruction alters the data-endianness of the
 551           AArch32 EL0, and is deprecated in ARMv8.
 552
 553           Say Y here to enable software emulation of the instruction
 554           for AArch32 userspace code.
 555
 556           Note: All the cpus on the system must have mixed endian support at EL0
 557           for this feature to be enabled. If a new CPU - which doesn't support mixed
 558           endian - is hotplugged in after this feature has been enabled, there could
 559           be unexpected results in the applications.
 560
 561           If unsure, say Y
 562 endif
 563
 564 endmenu
 565
 566 menu "Boot options"
 567
 568 config CMDLINE
 569         string "Default kernel command string"
 570         default ""
 571         help
 572           Provide a set of default command-line options at build time by
 573           entering them here. As a minimum, you should specify the the
 574           root device (e.g. root=/dev/nfs).
 575
 576 config CMDLINE_FORCE
 577         bool "Always use the default kernel command string"
 578         help
 579           Always use the default kernel command string, even if the boot
 580           loader passes other arguments to the kernel.
 581           This is useful if you cannot or don't want to change the
 582           command-line options your boot loader passes to the kernel.
 583
 584 config EFI_STUB
 585         bool
 586
 587 config EFI
 588         bool "UEFI runtime support"
 589         depends on OF && !CPU_BIG_ENDIAN
 590         select LIBFDT
 591         select UCS2_STRING
 592         select EFI_PARAMS_FROM_FDT
 593         select EFI_RUNTIME_WRAPPERS
 594         select EFI_STUB
 595         select EFI_ARMSTUB
 596         default y
 597         help
 598           This option provides support for runtime services provided
 599           by UEFI firmware (such as non-volatile variables, realtime
 600           clock, and platform reset). A UEFI stub is also provided to
 601           allow the kernel to be booted as an EFI application. This
 602           is only useful on systems that have UEFI firmware.
 603
 604 config DMI
 605         bool "Enable support for SMBIOS (DMI) tables"
 606         depends on EFI
 607         default y
 608         help
 609           This enables SMBIOS/DMI feature for systems.
 610
 611           This option is only useful on systems that have UEFI firmware.
 612           However, even with this option, the resultant kernel should
 613           continue to boot on existing non-UEFI platforms.
 614
 615 endmenu
 616
 617 menu "Userspace binary formats"
 618
 619 source "fs/Kconfig.binfmt"
 620
 621 config COMPAT
 622         bool "Kernel support for 32-bit EL0"
 623         depends on !ARM64_64K_PAGES || EXPERT
 624         select COMPAT_BINFMT_ELF
 625         select HAVE_UID16
 626         select OLD_SIGSUSPEND3
 627         select COMPAT_OLD_SIGACTION
 628         help
 629           This option enables support for a 32-bit EL0 running under a 64-bit
 630           kernel at EL1. AArch32-specific components such as system calls,
 631           the user helper functions, VFP support and the ptrace interface are
 632           handled appropriately by the kernel.
 633
 634           If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
 635           will only be able to execute AArch32 binaries that were compiled with
 636           64k aligned segments.
 637
 638           If you want to execute 32-bit userspace applications, say Y.
 639
 640 config SYSVIPC_COMPAT
 641         def_bool y
 642         depends on COMPAT && SYSVIPC
 643
 644 endmenu
 645
 646 menu "Power management options"
 647
 648 source "kernel/power/Kconfig"
 649
 650 config ARCH_SUSPEND_POSSIBLE
 651         def_bool y
 652
 653 endmenu
 654
 655 menu "CPU Power Management"
 656
 657 source "drivers/cpuidle/Kconfig"
 658
 659 source "drivers/cpufreq/Kconfig"
 660
 661 endmenu
 662
 663 source "net/Kconfig"
 664
 665 source "drivers/Kconfig"
 666
 667 source "drivers/firmware/Kconfig"
 668
 669 source "drivers/acpi/Kconfig"
 670
 671 source "fs/Kconfig"
 672
 673 source "arch/arm64/kvm/Kconfig"
 674
 675 source "arch/arm64/Kconfig.debug"
 676
 677 source "security/Kconfig"
 678
 679 source "crypto/Kconfig"
 680 if CRYPTO
 681 source "arch/arm64/crypto/Kconfig"
 682 endif
 683
 684 source "lib/Kconfig"