2 * Copyright Altera Corporation (C) 2015. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
20 compatible = "altr,socfpga-stratix10";
29 compatible = "arm,cortex-a53", "arm,armv8";
31 enable-method = "psci";
36 compatible = "arm,cortex-a53", "arm,armv8";
38 enable-method = "psci";
43 compatible = "arm,cortex-a53", "arm,armv8";
45 enable-method = "psci";
50 compatible = "arm,cortex-a53", "arm,armv8";
52 enable-method = "psci";
58 compatible = "arm,armv8-pmuv3";
59 interrupts = <0 120 8>,
63 interrupt-affinity = <&cpu0>,
70 compatible = "arm,psci-0.2";
75 compatible = "arm,gic-400", "arm,cortex-a15-gic";
76 #interrupt-cells = <3>;
78 reg = <0x0 0xfffc1000 0x1000>,
79 <0x0 0xfffc2000 0x2000>,
80 <0x0 0xfffc4000 0x2000>,
81 <0x0 0xfffc6000 0x2000>;
87 compatible = "simple-bus";
89 interrupt-parent = <&intc>;
90 ranges = <0 0 0 0xffffffff>;
93 compatible = "altr,clk-mgr";
94 reg = <0xffd10000 0x1000>;
97 gmac0: ethernet@ff800000 {
98 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
99 reg = <0xff800000 0x2000>;
100 interrupts = <0 90 4>;
101 interrupt-names = "macirq";
102 mac-address = [00 00 00 00 00 00];
106 gmac1: ethernet@ff802000 {
107 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
108 reg = <0xff802000 0x2000>;
109 interrupts = <0 91 4>;
110 interrupt-names = "macirq";
111 mac-address = [00 00 00 00 00 00];
115 gmac2: ethernet@ff804000 {
116 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
117 reg = <0xff804000 0x2000>;
118 interrupts = <0 92 4>;
119 interrupt-names = "macirq";
120 mac-address = [00 00 00 00 00 00];
124 gpio0: gpio@ffc03200 {
125 #address-cells = <1>;
127 compatible = "snps,dw-apb-gpio";
128 reg = <0xffc03200 0x100>;
131 porta: gpio-controller@0 {
132 compatible = "snps,dw-apb-gpio-port";
135 snps,nr-gpios = <24>;
137 interrupt-controller;
138 #interrupt-cells = <2>;
139 interrupts = <0 110 4>;
143 gpio1: gpio@ffc03300 {
144 #address-cells = <1>;
146 compatible = "snps,dw-apb-gpio";
147 reg = <0xffc03300 0x100>;
150 portb: gpio-controller@0 {
151 compatible = "snps,dw-apb-gpio-port";
154 snps,nr-gpios = <24>;
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 interrupts = <0 110 4>;
163 #address-cells = <1>;
165 compatible = "snps,designware-i2c";
166 reg = <0xffc02800 0x100>;
167 interrupts = <0 103 4>;
172 #address-cells = <1>;
174 compatible = "snps,designware-i2c";
175 reg = <0xffc02900 0x100>;
176 interrupts = <0 104 4>;
181 #address-cells = <1>;
183 compatible = "snps,designware-i2c";
184 reg = <0xffc02a00 0x100>;
185 interrupts = <0 105 4>;
190 #address-cells = <1>;
192 compatible = "snps,designware-i2c";
193 reg = <0xffc02b00 0x100>;
194 interrupts = <0 106 4>;
199 #address-cells = <1>;
201 compatible = "snps,designware-i2c";
202 reg = <0xffc02c00 0x100>;
203 interrupts = <0 107 4>;
207 mmc: dwmmc0@ff808000 {
208 #address-cells = <1>;
210 compatible = "altr,socfpga-dw-mshc";
211 reg = <0xff808000 0x1000>;
212 interrupts = <0 96 4>;
213 fifo-depth = <0x400>;
217 ocram: sram@ffe00000 {
218 compatible = "mmio-sram";
219 reg = <0xffe00000 0x100000>;
222 rst: rstmgr@ffd11000 {
224 compatible = "altr,rst-mgr";
225 reg = <0xffd11000 0x1000>;
229 compatible = "snps,dw-apb-ssi";
230 #address-cells = <1>;
232 reg = <0xffda4000 0x1000>;
233 interrupts = <0 101 4>;
234 num-chipselect = <4>;
240 compatible = "snps,dw-apb-ssi";
241 #address-cells = <1>;
243 reg = <0xffda5000 0x1000>;
244 interrupts = <0 102 4>;
245 num-chipselect = <4>;
250 sysmgr: sysmgr@ffd12000 {
251 compatible = "altr,sys-mgr", "syscon";
252 reg = <0xffd12000 0x1000>;
257 compatible = "arm,armv8-timer";
258 interrupts = <1 13 0xf01>,
264 timer0: timer0@ffc03000 {
265 compatible = "snps,dw-apb-timer";
266 interrupts = <0 113 4>;
267 reg = <0xffc03000 0x100>;
270 timer1: timer1@ffc03100 {
271 compatible = "snps,dw-apb-timer";
272 interrupts = <0 114 4>;
273 reg = <0xffc03100 0x100>;
276 timer2: timer2@ffd00000 {
277 compatible = "snps,dw-apb-timer";
278 interrupts = <0 115 4>;
279 reg = <0xffd00000 0x100>;
282 timer3: timer3@ffd00100 {
283 compatible = "snps,dw-apb-timer";
284 interrupts = <0 116 4>;
285 reg = <0xffd00100 0x100>;
288 uart0: serial0@ffc02000 {
289 compatible = "snps,dw-apb-uart";
290 reg = <0xffc02000 0x100>;
291 interrupts = <0 108 4>;
297 uart1: serial1@ffc02100 {
298 compatible = "snps,dw-apb-uart";
299 reg = <0xffc02100 0x100>;
300 interrupts = <0 109 4>;
308 compatible = "usb-nop-xceiv";
313 compatible = "snps,dwc2";
314 reg = <0xffb00000 0x40000>;
315 interrupts = <0 93 4>;
317 phy-names = "usb2-phy";
322 compatible = "snps,dwc2";
323 reg = <0xffb40000 0x40000>;
324 interrupts = <0 94 4>;
326 phy-names = "usb2-phy";
330 watchdog0: watchdog@ffd00200 {
331 compatible = "snps,dw-wdt";
332 reg = <0xffd00200 0x100>;
333 interrupts = <0 117 4>;
337 watchdog1: watchdog@ffd00300 {
338 compatible = "snps,dw-wdt";
339 reg = <0xffd00300 0x100>;
340 interrupts = <0 118 4>;
344 watchdog2: watchdog@ffd00400 {
345 compatible = "snps,dw-wdt";
346 reg = <0xffd00400 0x100>;
347 interrupts = <0 125 4>;
351 watchdog3: watchdog@ffd00500 {
352 compatible = "snps,dw-wdt";
353 reg = <0xffd00500 0x100>;
354 interrupts = <0 126 4>;