arch/arm64/boot/dts/broadcom/ns2-svk.dts

   1 /*
   2  *  BSD LICENSE
   3  *
   4  *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
   5  *
   6  *  Redistribution and use in source and binary forms, with or without
   7  *  modification, are permitted provided that the following conditions
   8  *  are met:
   9  *
  10  *    * Redistributions of source code must retain the above copyright
  11  *      notice, this list of conditions and the following disclaimer.
  12  *    * Redistributions in binary form must reproduce the above copyright
  13  *      notice, this list of conditions and the following disclaimer in
  14  *      the documentation and/or other materials provided with the
  15  *      distribution.
  16  *    * Neither the name of Broadcom Corporation nor the names of its
  17  *      contributors may be used to endorse or promote products derived
  18  *      from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /dts-v1/;
  34
  35 #include "ns2.dtsi"
  36
  37 / {
  38         model = "Broadcom NS2 SVK";
  39         compatible = "brcm,ns2-svk", "brcm,ns2";
  40
  41         aliases {
  42                 serial0 = &uart3;
  43         };
  44
  45         chosen {
  46                 stdout-path = "serial0:115200n8";
  47         };
  48
  49         memory {
  50                 device_type = "memory";
  51                 reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
  52         };
  53 };
  54
  55 &pci_phy0 {
  56         status = "ok";
  57 };
  58
  59 &pci_phy1 {
  60         status = "ok";
  61 };
  62
  63 &pcie0 {
  64         status = "ok";
  65 };
  66
  67 &pcie4 {
  68         status = "ok";
  69 };
  70
  71 &i2c0 {
  72         status = "ok";
  73 };
  74
  75 &i2c1 {
  76         status = "ok";
  77 };
  78
  79 &uart3 {
  80         status = "ok";
  81 };
  82
  83 &ssp0 {
  84         status = "ok";
  85
  86         slic@0 {
  87                 compatible = "silabs,si3226x";
  88                 reg = <0>;
  89                 spi-max-frequency = <5000000>;
  90                 spi-cpha = <1>;
  91                 spi-cpol = <1>;
  92                 pl022,hierarchy = <0>;
  93                 pl022,interface = <0>;
  94                 pl022,slave-tx-disable = <0>;
  95                 pl022,com-mode = <0>;
  96                 pl022,rx-level-trig = <1>;
  97                 pl022,tx-level-trig = <1>;
  98                 pl022,ctrl-len = <11>;
  99                 pl022,wait-state = <0>;
 100                 pl022,duplex = <0>;
 101         };
 102 };
 103
 104 &ssp1 {
 105         status = "ok";
 106
 107         at25@0 {
 108                 compatible = "atmel,at25";
 109                 reg = <0>;
 110                 spi-max-frequency = <5000000>;
 111                 at25,byte-len = <0x8000>;
 112                 at25,addr-mode = <2>;
 113                 at25,page-size = <64>;
 114                 spi-cpha = <1>;
 115                 spi-cpol = <1>;
 116                 pl022,hierarchy = <0>;
 117                 pl022,interface = <0>;
 118                 pl022,slave-tx-disable = <0>;
 119                 pl022,com-mode = <0>;
 120                 pl022,rx-level-trig = <1>;
 121                 pl022,tx-level-trig = <1>;
 122                 pl022,ctrl-len = <11>;
 123                 pl022,wait-state = <0>;
 124                 pl022,duplex = <0>;
 125         };
 126 };
 127
 128 &sdio0 {
 129         status = "ok";
 130 };
 131
 132 &nand {
 133         nandcs@0 {
 134                 compatible = "brcm,nandcs";
 135                 reg = <0>;
 136                 nand-ecc-mode = "hw";
 137                 nand-ecc-strength = <8>;
 138                 nand-ecc-step-size = <512>;
 139                 #address-cells = <1>;
 140                 #size-cells = <1>;
 141         };
 142 };
 143
 144 &mdio_mux_iproc {
 145         mdio@10 {
 146                 gphy0: eth-phy@10 {
 147                         reg = <0x10>;
 148                 };
 149         };
 150 };