arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

   1 /*
   2  * Device Tree Source for the H3ULCB board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2016 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7795.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15
  16 / {
  17         model = "Renesas H3ULCB board based on r8a7795";
  18         compatible = "renesas,h3ulcb", "renesas,r8a7795";
  19
  20         aliases {
  21                 serial0 = &scif2;
  22                 ethernet0 = &avb;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@48000000 {
  30                 device_type = "memory";
  31                 /* first 128MB is reserved for secure area. */
  32                 reg = <0x0 0x48000000 0x0 0x38000000>;
  33         };
  34 };
  35
  36 &extal_clk {
  37         clock-frequency = <16666666>;
  38 };
  39
  40 &extalr_clk {
  41         clock-frequency = <32768>;
  42 };
  43
  44 &pfc {
  45         pinctrl-0 = <&scif_clk_pins>;
  46         pinctrl-names = "default";
  47
  48         scif2_pins: scif2 {
  49                 groups = "scif2_data_a";
  50                 function = "scif2";
  51         };
  52
  53         scif_clk_pins: scif_clk {
  54                 groups = "scif_clk_a";
  55                 function = "scif_clk";
  56         };
  57
  58         i2c2_pins: i2c2 {
  59                 groups = "i2c2_a";
  60                 function = "i2c2";
  61         };
  62
  63         avb_pins: avb {
  64                 groups = "avb_mdc";
  65                 function = "avb";
  66         };
  67 };
  68
  69 &scif2 {
  70         pinctrl-0 = <&scif2_pins>;
  71         pinctrl-names = "default";
  72
  73         status = "okay";
  74 };
  75
  76 &scif_clk {
  77         clock-frequency = <14745600>;
  78         status = "okay";
  79 };
  80
  81 &i2c2 {
  82         pinctrl-0 = <&i2c2_pins>;
  83         pinctrl-names = "default";
  84
  85         status = "okay";
  86 };
  87
  88 &avb {
  89         pinctrl-0 = <&avb_pins>;
  90         pinctrl-names = "default";
  91         renesas,no-ether-link;
  92         phy-handle = <&phy0>;
  93         status = "okay";
  94
  95         phy0: ethernet-phy@0 {
  96                 rxc-skew-ps = <900>;
  97                 rxdv-skew-ps = <0>;
  98                 rxd0-skew-ps = <0>;
  99                 rxd1-skew-ps = <0>;
 100                 rxd2-skew-ps = <0>;
 101                 rxd3-skew-ps = <0>;
 102                 txc-skew-ps = <900>;
 103                 txen-skew-ps = <0>;
 104                 txd0-skew-ps = <0>;
 105                 txd1-skew-ps = <0>;
 106                 txd2-skew-ps = <0>;
 107                 txd3-skew-ps = <0>;
 108                 reg = <0>;
 109                 interrupt-parent = <&gpio2>;
 110                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 111         };
 112 };