arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts

   1 /*
   2  * Device Tree Source for the Salvator-X board
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /*
  12  * SSI-AK4613
  13  *
  14  * This command is required when Playback/Capture
  15  *
  16  *      amixer set "DVC Out" 100%
  17  *      amixer set "DVC In" 100%
  18  *
  19  * You can use Mute
  20  *
  21  *      amixer set "DVC Out Mute" on
  22  *      amixer set "DVC In Mute" on
  23  *
  24  * You can use Volume Ramp
  25  *
  26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  28  *      amixer set "DVC Out Ramp" on
  29  *      aplay xxx.wav &
  30  *      amixer set "DVC Out"  80%  // Volume Down
  31  *      amixer set "DVC Out" 100%  // Volume Up
  32  */
  33
  34 /dts-v1/;
  35 #include "r8a7795.dtsi"
  36 #include <dt-bindings/gpio/gpio.h>
  37
  38 / {
  39         model = "Renesas Salvator-X board based on r8a7795";
  40         compatible = "renesas,salvator-x", "renesas,r8a7795";
  41
  42         aliases {
  43                 serial0 = &scif2;
  44                 serial1 = &scif1;
  45                 ethernet0 = &avb;
  46         };
  47
  48         chosen {
  49                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  50                 stdout-path = "serial0:115200n8";
  51         };
  52
  53         memory@48000000 {
  54                 device_type = "memory";
  55                 /* first 128MB is reserved for secure area. */
  56                 reg = <0x0 0x48000000 0x0 0x38000000>;
  57         };
  58
  59         x12_clk: x12_clk {
  60                 compatible = "fixed-clock";
  61                 #clock-cells = <0>;
  62                 clock-frequency = <24576000>;
  63         };
  64
  65         vcc_sdhi0: regulator-vcc-sdhi0 {
  66                 compatible = "regulator-fixed";
  67
  68                 regulator-name = "SDHI0 Vcc";
  69                 regulator-min-microvolt = <3300000>;
  70                 regulator-max-microvolt = <3300000>;
  71
  72                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  73                 enable-active-high;
  74         };
  75
  76         vccq_sdhi0: regulator-vccq-sdhi0 {
  77                 compatible = "regulator-gpio";
  78
  79                 regulator-name = "SDHI0 VccQ";
  80                 regulator-min-microvolt = <1800000>;
  81                 regulator-max-microvolt = <3300000>;
  82
  83                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
  84                 gpios-states = <1>;
  85                 states = <3300000 1
  86                           1800000 0>;
  87         };
  88
  89         vcc_sdhi3: regulator-vcc-sdhi3 {
  90                 compatible = "regulator-fixed";
  91
  92                 regulator-name = "SDHI3 Vcc";
  93                 regulator-min-microvolt = <3300000>;
  94                 regulator-max-microvolt = <3300000>;
  95
  96                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  97                 enable-active-high;
  98         };
  99
 100         vccq_sdhi3: regulator-vccq-sdhi3 {
 101                 compatible = "regulator-gpio";
 102
 103                 regulator-name = "SDHI3 VccQ";
 104                 regulator-min-microvolt = <1800000>;
 105                 regulator-max-microvolt = <3300000>;
 106
 107                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 108                 gpios-states = <1>;
 109                 states = <3300000 1
 110                           1800000 0>;
 111         };
 112
 113         vbus0_usb2: regulator-vbus0-usb2 {
 114                 compatible = "regulator-fixed";
 115
 116                 regulator-name = "USB20_VBUS0";
 117                 regulator-min-microvolt = <5000000>;
 118                 regulator-max-microvolt = <5000000>;
 119
 120                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 121                 enable-active-high;
 122         };
 123
 124         audio_clkout: audio_clkout {
 125                 /*
 126                  * This is same as <&rcar_sound 0>
 127                  * but needed to avoid cs2000/rcar_sound probe dead-lock
 128                  */
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <11289600>;
 132         };
 133
 134         rsnd_ak4613: sound {
 135                 compatible = "simple-audio-card";
 136
 137                 simple-audio-card,format = "left_j";
 138                 simple-audio-card,bitclock-master = <&sndcpu>;
 139                 simple-audio-card,frame-master = <&sndcpu>;
 140
 141                 sndcpu: simple-audio-card,cpu {
 142                         sound-dai = <&rcar_sound>;
 143                 };
 144
 145                 sndcodec: simple-audio-card,codec {
 146                         sound-dai = <&ak4613>;
 147                 };
 148         };
 149
 150         vga-encoder {
 151                 compatible = "adi,adv7123";
 152
 153                 ports {
 154                         #address-cells = <1>;
 155                         #size-cells = <0>;
 156
 157                         port@0 {
 158                                 reg = <0>;
 159                                 adv7123_in: endpoint {
 160                                         remote-endpoint = <&du_out_rgb>;
 161                                 };
 162                         };
 163                         port@1 {
 164                                 reg = <1>;
 165                                 adv7123_out: endpoint {
 166                                         remote-endpoint = <&vga_in>;
 167                                 };
 168                         };
 169                 };
 170         };
 171
 172         vga {
 173                 compatible = "vga-connector";
 174
 175                 port {
 176                         vga_in: endpoint {
 177                                 remote-endpoint = <&adv7123_out>;
 178                         };
 179                 };
 180         };
 181 };
 182
 183 &du {
 184         status = "okay";
 185
 186         ports {
 187                 port@0 {
 188                         endpoint {
 189                                 remote-endpoint = <&adv7123_in>;
 190                         };
 191                 };
 192         };
 193 };
 194
 195 &extal_clk {
 196         clock-frequency = <16666666>;
 197 };
 198
 199 &extalr_clk {
 200         clock-frequency = <32768>;
 201 };
 202
 203 &pfc {
 204         pinctrl-0 = <&scif_clk_pins>;
 205         pinctrl-names = "default";
 206
 207         scif1_pins: scif1 {
 208                 groups = "scif1_data_a", "scif1_ctrl";
 209                 function = "scif1";
 210         };
 211         scif2_pins: scif2 {
 212                 groups = "scif2_data_a";
 213                 function = "scif2";
 214         };
 215         scif_clk_pins: scif_clk {
 216                 groups = "scif_clk_a";
 217                 function = "scif_clk";
 218         };
 219
 220         i2c2_pins: i2c2 {
 221                 groups = "i2c2_a";
 222                 function = "i2c2";
 223         };
 224
 225         avb_pins: avb {
 226                 groups = "avb_mdc";
 227                 function = "avb";
 228         };
 229
 230         sdhi0_pins: sd0 {
 231                 groups = "sdhi0_data4", "sdhi0_ctrl";
 232                 function = "sdhi0";
 233         };
 234
 235         sdhi3_pins: sd3 {
 236                 groups = "sdhi3_data4", "sdhi3_ctrl";
 237                 function = "sdhi3";
 238         };
 239
 240         sound_pins: sound {
 241                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 242                 function = "ssi";
 243         };
 244
 245         sound_clk_pins: sound_clk {
 246                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 247                          "audio_clkout_a", "audio_clkout3_a";
 248                 function = "audio_clk";
 249         };
 250
 251         usb0_pins: usb0 {
 252                 groups = "usb0";
 253                 function = "usb0";
 254         };
 255
 256         usb1_pins: usb1 {
 257                 groups = "usb1";
 258                 function = "usb1";
 259         };
 260
 261         usb2_pins: usb2 {
 262                 groups = "usb2";
 263                 function = "usb2";
 264         };
 265 };
 266
 267 &scif1 {
 268         pinctrl-0 = <&scif1_pins>;
 269         pinctrl-names = "default";
 270
 271         uart-has-rtscts;
 272         status = "okay";
 273 };
 274
 275 &scif2 {
 276         pinctrl-0 = <&scif2_pins>;
 277         pinctrl-names = "default";
 278
 279         status = "okay";
 280 };
 281
 282 &scif_clk {
 283         clock-frequency = <14745600>;
 284         status = "okay";
 285 };
 286
 287 &i2c2 {
 288         pinctrl-0 = <&i2c2_pins>;
 289         pinctrl-names = "default";
 290
 291         status = "okay";
 292
 293         clock-frequency = <100000>;
 294
 295         ak4613: codec@10 {
 296                 compatible = "asahi-kasei,ak4613";
 297                 #sound-dai-cells = <0>;
 298                 reg = <0x10>;
 299                 clocks = <&rcar_sound 3>;
 300
 301                 asahi-kasei,in1-single-end;
 302                 asahi-kasei,in2-single-end;
 303                 asahi-kasei,out1-single-end;
 304                 asahi-kasei,out2-single-end;
 305                 asahi-kasei,out3-single-end;
 306                 asahi-kasei,out4-single-end;
 307                 asahi-kasei,out5-single-end;
 308                 asahi-kasei,out6-single-end;
 309         };
 310
 311         cs2000: clk_multiplier@4f {
 312                 #clock-cells = <0>;
 313                 compatible = "cirrus,cs2000-cp";
 314                 reg = <0x4f>;
 315                 clocks = <&audio_clkout>, <&x12_clk>;
 316                 clock-names = "clk_in", "ref_clk";
 317
 318                 assigned-clocks = <&cs2000>;
 319                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 320         };
 321 };
 322
 323 &rcar_sound {
 324         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 325         pinctrl-names = "default";
 326
 327         /* Single DAI */
 328         #sound-dai-cells = <0>;
 329
 330         /* audio_clkout0/1/2/3 */
 331         #clock-cells = <1>;
 332         clock-frequency = <11289600>;
 333
 334         status = "okay";
 335
 336         /* update <audio_clk_b> to <cs2000> */
 337         clocks = <&cpg CPG_MOD 1005>,
 338                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 339                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 340                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 341                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 342                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 343                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 344                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 345                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 346                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 347                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 348                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 349                  <&audio_clk_a>, <&cs2000>,
 350                  <&audio_clk_c>,
 351                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 352
 353         rcar_sound,dai {
 354                 dai0 {
 355                         playback = <&ssi0 &src0 &dvc0>;
 356                         capture  = <&ssi1 &src1 &dvc1>;
 357                 };
 358         };
 359 };
 360
 361 &sata {
 362         status = "okay";
 363 };
 364
 365 &sdhi0 {
 366         pinctrl-0 = <&sdhi0_pins>;
 367         pinctrl-names = "default";
 368
 369         vmmc-supply = <&vcc_sdhi0>;
 370         vqmmc-supply = <&vccq_sdhi0>;
 371         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 372         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 373         bus-width = <4>;
 374         status = "okay";
 375 };
 376
 377 &sdhi3 {
 378         pinctrl-0 = <&sdhi3_pins>;
 379         pinctrl-names = "default";
 380
 381         vmmc-supply = <&vcc_sdhi3>;
 382         vqmmc-supply = <&vccq_sdhi3>;
 383         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 384         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 385         bus-width = <4>;
 386         status = "okay";
 387 };
 388
 389 &ssi1 {
 390         shared-pin;
 391 };
 392
 393 &wdt0 {
 394         timeout-sec = <60>;
 395         status = "okay";
 396 };
 397
 398 &audio_clk_a {
 399         clock-frequency = <22579200>;
 400 };
 401
 402 &avb {
 403         pinctrl-0 = <&avb_pins>;
 404         pinctrl-names = "default";
 405         renesas,no-ether-link;
 406         phy-handle = <&phy0>;
 407         status = "okay";
 408
 409         phy0: ethernet-phy@0 {
 410                 rxc-skew-ps = <900>;
 411                 rxdv-skew-ps = <0>;
 412                 rxd0-skew-ps = <0>;
 413                 rxd1-skew-ps = <0>;
 414                 rxd2-skew-ps = <0>;
 415                 rxd3-skew-ps = <0>;
 416                 txc-skew-ps = <900>;
 417                 txen-skew-ps = <0>;
 418                 txd0-skew-ps = <0>;
 419                 txd1-skew-ps = <0>;
 420                 txd2-skew-ps = <0>;
 421                 txd3-skew-ps = <0>;
 422                 reg = <0>;
 423                 interrupt-parent = <&gpio2>;
 424                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 425         };
 426 };
 427
 428 &xhci0 {
 429         status = "okay";
 430 };
 431
 432 &usb2_phy0 {
 433         pinctrl-0 = <&usb0_pins>;
 434         pinctrl-names = "default";
 435
 436         vbus-supply = <&vbus0_usb2>;
 437         status = "okay";
 438 };
 439
 440 &usb2_phy1 {
 441         pinctrl-0 = <&usb1_pins>;
 442         pinctrl-names = "default";
 443
 444         status = "okay";
 445 };
 446
 447 &usb2_phy2 {
 448         pinctrl-0 = <&usb2_pins>;
 449         pinctrl-names = "default";
 450
 451         status = "okay";
 452 };
 453
 454 &ehci0 {
 455         status = "okay";
 456 };
 457
 458 &ehci1 {
 459         status = "okay";
 460 };
 461
 462 &ehci2 {
 463         status = "okay";
 464 };
 465
 466 &ohci0 {
 467         status = "okay";
 468 };
 469
 470 &ohci1 {
 471         status = "okay";
 472 };
 473
 474 &ohci2 {
 475         status = "okay";
 476 };
 477
 478 &hsusb {
 479         status = "okay";
 480 };
 481
 482 &pcie_bus_clk {
 483         clock-frequency = <100000000>;
 484         status = "okay";
 485 };
 486
 487 &pciec0 {
 488         status = "okay";
 489 };
 490
 491 &pciec1 {
 492         status = "okay";
 493 };