arch/arm64/include/asm/alternative.h

   1 #ifndef __ASM_ALTERNATIVE_H
   2 #define __ASM_ALTERNATIVE_H
   3
   4 #ifndef __ASSEMBLY__
   5
   6 #include <linux/init.h>
   7 #include <linux/kconfig.h>
   8 #include <linux/types.h>
   9 #include <linux/stddef.h>
  10 #include <linux/stringify.h>
  11
  12 struct alt_instr {
  13         s32 orig_offset;        /* offset to original instruction */
  14         s32 alt_offset;         /* offset to replacement instruction */
  15         u16 cpufeature;         /* cpufeature bit set for replacement */
  16         u8  orig_len;           /* size of original instruction(s) */
  17         u8  alt_len;            /* size of new instruction(s), <= orig_len */
  18 };
  19
  20 void __init apply_alternatives_all(void);
  21 void apply_alternatives(void *start, size_t length);
  22
  23 #define ALTINSTR_ENTRY(feature)                                               \
  24         " .word 661b - .\n"                             /* label           */ \
  25         " .word 663f - .\n"                             /* new instruction */ \
  26         " .hword " __stringify(feature) "\n"            /* feature bit     */ \
  27         " .byte 662b-661b\n"                            /* source len      */ \
  28         " .byte 664f-663f\n"                            /* replacement len */
  29
  30 /*
  31  * alternative assembly primitive:
  32  *
  33  * If any of these .org directive fail, it means that insn1 and insn2
  34  * don't have the same length. This used to be written as
  35  *
  36  * .if ((664b-663b) != (662b-661b))
  37  *      .error "Alternatives instruction length mismatch"
  38  * .endif
  39  *
  40  * but most assemblers die if insn1 or insn2 have a .inst. This should
  41  * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
  42  * containing commit 4e4d08cf7399b606 or c1baaddf8861).
  43  */
  44 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled)     \
  45         ".if "__stringify(cfg_enabled)" == 1\n"                         \
  46         "661:\n\t"                                                      \
  47         oldinstr "\n"                                                   \
  48         "662:\n"                                                        \
  49         ".pushsection .altinstructions,\"a\"\n"                         \
  50         ALTINSTR_ENTRY(feature)                                         \
  51         ".popsection\n"                                                 \
  52         ".pushsection .altinstr_replacement, \"a\"\n"                   \
  53         "663:\n\t"                                                      \
  54         newinstr "\n"                                                   \
  55         "664:\n\t"                                                      \
  56         ".popsection\n\t"                                               \
  57         ".org   . - (664b-663b) + (662b-661b)\n\t"                      \
  58         ".org   . - (662b-661b) + (664b-663b)\n"                        \
  59         ".endif\n"
  60
  61 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
  62         __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
  63
  64 #else
  65
  66 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
  67         .word \orig_offset - .
  68         .word \alt_offset - .
  69         .hword \feature
  70         .byte \orig_len
  71         .byte \alt_len
  72 .endm
  73
  74 .macro alternative_insn insn1, insn2, cap, enable = 1
  75         .if \enable
  76 661:    \insn1
  77 662:    .pushsection .altinstructions, "a"
  78         altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
  79         .popsection
  80         .pushsection .altinstr_replacement, "ax"
  81 663:    \insn2
  82 664:    .popsection
  83         .org    . - (664b-663b) + (662b-661b)
  84         .org    . - (662b-661b) + (664b-663b)
  85         .endif
  86 .endm
  87
  88 /*
  89  * Begin an alternative code sequence.
  90  *
  91  * The code that follows this macro will be assembled and linked as
  92  * normal. There are no restrictions on this code.
  93  */
  94 .macro alternative_if_not cap, enable = 1
  95         .if \enable
  96         .pushsection .altinstructions, "a"
  97         altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
  98         .popsection
  99 661:
 100         .endif
 101 .endm
 102
 103 /*
 104  * Provide the alternative code sequence.
 105  *
 106  * The code that follows this macro is assembled into a special
 107  * section to be used for dynamic patching. Code that follows this
 108  * macro must:
 109  *
 110  * 1. Be exactly the same length (in bytes) as the default code
 111  *    sequence.
 112  *
 113  * 2. Not contain a branch target that is used outside of the
 114  *    alternative sequence it is defined in (branches into an
 115  *    alternative sequence are not fixed up).
 116  */
 117 .macro alternative_else, enable = 1
 118         .if \enable
 119 662:    .pushsection .altinstr_replacement, "ax"
 120 663:
 121         .endif
 122 .endm
 123
 124 /*
 125  * Complete an alternative code sequence.
 126  */
 127 .macro alternative_endif, enable = 1
 128         .if \enable
 129 664:    .popsection
 130         .org    . - (664b-663b) + (662b-661b)
 131         .org    . - (662b-661b) + (664b-663b)
 132         .endif
 133 .endm
 134
 135 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...)   \
 136         alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
 137
 138
 139 #endif  /*  __ASSEMBLY__  */
 140
 141 /*
 142  * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
 143  *
 144  * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
 145  * N.B. If CONFIG_FOO is specified, but not selected, the whole block
 146  *      will be omitted, including oldinstr.
 147  */
 148 #define ALTERNATIVE(oldinstr, newinstr, ...)   \
 149         _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
 150
 151 #endif /* __ASM_ALTERNATIVE_H */