arm64: kernel: Add support for User Access Override
[deliverable/linux.git] / arch / arm64 / include / asm / cpufeature.h
1 /*
2 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9 #ifndef __ASM_CPUFEATURE_H
10 #define __ASM_CPUFEATURE_H
11
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
14
15 /*
16 * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17 * in the kernel and for user space to keep track of which optional features
18 * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19 * Note that HWCAP_x constants are bit fields so we need to take the log.
20 */
21
22 #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap))
23 #define cpu_feature(x) ilog2(HWCAP_ ## x)
24
25 #define ARM64_WORKAROUND_CLEAN_CACHE 0
26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1
27 #define ARM64_WORKAROUND_845719 2
28 #define ARM64_HAS_SYSREG_GIC_CPUIF 3
29 #define ARM64_HAS_PAN 4
30 #define ARM64_HAS_LSE_ATOMICS 5
31 #define ARM64_WORKAROUND_CAVIUM_23154 6
32 #define ARM64_WORKAROUND_834220 7
33 #define ARM64_HAS_NO_HW_PREFETCH 8
34 #define ARM64_HAS_UAO 9
35
36 #define ARM64_NCAPS 10
37
38 #ifndef __ASSEMBLY__
39
40 #include <linux/kernel.h>
41
42 /* CPU feature register tracking */
43 enum ftr_type {
44 FTR_EXACT, /* Use a predefined safe value */
45 FTR_LOWER_SAFE, /* Smaller value is safe */
46 FTR_HIGHER_SAFE,/* Bigger value is safe */
47 };
48
49 #define FTR_STRICT true /* SANITY check strict matching required */
50 #define FTR_NONSTRICT false /* SANITY check ignored */
51
52 #define FTR_SIGNED true /* Value should be treated as signed */
53 #define FTR_UNSIGNED false /* Value should be treated as unsigned */
54
55 struct arm64_ftr_bits {
56 bool sign; /* Value is signed ? */
57 bool strict; /* CPU Sanity check: strict matching required ? */
58 enum ftr_type type;
59 u8 shift;
60 u8 width;
61 s64 safe_val; /* safe value for discrete features */
62 };
63
64 /*
65 * @arm64_ftr_reg - Feature register
66 * @strict_mask Bits which should match across all CPUs for sanity.
67 * @sys_val Safe value across the CPUs (system view)
68 */
69 struct arm64_ftr_reg {
70 u32 sys_id;
71 const char *name;
72 u64 strict_mask;
73 u64 sys_val;
74 struct arm64_ftr_bits *ftr_bits;
75 };
76
77 struct arm64_cpu_capabilities {
78 const char *desc;
79 u16 capability;
80 bool (*matches)(const struct arm64_cpu_capabilities *);
81 void (*enable)(void *); /* Called on all active CPUs */
82 union {
83 struct { /* To be used for erratum handling only */
84 u32 midr_model;
85 u32 midr_range_min, midr_range_max;
86 };
87
88 struct { /* Feature register checking */
89 u32 sys_reg;
90 int field_pos;
91 int min_field_value;
92 int hwcap_type;
93 unsigned long hwcap;
94 };
95 };
96 };
97
98 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
99
100 static inline bool cpu_have_feature(unsigned int num)
101 {
102 return elf_hwcap & (1UL << num);
103 }
104
105 static inline bool cpus_have_cap(unsigned int num)
106 {
107 if (num >= ARM64_NCAPS)
108 return false;
109 return test_bit(num, cpu_hwcaps);
110 }
111
112 static inline void cpus_set_cap(unsigned int num)
113 {
114 if (num >= ARM64_NCAPS)
115 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
116 num, ARM64_NCAPS);
117 else
118 __set_bit(num, cpu_hwcaps);
119 }
120
121 static inline int __attribute_const__
122 cpuid_feature_extract_field_width(u64 features, int field, int width)
123 {
124 return (s64)(features << (64 - width - field)) >> (64 - width);
125 }
126
127 static inline int __attribute_const__
128 cpuid_feature_extract_field(u64 features, int field)
129 {
130 return cpuid_feature_extract_field_width(features, field, 4);
131 }
132
133 static inline unsigned int __attribute_const__
134 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
135 {
136 return (u64)(features << (64 - width - field)) >> (64 - width);
137 }
138
139 static inline unsigned int __attribute_const__
140 cpuid_feature_extract_unsigned_field(u64 features, int field)
141 {
142 return cpuid_feature_extract_unsigned_field_width(features, field, 4);
143 }
144
145 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
146 {
147 return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
148 }
149
150 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
151 {
152 return ftrp->sign ?
153 cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) :
154 cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width);
155 }
156
157 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
158 {
159 return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
160 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
161 }
162
163 void __init setup_cpu_features(void);
164
165 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
166 const char *info);
167 void check_local_cpu_errata(void);
168
169 #ifdef CONFIG_HOTPLUG_CPU
170 void verify_local_cpu_capabilities(void);
171 #else
172 static inline void verify_local_cpu_capabilities(void)
173 {
174 }
175 #endif
176
177 u64 read_system_reg(u32 id);
178
179 static inline bool cpu_supports_mixed_endian_el0(void)
180 {
181 return id_aa64mmfr0_mixed_endian_el0(read_cpuid(SYS_ID_AA64MMFR0_EL1));
182 }
183
184 static inline bool system_supports_mixed_endian_el0(void)
185 {
186 return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
187 }
188
189 #endif /* __ASSEMBLY__ */
190
191 #endif
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