arch/arm64/include/asm/cpufeature.h

   1 /*
   2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef __ASM_CPUFEATURE_H
  10 #define __ASM_CPUFEATURE_H
  11
  12 #include <asm/hwcap.h>
  13 #include <asm/sysreg.h>
  14
  15 /*
  16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
  17  * in the kernel and for user space to keep track of which optional features
  18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
  19  * Note that HWCAP_x constants are bit fields so we need to take the log.
  20  */
  21
  22 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
  23 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
  24
  25 #define ARM64_WORKAROUND_CLEAN_CACHE            0
  26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE    1
  27 #define ARM64_WORKAROUND_845719                 2
  28 #define ARM64_HAS_SYSREG_GIC_CPUIF              3
  29 #define ARM64_HAS_PAN                           4
  30 #define ARM64_HAS_LSE_ATOMICS                   5
  31 #define ARM64_WORKAROUND_CAVIUM_23154           6
  32 #define ARM64_WORKAROUND_834220                 7
  33 #define ARM64_HAS_NO_HW_PREFETCH                8
  34 #define ARM64_HAS_UAO                           9
  35 #define ARM64_ALT_PAN_NOT_UAO                   10
  36 #define ARM64_HAS_VIRT_HOST_EXTN                11
  37 #define ARM64_WORKAROUND_CAVIUM_27456           12
  38 #define ARM64_HAS_32BIT_EL0                     13
  39 #define ARM64_HYP_OFFSET_LOW                    14
  40
  41 #define ARM64_NCAPS                             15
  42
  43 #ifndef __ASSEMBLY__
  44
  45 #include <linux/kernel.h>
  46
  47 /* CPU feature register tracking */
  48 enum ftr_type {
  49         FTR_EXACT,      /* Use a predefined safe value */
  50         FTR_LOWER_SAFE, /* Smaller value is safe */
  51         FTR_HIGHER_SAFE,/* Bigger value is safe */
  52 };
  53
  54 #define FTR_STRICT      true    /* SANITY check strict matching required */
  55 #define FTR_NONSTRICT   false   /* SANITY check ignored */
  56
  57 #define FTR_SIGNED      true    /* Value should be treated as signed */
  58 #define FTR_UNSIGNED    false   /* Value should be treated as unsigned */
  59
  60 struct arm64_ftr_bits {
  61         bool            sign;   /* Value is signed ? */
  62         bool            strict; /* CPU Sanity check: strict matching required ? */
  63         enum ftr_type   type;
  64         u8              shift;
  65         u8              width;
  66         s64             safe_val; /* safe value for discrete features */
  67 };
  68
  69 /*
  70  * @arm64_ftr_reg - Feature register
  71  * @strict_mask         Bits which should match across all CPUs for sanity.
  72  * @sys_val             Safe value across the CPUs (system view)
  73  */
  74 struct arm64_ftr_reg {
  75         u32                     sys_id;
  76         const char              *name;
  77         u64                     strict_mask;
  78         u64                     sys_val;
  79         struct arm64_ftr_bits   *ftr_bits;
  80 };
  81
  82 /* scope of capability check */
  83 enum {
  84         SCOPE_SYSTEM,
  85         SCOPE_LOCAL_CPU,
  86 };
  87
  88 struct arm64_cpu_capabilities {
  89         const char *desc;
  90         u16 capability;
  91         int def_scope;                  /* default scope */
  92         bool (*matches)(const struct arm64_cpu_capabilities *caps, int scope);
  93         void (*enable)(void *);         /* Called on all active CPUs */
  94         union {
  95                 struct {        /* To be used for erratum handling only */
  96                         u32 midr_model;
  97                         u32 midr_range_min, midr_range_max;
  98                 };
  99
 100                 struct {        /* Feature register checking */
 101                         u32 sys_reg;
 102                         u8 field_pos;
 103                         u8 min_field_value;
 104                         u8 hwcap_type;
 105                         bool sign;
 106                         unsigned long hwcap;
 107                 };
 108         };
 109 };
 110
 111 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
 112
 113 bool this_cpu_has_cap(unsigned int cap);
 114
 115 static inline bool cpu_have_feature(unsigned int num)
 116 {
 117         return elf_hwcap & (1UL << num);
 118 }
 119
 120 static inline bool cpus_have_cap(unsigned int num)
 121 {
 122         if (num >= ARM64_NCAPS)
 123                 return false;
 124         return test_bit(num, cpu_hwcaps);
 125 }
 126
 127 static inline void cpus_set_cap(unsigned int num)
 128 {
 129         if (num >= ARM64_NCAPS)
 130                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
 131                         num, ARM64_NCAPS);
 132         else
 133                 __set_bit(num, cpu_hwcaps);
 134 }
 135
 136 static inline int __attribute_const__
 137 cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
 138 {
 139         return (s64)(features << (64 - width - field)) >> (64 - width);
 140 }
 141
 142 static inline int __attribute_const__
 143 cpuid_feature_extract_signed_field(u64 features, int field)
 144 {
 145         return cpuid_feature_extract_signed_field_width(features, field, 4);
 146 }
 147
 148 static inline unsigned int __attribute_const__
 149 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
 150 {
 151         return (u64)(features << (64 - width - field)) >> (64 - width);
 152 }
 153
 154 static inline unsigned int __attribute_const__
 155 cpuid_feature_extract_unsigned_field(u64 features, int field)
 156 {
 157         return cpuid_feature_extract_unsigned_field_width(features, field, 4);
 158 }
 159
 160 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
 161 {
 162         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 163 }
 164
 165 static inline int __attribute_const__
 166 cpuid_feature_extract_field(u64 features, int field, bool sign)
 167 {
 168         return (sign) ?
 169                 cpuid_feature_extract_signed_field(features, field) :
 170                 cpuid_feature_extract_unsigned_field(features, field);
 171 }
 172
 173 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
 174 {
 175         return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
 176 }
 177
 178 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 179 {
 180         return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
 181                 cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 182 }
 183
 184 static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
 185 {
 186         u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
 187
 188         return val == ID_AA64PFR0_EL0_32BIT_64BIT;
 189 }
 190
 191 void __init setup_cpu_features(void);
 192
 193 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
 194                             const char *info);
 195 void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
 196 void check_local_cpu_errata(void);
 197 void __init enable_errata_workarounds(void);
 198
 199 void verify_local_cpu_errata(void);
 200 void verify_local_cpu_capabilities(void);
 201
 202 u64 read_system_reg(u32 id);
 203
 204 static inline bool cpu_supports_mixed_endian_el0(void)
 205 {
 206         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
 207 }
 208
 209 static inline bool system_supports_32bit_el0(void)
 210 {
 211         return cpus_have_cap(ARM64_HAS_32BIT_EL0);
 212 }
 213
 214 static inline bool system_supports_mixed_endian_el0(void)
 215 {
 216         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
 217 }
 218
 219 #endif /* __ASSEMBLY__ */
 220
 221 #endif