arch/arm64/include/asm/debug-monitors.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_DEBUG_MONITORS_H
  17 #define __ASM_DEBUG_MONITORS_H
  18
  19 #ifdef __KERNEL__
  20
  21 #define DBG_ESR_EVT(x)          (((x) >> 27) & 0x7)
  22
  23 /* AArch64 */
  24 #define DBG_ESR_EVT_HWBP        0x0
  25 #define DBG_ESR_EVT_HWSS        0x1
  26 #define DBG_ESR_EVT_HWWP        0x2
  27 #define DBG_ESR_EVT_BRK         0x6
  28
  29 /*
  30  * Break point instruction encoding
  31  */
  32 #define BREAK_INSTR_SIZE                4
  33
  34 /*
  35  * ESR values expected for dynamic and compile time BRK instruction
  36  */
  37 #define DBG_ESR_VAL_BRK(x)      (0xf2000000 | ((x) & 0xfffff))
  38
  39 /*
  40  * #imm16 values used for BRK instruction generation
  41  * Allowed values for kgbd are 0x400 - 0x7ff
  42  * 0x400: for dynamic BRK instruction
  43  * 0x401: for compile time BRK instruction
  44  */
  45 #define KGDB_DYN_DGB_BRK_IMM            0x400
  46 #define KDBG_COMPILED_DBG_BRK_IMM       0x401
  47
  48 /*
  49  * BRK instruction encoding
  50  * The #imm16 value should be placed at bits[20:5] within BRK ins
  51  */
  52 #define AARCH64_BREAK_MON       0xd4200000
  53
  54 /*
  55  * Extract byte from BRK instruction
  56  */
  57 #define KGDB_DYN_DGB_BRK_INS_BYTE(x) \
  58         ((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)
  59
  60 /*
  61  * Extract byte from BRK #imm16
  62  */
  63 #define KGBD_DYN_DGB_BRK_IMM_BYTE(x) \
  64         (((((KGDB_DYN_DGB_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)
  65
  66 #define KGDB_DYN_DGB_BRK_BYTE(x) \
  67         (KGDB_DYN_DGB_BRK_INS_BYTE(x) | KGBD_DYN_DGB_BRK_IMM_BYTE(x))
  68
  69 #define  KGDB_DYN_BRK_INS_BYTE0  KGDB_DYN_DGB_BRK_BYTE(0)
  70 #define  KGDB_DYN_BRK_INS_BYTE1  KGDB_DYN_DGB_BRK_BYTE(1)
  71 #define  KGDB_DYN_BRK_INS_BYTE2  KGDB_DYN_DGB_BRK_BYTE(2)
  72 #define  KGDB_DYN_BRK_INS_BYTE3  KGDB_DYN_DGB_BRK_BYTE(3)
  73
  74 #define CACHE_FLUSH_IS_SAFE             1
  75
  76 enum debug_el {
  77         DBG_ACTIVE_EL0 = 0,
  78         DBG_ACTIVE_EL1,
  79 };
  80
  81 /* AArch32 */
  82 #define DBG_ESR_EVT_BKPT        0x4
  83 #define DBG_ESR_EVT_VECC        0x5
  84
  85 #define AARCH32_BREAK_ARM       0x07f001f0
  86 #define AARCH32_BREAK_THUMB     0xde01
  87 #define AARCH32_BREAK_THUMB2_LO 0xf7f0
  88 #define AARCH32_BREAK_THUMB2_HI 0xa000
  89
  90 #ifndef __ASSEMBLY__
  91 struct task_struct;
  92
  93 #define DBG_ARCH_ID_RESERVED    0       /* In case of ptrace ABI updates. */
  94
  95 #define DBG_HOOK_HANDLED        0
  96 #define DBG_HOOK_ERROR          1
  97
  98 struct step_hook {
  99         struct list_head node;
 100         int (*fn)(struct pt_regs *regs, unsigned int esr);
 101 };
 102
 103 void register_step_hook(struct step_hook *hook);
 104 void unregister_step_hook(struct step_hook *hook);
 105
 106 struct break_hook {
 107         struct list_head node;
 108         u32 esr_val;
 109         u32 esr_mask;
 110         int (*fn)(struct pt_regs *regs, unsigned int esr);
 111 };
 112
 113 void register_break_hook(struct break_hook *hook);
 114 void unregister_break_hook(struct break_hook *hook);
 115
 116 u8 debug_monitors_arch(void);
 117
 118 void enable_debug_monitors(enum debug_el el);
 119 void disable_debug_monitors(enum debug_el el);
 120
 121 void user_rewind_single_step(struct task_struct *task);
 122 void user_fastforward_single_step(struct task_struct *task);
 123
 124 void kernel_enable_single_step(struct pt_regs *regs);
 125 void kernel_disable_single_step(void);
 126 int kernel_active_single_step(void);
 127
 128 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 129 int reinstall_suspended_bps(struct pt_regs *regs);
 130 #else
 131 static inline int reinstall_suspended_bps(struct pt_regs *regs)
 132 {
 133         return -ENODEV;
 134 }
 135 #endif
 136
 137 int aarch32_break_handler(struct pt_regs *regs);
 138
 139 #endif  /* __ASSEMBLY */
 140 #endif  /* __KERNEL__ */
 141 #endif  /* __ASM_DEBUG_MONITORS_H */