arch/arm64/include/asm/debug-monitors.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_DEBUG_MONITORS_H
  17 #define __ASM_DEBUG_MONITORS_H
  18
  19 #ifdef __KERNEL__
  20
  21 /* Low-level stepping controls. */
  22 #define DBG_MDSCR_SS            (1 << 0)
  23 #define DBG_SPSR_SS             (1 << 21)
  24
  25 /* MDSCR_EL1 enabling bits */
  26 #define DBG_MDSCR_KDE           (1 << 13)
  27 #define DBG_MDSCR_MDE           (1 << 15)
  28 #define DBG_MDSCR_MASK          ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
  29
  30 #define DBG_ESR_EVT(x)          (((x) >> 27) & 0x7)
  31
  32 /* AArch64 */
  33 #define DBG_ESR_EVT_HWBP        0x0
  34 #define DBG_ESR_EVT_HWSS        0x1
  35 #define DBG_ESR_EVT_HWWP        0x2
  36 #define DBG_ESR_EVT_BRK         0x6
  37
  38 /*
  39  * Break point instruction encoding
  40  */
  41 #define BREAK_INSTR_SIZE                4
  42
  43 /*
  44  * ESR values expected for dynamic and compile time BRK instruction
  45  */
  46 #define DBG_ESR_VAL_BRK(x)      (0xf2000000 | ((x) & 0xfffff))
  47
  48 /*
  49  * #imm16 values used for BRK instruction generation
  50  * Allowed values for kgbd are 0x400 - 0x7ff
  51  * 0x100: for triggering a fault on purpose (reserved)
  52  * 0x400: for dynamic BRK instruction
  53  * 0x401: for compile time BRK instruction
  54  */
  55 #define FAULT_BRK_IMM                   0x100
  56 #define KGDB_DYN_DBG_BRK_IMM            0x400
  57 #define KGDB_COMPILED_DBG_BRK_IMM       0x401
  58
  59 /*
  60  * BRK instruction encoding
  61  * The #imm16 value should be placed at bits[20:5] within BRK ins
  62  */
  63 #define AARCH64_BREAK_MON       0xd4200000
  64
  65 /*
  66  * BRK instruction for provoking a fault on purpose
  67  * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
  68  */
  69 #define AARCH64_BREAK_FAULT     (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
  70
  71 /*
  72  * Extract byte from BRK instruction
  73  */
  74 #define KGDB_DYN_DBG_BRK_INS_BYTE(x) \
  75         ((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)
  76
  77 /*
  78  * Extract byte from BRK #imm16
  79  */
  80 #define KGBD_DYN_DBG_BRK_IMM_BYTE(x) \
  81         (((((KGDB_DYN_DBG_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)
  82
  83 #define KGDB_DYN_DBG_BRK_BYTE(x) \
  84         (KGDB_DYN_DBG_BRK_INS_BYTE(x) | KGBD_DYN_DBG_BRK_IMM_BYTE(x))
  85
  86 #define  KGDB_DYN_BRK_INS_BYTE0  KGDB_DYN_DBG_BRK_BYTE(0)
  87 #define  KGDB_DYN_BRK_INS_BYTE1  KGDB_DYN_DBG_BRK_BYTE(1)
  88 #define  KGDB_DYN_BRK_INS_BYTE2  KGDB_DYN_DBG_BRK_BYTE(2)
  89 #define  KGDB_DYN_BRK_INS_BYTE3  KGDB_DYN_DBG_BRK_BYTE(3)
  90
  91 #define CACHE_FLUSH_IS_SAFE             1
  92
  93 /* AArch32 */
  94 #define DBG_ESR_EVT_BKPT        0x4
  95 #define DBG_ESR_EVT_VECC        0x5
  96
  97 #define AARCH32_BREAK_ARM       0x07f001f0
  98 #define AARCH32_BREAK_THUMB     0xde01
  99 #define AARCH32_BREAK_THUMB2_LO 0xf7f0
 100 #define AARCH32_BREAK_THUMB2_HI 0xa000
 101
 102 #ifndef __ASSEMBLY__
 103 struct task_struct;
 104
 105 #define DBG_ARCH_ID_RESERVED    0       /* In case of ptrace ABI updates. */
 106
 107 #define DBG_HOOK_HANDLED        0
 108 #define DBG_HOOK_ERROR          1
 109
 110 struct step_hook {
 111         struct list_head node;
 112         int (*fn)(struct pt_regs *regs, unsigned int esr);
 113 };
 114
 115 void register_step_hook(struct step_hook *hook);
 116 void unregister_step_hook(struct step_hook *hook);
 117
 118 struct break_hook {
 119         struct list_head node;
 120         u32 esr_val;
 121         u32 esr_mask;
 122         int (*fn)(struct pt_regs *regs, unsigned int esr);
 123 };
 124
 125 void register_break_hook(struct break_hook *hook);
 126 void unregister_break_hook(struct break_hook *hook);
 127
 128 u8 debug_monitors_arch(void);
 129
 130 enum debug_el {
 131         DBG_ACTIVE_EL0 = 0,
 132         DBG_ACTIVE_EL1,
 133 };
 134
 135 void enable_debug_monitors(enum debug_el el);
 136 void disable_debug_monitors(enum debug_el el);
 137
 138 void user_rewind_single_step(struct task_struct *task);
 139 void user_fastforward_single_step(struct task_struct *task);
 140
 141 void kernel_enable_single_step(struct pt_regs *regs);
 142 void kernel_disable_single_step(void);
 143 int kernel_active_single_step(void);
 144
 145 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 146 int reinstall_suspended_bps(struct pt_regs *regs);
 147 #else
 148 static inline int reinstall_suspended_bps(struct pt_regs *regs)
 149 {
 150         return -ENODEV;
 151 }
 152 #endif
 153
 154 int aarch32_break_handler(struct pt_regs *regs);
 155
 156 #endif  /* __ASSEMBLY */
 157 #endif  /* __KERNEL__ */
 158 #endif  /* __ASM_DEBUG_MONITORS_H */