Merge branch 'pci/resource' into next
[deliverable/linux.git] / arch / arm64 / include / asm / futex.h
1 /*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16 #ifndef __ASM_FUTEX_H
17 #define __ASM_FUTEX_H
18
19 #ifdef __KERNEL__
20
21 #include <linux/futex.h>
22 #include <linux/uaccess.h>
23 #include <asm/errno.h>
24
25 #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
26 asm volatile( \
27 "1: ldaxr %w1, %2\n" \
28 insn "\n" \
29 "2: stlxr %w3, %w0, %2\n" \
30 " cbnz %w3, 1b\n" \
31 "3:\n" \
32 " .pushsection .fixup,\"ax\"\n" \
33 " .align 2\n" \
34 "4: mov %w0, %w5\n" \
35 " b 3b\n" \
36 " .popsection\n" \
37 " .pushsection __ex_table,\"a\"\n" \
38 " .align 3\n" \
39 " .quad 1b, 4b, 2b, 4b\n" \
40 " .popsection\n" \
41 : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
42 : "r" (oparg), "Ir" (-EFAULT) \
43 : "cc", "memory")
44
45 static inline int
46 futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
47 {
48 int op = (encoded_op >> 28) & 7;
49 int cmp = (encoded_op >> 24) & 15;
50 int oparg = (encoded_op << 8) >> 20;
51 int cmparg = (encoded_op << 20) >> 20;
52 int oldval = 0, ret, tmp;
53
54 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
55 oparg = 1 << oparg;
56
57 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
58 return -EFAULT;
59
60 pagefault_disable(); /* implies preempt_disable() */
61
62 switch (op) {
63 case FUTEX_OP_SET:
64 __futex_atomic_op("mov %w0, %w4",
65 ret, oldval, uaddr, tmp, oparg);
66 break;
67 case FUTEX_OP_ADD:
68 __futex_atomic_op("add %w0, %w1, %w4",
69 ret, oldval, uaddr, tmp, oparg);
70 break;
71 case FUTEX_OP_OR:
72 __futex_atomic_op("orr %w0, %w1, %w4",
73 ret, oldval, uaddr, tmp, oparg);
74 break;
75 case FUTEX_OP_ANDN:
76 __futex_atomic_op("and %w0, %w1, %w4",
77 ret, oldval, uaddr, tmp, ~oparg);
78 break;
79 case FUTEX_OP_XOR:
80 __futex_atomic_op("eor %w0, %w1, %w4",
81 ret, oldval, uaddr, tmp, oparg);
82 break;
83 default:
84 ret = -ENOSYS;
85 }
86
87 pagefault_enable(); /* subsumes preempt_enable() */
88
89 if (!ret) {
90 switch (cmp) {
91 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
92 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
93 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
94 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
95 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
96 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
97 default: ret = -ENOSYS;
98 }
99 }
100 return ret;
101 }
102
103 static inline int
104 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
105 u32 oldval, u32 newval)
106 {
107 int ret = 0;
108 u32 val, tmp;
109
110 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
111 return -EFAULT;
112
113 asm volatile("// futex_atomic_cmpxchg_inatomic\n"
114 "1: ldaxr %w1, %2\n"
115 " sub %w3, %w1, %w4\n"
116 " cbnz %w3, 3f\n"
117 "2: stlxr %w3, %w5, %2\n"
118 " cbnz %w3, 1b\n"
119 "3:\n"
120 " .pushsection .fixup,\"ax\"\n"
121 "4: mov %w0, %w6\n"
122 " b 3b\n"
123 " .popsection\n"
124 " .pushsection __ex_table,\"a\"\n"
125 " .align 3\n"
126 " .quad 1b, 4b, 2b, 4b\n"
127 " .popsection\n"
128 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
129 : "r" (oldval), "r" (newval), "Ir" (-EFAULT)
130 : "cc", "memory");
131
132 *uval = val;
133 return ret;
134 }
135
136 #endif /* __KERNEL__ */
137 #endif /* __ASM_FUTEX_H */
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