arch/arm64/include/asm/kvm_mmu.h

   1 /*
   2  * Copyright (C) 2012,2013 - ARM Ltd
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __ARM64_KVM_MMU_H__
  19 #define __ARM64_KVM_MMU_H__
  20
  21 #include <asm/page.h>
  22 #include <asm/memory.h>
  23
  24 /*
  25  * As we only have the TTBR0_EL2 register, we cannot express
  26  * "negative" addresses. This makes it impossible to directly share
  27  * mappings with the kernel.
  28  *
  29  * Instead, give the HYP mode its own VA region at a fixed offset from
  30  * the kernel by just masking the top bits (which are all ones for a
  31  * kernel address).
  32  */
  33 #define HYP_PAGE_OFFSET_SHIFT   VA_BITS
  34 #define HYP_PAGE_OFFSET_MASK    ((UL(1) << HYP_PAGE_OFFSET_SHIFT) - 1)
  35 #define HYP_PAGE_OFFSET         (PAGE_OFFSET & HYP_PAGE_OFFSET_MASK)
  36
  37 /*
  38  * Our virtual mapping for the idmap-ed MMU-enable code. Must be
  39  * shared across all the page-tables. Conveniently, we use the last
  40  * possible page, where no kernel mapping will ever exist.
  41  */
  42 #define TRAMPOLINE_VA           (HYP_PAGE_OFFSET_MASK & PAGE_MASK)
  43
  44 /*
  45  * KVM_MMU_CACHE_MIN_PAGES is the number of stage2 page table translation
  46  * levels in addition to the PGD and potentially the PUD which are
  47  * pre-allocated (we pre-allocate the fake PGD and the PUD when the Stage-2
  48  * tables use one level of tables less than the kernel.
  49  */
  50 #ifdef CONFIG_ARM64_64K_PAGES
  51 #define KVM_MMU_CACHE_MIN_PAGES 1
  52 #else
  53 #define KVM_MMU_CACHE_MIN_PAGES 2
  54 #endif
  55
  56 #ifdef __ASSEMBLY__
  57
  58 /*
  59  * Convert a kernel VA into a HYP VA.
  60  * reg: VA to be converted.
  61  */
  62 .macro kern_hyp_va      reg
  63         and     \reg, \reg, #HYP_PAGE_OFFSET_MASK
  64 .endm
  65
  66 #else
  67
  68 #include <asm/pgalloc.h>
  69 #include <asm/cachetype.h>
  70 #include <asm/cacheflush.h>
  71
  72 #define KERN_TO_HYP(kva)        ((unsigned long)kva - PAGE_OFFSET + HYP_PAGE_OFFSET)
  73
  74 /*
  75  * We currently only support a 40bit IPA.
  76  */
  77 #define KVM_PHYS_SHIFT  (40)
  78 #define KVM_PHYS_SIZE   (1UL << KVM_PHYS_SHIFT)
  79 #define KVM_PHYS_MASK   (KVM_PHYS_SIZE - 1UL)
  80
  81 int create_hyp_mappings(void *from, void *to);
  82 int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
  83 void free_boot_hyp_pgd(void);
  84 void free_hyp_pgds(void);
  85
  86 void stage2_unmap_vm(struct kvm *kvm);
  87 int kvm_alloc_stage2_pgd(struct kvm *kvm);
  88 void kvm_free_stage2_pgd(struct kvm *kvm);
  89 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
  90                           phys_addr_t pa, unsigned long size, bool writable);
  91
  92 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
  93
  94 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
  95
  96 phys_addr_t kvm_mmu_get_httbr(void);
  97 phys_addr_t kvm_mmu_get_boot_httbr(void);
  98 phys_addr_t kvm_get_idmap_vector(void);
  99 int kvm_mmu_init(void);
 100 void kvm_clear_hyp_idmap(void);
 101
 102 #define kvm_set_pte(ptep, pte)          set_pte(ptep, pte)
 103 #define kvm_set_pmd(pmdp, pmd)          set_pmd(pmdp, pmd)
 104
 105 static inline void kvm_clean_pgd(pgd_t *pgd) {}
 106 static inline void kvm_clean_pmd(pmd_t *pmd) {}
 107 static inline void kvm_clean_pmd_entry(pmd_t *pmd) {}
 108 static inline void kvm_clean_pte(pte_t *pte) {}
 109 static inline void kvm_clean_pte_entry(pte_t *pte) {}
 110
 111 static inline void kvm_set_s2pte_writable(pte_t *pte)
 112 {
 113         pte_val(*pte) |= PTE_S2_RDWR;
 114 }
 115
 116 static inline void kvm_set_s2pmd_writable(pmd_t *pmd)
 117 {
 118         pmd_val(*pmd) |= PMD_S2_RDWR;
 119 }
 120
 121 #define kvm_pgd_addr_end(addr, end)     pgd_addr_end(addr, end)
 122 #define kvm_pud_addr_end(addr, end)     pud_addr_end(addr, end)
 123 #define kvm_pmd_addr_end(addr, end)     pmd_addr_end(addr, end)
 124
 125 /*
 126  * In the case where PGDIR_SHIFT is larger than KVM_PHYS_SHIFT, we can address
 127  * the entire IPA input range with a single pgd entry, and we would only need
 128  * one pgd entry.  Note that in this case, the pgd is actually not used by
 129  * the MMU for Stage-2 translations, but is merely a fake pgd used as a data
 130  * structure for the kernel pgtable macros to work.
 131  */
 132 #if PGDIR_SHIFT > KVM_PHYS_SHIFT
 133 #define PTRS_PER_S2_PGD_SHIFT   0
 134 #else
 135 #define PTRS_PER_S2_PGD_SHIFT   (KVM_PHYS_SHIFT - PGDIR_SHIFT)
 136 #endif
 137 #define PTRS_PER_S2_PGD         (1 << PTRS_PER_S2_PGD_SHIFT)
 138 #define S2_PGD_ORDER            get_order(PTRS_PER_S2_PGD * sizeof(pgd_t))
 139
 140 /*
 141  * If we are concatenating first level stage-2 page tables, we would have less
 142  * than or equal to 16 pointers in the fake PGD, because that's what the
 143  * architecture allows.  In this case, (4 - CONFIG_ARM64_PGTABLE_LEVELS)
 144  * represents the first level for the host, and we add 1 to go to the next
 145  * level (which uses contatenation) for the stage-2 tables.
 146  */
 147 #if PTRS_PER_S2_PGD <= 16
 148 #define KVM_PREALLOC_LEVEL      (4 - CONFIG_ARM64_PGTABLE_LEVELS + 1)
 149 #else
 150 #define KVM_PREALLOC_LEVEL      (0)
 151 #endif
 152
 153 /**
 154  * kvm_prealloc_hwpgd - allocate inital table for VTTBR
 155  * @kvm:        The KVM struct pointer for the VM.
 156  * @pgd:        The kernel pseudo pgd
 157  *
 158  * When the kernel uses more levels of page tables than the guest, we allocate
 159  * a fake PGD and pre-populate it to point to the next-level page table, which
 160  * will be the real initial page table pointed to by the VTTBR.
 161  *
 162  * When KVM_PREALLOC_LEVEL==2, we allocate a single page for the PMD and
 163  * the kernel will use folded pud.  When KVM_PREALLOC_LEVEL==1, we
 164  * allocate 2 consecutive PUD pages.
 165  */
 166 static inline int kvm_prealloc_hwpgd(struct kvm *kvm, pgd_t *pgd)
 167 {
 168         unsigned int i;
 169         unsigned long hwpgd;
 170
 171         if (KVM_PREALLOC_LEVEL == 0)
 172                 return 0;
 173
 174         hwpgd = __get_free_pages(GFP_KERNEL | __GFP_ZERO, PTRS_PER_S2_PGD_SHIFT);
 175         if (!hwpgd)
 176                 return -ENOMEM;
 177
 178         for (i = 0; i < PTRS_PER_S2_PGD; i++) {
 179                 if (KVM_PREALLOC_LEVEL == 1)
 180                         pgd_populate(NULL, pgd + i,
 181                                      (pud_t *)hwpgd + i * PTRS_PER_PUD);
 182                 else if (KVM_PREALLOC_LEVEL == 2)
 183                         pud_populate(NULL, pud_offset(pgd, 0) + i,
 184                                      (pmd_t *)hwpgd + i * PTRS_PER_PMD);
 185         }
 186
 187         return 0;
 188 }
 189
 190 static inline void *kvm_get_hwpgd(struct kvm *kvm)
 191 {
 192         pgd_t *pgd = kvm->arch.pgd;
 193         pud_t *pud;
 194
 195         if (KVM_PREALLOC_LEVEL == 0)
 196                 return pgd;
 197
 198         pud = pud_offset(pgd, 0);
 199         if (KVM_PREALLOC_LEVEL == 1)
 200                 return pud;
 201
 202         BUG_ON(KVM_PREALLOC_LEVEL != 2);
 203         return pmd_offset(pud, 0);
 204 }
 205
 206 static inline void kvm_free_hwpgd(struct kvm *kvm)
 207 {
 208         if (KVM_PREALLOC_LEVEL > 0) {
 209                 unsigned long hwpgd = (unsigned long)kvm_get_hwpgd(kvm);
 210                 free_pages(hwpgd, PTRS_PER_S2_PGD_SHIFT);
 211         }
 212 }
 213
 214 static inline bool kvm_page_empty(void *ptr)
 215 {
 216         struct page *ptr_page = virt_to_page(ptr);
 217         return page_count(ptr_page) == 1;
 218 }
 219
 220 #define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
 221
 222 #ifdef __PAGETABLE_PMD_FOLDED
 223 #define kvm_pmd_table_empty(kvm, pmdp) (0)
 224 #else
 225 #define kvm_pmd_table_empty(kvm, pmdp) \
 226         (kvm_page_empty(pmdp) && (!(kvm) || KVM_PREALLOC_LEVEL < 2))
 227 #endif
 228
 229 #ifdef __PAGETABLE_PUD_FOLDED
 230 #define kvm_pud_table_empty(kvm, pudp) (0)
 231 #else
 232 #define kvm_pud_table_empty(kvm, pudp) \
 233         (kvm_page_empty(pudp) && (!(kvm) || KVM_PREALLOC_LEVEL < 1))
 234 #endif
 235
 236
 237 struct kvm;
 238
 239 #define kvm_flush_dcache_to_poc(a,l)    __flush_dcache_area((a), (l))
 240
 241 static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
 242 {
 243         return (vcpu_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101;
 244 }
 245
 246 static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
 247                                                unsigned long size,
 248                                                bool ipa_uncached)
 249 {
 250         void *va = page_address(pfn_to_page(pfn));
 251
 252         if (!vcpu_has_cache_enabled(vcpu) || ipa_uncached)
 253                 kvm_flush_dcache_to_poc(va, size);
 254
 255         if (!icache_is_aliasing()) {            /* PIPT */
 256                 flush_icache_range((unsigned long)va,
 257                                    (unsigned long)va + size);
 258         } else if (!icache_is_aivivt()) {       /* non ASID-tagged VIVT */
 259                 /* any kind of VIPT cache */
 260                 __flush_icache_all();
 261         }
 262 }
 263
 264 static inline void __kvm_flush_dcache_pte(pte_t pte)
 265 {
 266         struct page *page = pte_page(pte);
 267         kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
 268 }
 269
 270 static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
 271 {
 272         struct page *page = pmd_page(pmd);
 273         kvm_flush_dcache_to_poc(page_address(page), PMD_SIZE);
 274 }
 275
 276 static inline void __kvm_flush_dcache_pud(pud_t pud)
 277 {
 278         struct page *page = pud_page(pud);
 279         kvm_flush_dcache_to_poc(page_address(page), PUD_SIZE);
 280 }
 281
 282 #define kvm_virt_to_phys(x)             __virt_to_phys((unsigned long)(x))
 283
 284 void kvm_set_way_flush(struct kvm_vcpu *vcpu);
 285 void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled);
 286
 287 #endif /* __ASSEMBLY__ */
 288 #endif /* __ARM64_KVM_MMU_H__ */