arch/arm64/include/asm/pgtable.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_PGTABLE_H
  17 #define __ASM_PGTABLE_H
  18
  19 #include <asm/bug.h>
  20 #include <asm/proc-fns.h>
  21
  22 #include <asm/memory.h>
  23 #include <asm/pgtable-hwdef.h>
  24 #include <asm/pgtable-prot.h>
  25
  26 /*
  27  * VMALLOC and SPARSEMEM_VMEMMAP ranges.
  28  *
  29  * VMEMAP_SIZE: allows the whole linear region to be covered by a struct page array
  30  *      (rounded up to PUD_SIZE).
  31  * VMALLOC_START: beginning of the kernel vmalloc space
  32  * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
  33  *      fixed mappings and modules
  34  */
  35 #define VMEMMAP_SIZE            ALIGN((1UL << (VA_BITS - PAGE_SHIFT - 1)) * sizeof(struct page), PUD_SIZE)
  36
  37 #define VMALLOC_START           (MODULES_END)
  38 #define VMALLOC_END             (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
  39
  40 #define VMEMMAP_START           (VMALLOC_END + SZ_64K)
  41 #define vmemmap                 ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
  42
  43 #define FIRST_USER_ADDRESS      0UL
  44
  45 #ifndef __ASSEMBLY__
  46
  47 #include <asm/fixmap.h>
  48 #include <linux/mmdebug.h>
  49
  50 extern void __pte_error(const char *file, int line, unsigned long val);
  51 extern void __pmd_error(const char *file, int line, unsigned long val);
  52 extern void __pud_error(const char *file, int line, unsigned long val);
  53 extern void __pgd_error(const char *file, int line, unsigned long val);
  54
  55 /*
  56  * ZERO_PAGE is a global shared page that is always zero: used
  57  * for zero-mapped memory areas etc..
  58  */
  59 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  60 #define ZERO_PAGE(vaddr)        pfn_to_page(PHYS_PFN(__pa(empty_zero_page)))
  61
  62 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
  63
  64 #define pte_pfn(pte)            ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
  65
  66 #define pfn_pte(pfn,prot)       (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
  67
  68 #define pte_none(pte)           (!pte_val(pte))
  69 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
  70 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
  71
  72 /*
  73  * The following only work if pte_present(). Undefined behaviour otherwise.
  74  */
  75 #define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
  76 #define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
  77 #define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
  78 #define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
  79 #define pte_exec(pte)           (!(pte_val(pte) & PTE_UXN))
  80 #define pte_cont(pte)           (!!(pte_val(pte) & PTE_CONT))
  81 #define pte_user(pte)           (!!(pte_val(pte) & PTE_USER))
  82
  83 #ifdef CONFIG_ARM64_HW_AFDBM
  84 #define pte_hw_dirty(pte)       (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
  85 #else
  86 #define pte_hw_dirty(pte)       (0)
  87 #endif
  88 #define pte_sw_dirty(pte)       (!!(pte_val(pte) & PTE_DIRTY))
  89 #define pte_dirty(pte)          (pte_sw_dirty(pte) || pte_hw_dirty(pte))
  90
  91 #define pte_valid(pte)          (!!(pte_val(pte) & PTE_VALID))
  92 #define pte_valid_not_user(pte) \
  93         ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
  94 #define pte_valid_young(pte) \
  95         ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
  96
  97 /*
  98  * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
  99  * so that we don't erroneously return false for pages that have been
 100  * remapped as PROT_NONE but are yet to be flushed from the TLB.
 101  */
 102 #define pte_accessible(mm, pte) \
 103         (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
 104
 105 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
 106 {
 107         pte_val(pte) &= ~pgprot_val(prot);
 108         return pte;
 109 }
 110
 111 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
 112 {
 113         pte_val(pte) |= pgprot_val(prot);
 114         return pte;
 115 }
 116
 117 static inline pte_t pte_wrprotect(pte_t pte)
 118 {
 119         return clear_pte_bit(pte, __pgprot(PTE_WRITE));
 120 }
 121
 122 static inline pte_t pte_mkwrite(pte_t pte)
 123 {
 124         return set_pte_bit(pte, __pgprot(PTE_WRITE));
 125 }
 126
 127 static inline pte_t pte_mkclean(pte_t pte)
 128 {
 129         return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
 130 }
 131
 132 static inline pte_t pte_mkdirty(pte_t pte)
 133 {
 134         return set_pte_bit(pte, __pgprot(PTE_DIRTY));
 135 }
 136
 137 static inline pte_t pte_mkold(pte_t pte)
 138 {
 139         return clear_pte_bit(pte, __pgprot(PTE_AF));
 140 }
 141
 142 static inline pte_t pte_mkyoung(pte_t pte)
 143 {
 144         return set_pte_bit(pte, __pgprot(PTE_AF));
 145 }
 146
 147 static inline pte_t pte_mkspecial(pte_t pte)
 148 {
 149         return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
 150 }
 151
 152 static inline pte_t pte_mkcont(pte_t pte)
 153 {
 154         pte = set_pte_bit(pte, __pgprot(PTE_CONT));
 155         return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
 156 }
 157
 158 static inline pte_t pte_mknoncont(pte_t pte)
 159 {
 160         return clear_pte_bit(pte, __pgprot(PTE_CONT));
 161 }
 162
 163 static inline pmd_t pmd_mkcont(pmd_t pmd)
 164 {
 165         return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
 166 }
 167
 168 static inline void set_pte(pte_t *ptep, pte_t pte)
 169 {
 170         *ptep = pte;
 171
 172         /*
 173          * Only if the new pte is valid and kernel, otherwise TLB maintenance
 174          * or update_mmu_cache() have the necessary barriers.
 175          */
 176         if (pte_valid_not_user(pte)) {
 177                 dsb(ishst);
 178                 isb();
 179         }
 180 }
 181
 182 struct mm_struct;
 183 struct vm_area_struct;
 184
 185 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
 186
 187 /*
 188  * PTE bits configuration in the presence of hardware Dirty Bit Management
 189  * (PTE_WRITE == PTE_DBM):
 190  *
 191  * Dirty  Writable | PTE_RDONLY  PTE_WRITE  PTE_DIRTY (sw)
 192  *   0      0      |   1           0          0
 193  *   0      1      |   1           1          0
 194  *   1      0      |   1           0          1
 195  *   1      1      |   0           1          x
 196  *
 197  * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
 198  * the page fault mechanism. Checking the dirty status of a pte becomes:
 199  *
 200  *   PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
 201  */
 202 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 203                               pte_t *ptep, pte_t pte)
 204 {
 205         if (pte_present(pte)) {
 206                 if (pte_sw_dirty(pte) && pte_write(pte))
 207                         pte_val(pte) &= ~PTE_RDONLY;
 208                 else
 209                         pte_val(pte) |= PTE_RDONLY;
 210                 if (pte_user(pte) && pte_exec(pte) && !pte_special(pte))
 211                         __sync_icache_dcache(pte, addr);
 212         }
 213
 214         /*
 215          * If the existing pte is valid, check for potential race with
 216          * hardware updates of the pte (ptep_set_access_flags safely changes
 217          * valid ptes without going through an invalid entry).
 218          */
 219         if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
 220             pte_valid(*ptep) && pte_valid(pte)) {
 221                 VM_WARN_ONCE(!pte_young(pte),
 222                              "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
 223                              __func__, pte_val(*ptep), pte_val(pte));
 224                 VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte),
 225                              "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
 226                              __func__, pte_val(*ptep), pte_val(pte));
 227         }
 228
 229         set_pte(ptep, pte);
 230 }
 231
 232 /*
 233  * Huge pte definitions.
 234  */
 235 #define pte_huge(pte)           (!(pte_val(pte) & PTE_TABLE_BIT))
 236 #define pte_mkhuge(pte)         (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
 237
 238 /*
 239  * Hugetlb definitions.
 240  */
 241 #define HUGE_MAX_HSTATE         4
 242 #define HPAGE_SHIFT             PMD_SHIFT
 243 #define HPAGE_SIZE              (_AC(1, UL) << HPAGE_SHIFT)
 244 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 245 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 246
 247 #define __HAVE_ARCH_PTE_SPECIAL
 248
 249 static inline pte_t pud_pte(pud_t pud)
 250 {
 251         return __pte(pud_val(pud));
 252 }
 253
 254 static inline pmd_t pud_pmd(pud_t pud)
 255 {
 256         return __pmd(pud_val(pud));
 257 }
 258
 259 static inline pte_t pmd_pte(pmd_t pmd)
 260 {
 261         return __pte(pmd_val(pmd));
 262 }
 263
 264 static inline pmd_t pte_pmd(pte_t pte)
 265 {
 266         return __pmd(pte_val(pte));
 267 }
 268
 269 static inline pgprot_t mk_sect_prot(pgprot_t prot)
 270 {
 271         return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
 272 }
 273
 274 /*
 275  * THP definitions.
 276  */
 277
 278 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 279 #define pmd_trans_huge(pmd)     (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
 280 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 281
 282 #define pmd_dirty(pmd)          pte_dirty(pmd_pte(pmd))
 283 #define pmd_young(pmd)          pte_young(pmd_pte(pmd))
 284 #define pmd_wrprotect(pmd)      pte_pmd(pte_wrprotect(pmd_pte(pmd)))
 285 #define pmd_mkold(pmd)          pte_pmd(pte_mkold(pmd_pte(pmd)))
 286 #define pmd_mkwrite(pmd)        pte_pmd(pte_mkwrite(pmd_pte(pmd)))
 287 #define pmd_mkclean(pmd)       pte_pmd(pte_mkclean(pmd_pte(pmd)))
 288 #define pmd_mkdirty(pmd)        pte_pmd(pte_mkdirty(pmd_pte(pmd)))
 289 #define pmd_mkyoung(pmd)        pte_pmd(pte_mkyoung(pmd_pte(pmd)))
 290 #define pmd_mknotpresent(pmd)   (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
 291
 292 #define __HAVE_ARCH_PMD_WRITE
 293 #define pmd_write(pmd)          pte_write(pmd_pte(pmd))
 294
 295 #define pmd_mkhuge(pmd)         (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
 296
 297 #define pmd_pfn(pmd)            (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 298 #define pfn_pmd(pfn,prot)       (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 299 #define mk_pmd(page,prot)       pfn_pmd(page_to_pfn(page),prot)
 300
 301 #define pud_write(pud)          pte_write(pud_pte(pud))
 302 #define pud_pfn(pud)            (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 303
 304 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 305
 306 static inline int has_transparent_hugepage(void)
 307 {
 308         return 1;
 309 }
 310
 311 #define __pgprot_modify(prot,mask,bits) \
 312         __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
 313
 314 /*
 315  * Mark the prot value as uncacheable and unbufferable.
 316  */
 317 #define pgprot_noncached(prot) \
 318         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 319 #define pgprot_writecombine(prot) \
 320         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
 321 #define pgprot_device(prot) \
 322         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 323 #define __HAVE_PHYS_MEM_ACCESS_PROT
 324 struct file;
 325 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 326                                      unsigned long size, pgprot_t vma_prot);
 327
 328 #define pmd_none(pmd)           (!pmd_val(pmd))
 329 #define pmd_present(pmd)        (pmd_val(pmd))
 330
 331 #define pmd_bad(pmd)            (!(pmd_val(pmd) & 2))
 332
 333 #define pmd_table(pmd)          ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 334                                  PMD_TYPE_TABLE)
 335 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 336                                  PMD_TYPE_SECT)
 337
 338 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
 339 #define pud_sect(pud)           (0)
 340 #define pud_table(pud)          (1)
 341 #else
 342 #define pud_sect(pud)           ((pud_val(pud) & PUD_TYPE_MASK) == \
 343                                  PUD_TYPE_SECT)
 344 #define pud_table(pud)          ((pud_val(pud) & PUD_TYPE_MASK) == \
 345                                  PUD_TYPE_TABLE)
 346 #endif
 347
 348 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 349 {
 350         *pmdp = pmd;
 351         dsb(ishst);
 352         isb();
 353 }
 354
 355 static inline void pmd_clear(pmd_t *pmdp)
 356 {
 357         set_pmd(pmdp, __pmd(0));
 358 }
 359
 360 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
 361 {
 362         return pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK;
 363 }
 364
 365 /* Find an entry in the third-level page table. */
 366 #define pte_index(addr)         (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 367
 368 #define pte_offset_phys(dir,addr)       (pmd_page_paddr(*(dir)) + pte_index(addr) * sizeof(pte_t))
 369 #define pte_offset_kernel(dir,addr)     ((pte_t *)__va(pte_offset_phys((dir), (addr))))
 370
 371 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 372 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 373 #define pte_unmap(pte)                  do { } while (0)
 374 #define pte_unmap_nested(pte)           do { } while (0)
 375
 376 #define pte_set_fixmap(addr)            ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
 377 #define pte_set_fixmap_offset(pmd, addr)        pte_set_fixmap(pte_offset_phys(pmd, addr))
 378 #define pte_clear_fixmap()              clear_fixmap(FIX_PTE)
 379
 380 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
 381
 382 /* use ONLY for statically allocated translation tables */
 383 #define pte_offset_kimg(dir,addr)       ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
 384
 385 /*
 386  * Conversion functions: convert a page and protection to a page entry,
 387  * and a page entry and page directory to the page they refer to.
 388  */
 389 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
 390
 391 #if CONFIG_PGTABLE_LEVELS > 2
 392
 393 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 394
 395 #define pud_none(pud)           (!pud_val(pud))
 396 #define pud_bad(pud)            (!(pud_val(pud) & 2))
 397 #define pud_present(pud)        (pud_val(pud))
 398
 399 static inline void set_pud(pud_t *pudp, pud_t pud)
 400 {
 401         *pudp = pud;
 402         dsb(ishst);
 403         isb();
 404 }
 405
 406 static inline void pud_clear(pud_t *pudp)
 407 {
 408         set_pud(pudp, __pud(0));
 409 }
 410
 411 static inline phys_addr_t pud_page_paddr(pud_t pud)
 412 {
 413         return pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK;
 414 }
 415
 416 /* Find an entry in the second-level page table. */
 417 #define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 418
 419 #define pmd_offset_phys(dir, addr)      (pud_page_paddr(*(dir)) + pmd_index(addr) * sizeof(pmd_t))
 420 #define pmd_offset(dir, addr)           ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
 421
 422 #define pmd_set_fixmap(addr)            ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
 423 #define pmd_set_fixmap_offset(pud, addr)        pmd_set_fixmap(pmd_offset_phys(pud, addr))
 424 #define pmd_clear_fixmap()              clear_fixmap(FIX_PMD)
 425
 426 #define pud_page(pud)           pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
 427
 428 /* use ONLY for statically allocated translation tables */
 429 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
 430
 431 #else
 432
 433 #define pud_page_paddr(pud)     ({ BUILD_BUG(); 0; })
 434
 435 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
 436 #define pmd_set_fixmap(addr)            NULL
 437 #define pmd_set_fixmap_offset(pudp, addr)       ((pmd_t *)pudp)
 438 #define pmd_clear_fixmap()
 439
 440 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)dir)
 441
 442 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 443
 444 #if CONFIG_PGTABLE_LEVELS > 3
 445
 446 #define pud_ERROR(pud)          __pud_error(__FILE__, __LINE__, pud_val(pud))
 447
 448 #define pgd_none(pgd)           (!pgd_val(pgd))
 449 #define pgd_bad(pgd)            (!(pgd_val(pgd) & 2))
 450 #define pgd_present(pgd)        (pgd_val(pgd))
 451
 452 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 453 {
 454         *pgdp = pgd;
 455         dsb(ishst);
 456 }
 457
 458 static inline void pgd_clear(pgd_t *pgdp)
 459 {
 460         set_pgd(pgdp, __pgd(0));
 461 }
 462
 463 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
 464 {
 465         return pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK;
 466 }
 467
 468 /* Find an entry in the frst-level page table. */
 469 #define pud_index(addr)         (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
 470
 471 #define pud_offset_phys(dir, addr)      (pgd_page_paddr(*(dir)) + pud_index(addr) * sizeof(pud_t))
 472 #define pud_offset(dir, addr)           ((pud_t *)__va(pud_offset_phys((dir), (addr))))
 473
 474 #define pud_set_fixmap(addr)            ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
 475 #define pud_set_fixmap_offset(pgd, addr)        pud_set_fixmap(pud_offset_phys(pgd, addr))
 476 #define pud_clear_fixmap()              clear_fixmap(FIX_PUD)
 477
 478 #define pgd_page(pgd)           pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
 479
 480 /* use ONLY for statically allocated translation tables */
 481 #define pud_offset_kimg(dir,addr)       ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
 482
 483 #else
 484
 485 #define pgd_page_paddr(pgd)     ({ BUILD_BUG(); 0;})
 486
 487 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
 488 #define pud_set_fixmap(addr)            NULL
 489 #define pud_set_fixmap_offset(pgdp, addr)       ((pud_t *)pgdp)
 490 #define pud_clear_fixmap()
 491
 492 #define pud_offset_kimg(dir,addr)       ((pud_t *)dir)
 493
 494 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 495
 496 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
 497
 498 /* to find an entry in a page-table-directory */
 499 #define pgd_index(addr)         (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 500
 501 #define pgd_offset_raw(pgd, addr)       ((pgd) + pgd_index(addr))
 502
 503 #define pgd_offset(mm, addr)    (pgd_offset_raw((mm)->pgd, (addr)))
 504
 505 /* to find an entry in a kernel page-table-directory */
 506 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 507
 508 #define pgd_set_fixmap(addr)    ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
 509 #define pgd_clear_fixmap()      clear_fixmap(FIX_PGD)
 510
 511 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 512 {
 513         const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
 514                               PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
 515         /* preserve the hardware dirty information */
 516         if (pte_hw_dirty(pte))
 517                 pte = pte_mkdirty(pte);
 518         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
 519         return pte;
 520 }
 521
 522 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 523 {
 524         return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
 525 }
 526
 527 #ifdef CONFIG_ARM64_HW_AFDBM
 528 /*
 529  * Atomic pte/pmd modifications.
 530  */
 531 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 532 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 533                                             unsigned long address,
 534                                             pte_t *ptep)
 535 {
 536         pteval_t pteval;
 537         unsigned int tmp, res;
 538
 539         asm volatile("//        ptep_test_and_clear_young\n"
 540         "       prfm    pstl1strm, %2\n"
 541         "1:     ldxr    %0, %2\n"
 542         "       ubfx    %w3, %w0, %5, #1        // extract PTE_AF (young)\n"
 543         "       and     %0, %0, %4              // clear PTE_AF\n"
 544         "       stxr    %w1, %0, %2\n"
 545         "       cbnz    %w1, 1b\n"
 546         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
 547         : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
 548
 549         return res;
 550 }
 551
 552 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 553 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 554 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 555                                             unsigned long address,
 556                                             pmd_t *pmdp)
 557 {
 558         return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
 559 }
 560 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 561
 562 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 563 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 564                                        unsigned long address, pte_t *ptep)
 565 {
 566         pteval_t old_pteval;
 567         unsigned int tmp;
 568
 569         asm volatile("//        ptep_get_and_clear\n"
 570         "       prfm    pstl1strm, %2\n"
 571         "1:     ldxr    %0, %2\n"
 572         "       stxr    %w1, xzr, %2\n"
 573         "       cbnz    %w1, 1b\n"
 574         : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
 575
 576         return __pte(old_pteval);
 577 }
 578
 579 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 580 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
 581 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
 582                                        unsigned long address, pmd_t *pmdp)
 583 {
 584         return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
 585 }
 586 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 587
 588 /*
 589  * ptep_set_wrprotect - mark read-only while trasferring potential hardware
 590  * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
 591  */
 592 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 593 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 594 {
 595         pteval_t pteval;
 596         unsigned long tmp;
 597
 598         asm volatile("//        ptep_set_wrprotect\n"
 599         "       prfm    pstl1strm, %2\n"
 600         "1:     ldxr    %0, %2\n"
 601         "       tst     %0, %4                  // check for hw dirty (!PTE_RDONLY)\n"
 602         "       csel    %1, %3, xzr, eq         // set PTE_DIRTY|PTE_RDONLY if dirty\n"
 603         "       orr     %0, %0, %1              // if !dirty, PTE_RDONLY is already set\n"
 604         "       and     %0, %0, %5              // clear PTE_WRITE/PTE_DBM\n"
 605         "       stxr    %w1, %0, %2\n"
 606         "       cbnz    %w1, 1b\n"
 607         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
 608         : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
 609         : "cc");
 610 }
 611
 612 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 613 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 614 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 615                                       unsigned long address, pmd_t *pmdp)
 616 {
 617         ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
 618 }
 619 #endif
 620 #endif  /* CONFIG_ARM64_HW_AFDBM */
 621
 622 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 623 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
 624
 625 /*
 626  * Encode and decode a swap entry:
 627  *      bits 0-1:       present (must be zero)
 628  *      bits 2-7:       swap type
 629  *      bits 8-57:      swap offset
 630  *      bit  58:        PTE_PROT_NONE (must be zero)
 631  */
 632 #define __SWP_TYPE_SHIFT        2
 633 #define __SWP_TYPE_BITS         6
 634 #define __SWP_OFFSET_BITS       50
 635 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 636 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 637 #define __SWP_OFFSET_MASK       ((1UL << __SWP_OFFSET_BITS) - 1)
 638
 639 #define __swp_type(x)           (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 640 #define __swp_offset(x)         (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
 641 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
 642
 643 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 644 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
 645
 646 /*
 647  * Ensure that there are not more swap files than can be encoded in the kernel
 648  * PTEs.
 649  */
 650 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
 651
 652 extern int kern_addr_valid(unsigned long addr);
 653
 654 #include <asm-generic/pgtable.h>
 655
 656 void pgd_cache_init(void);
 657 #define pgtable_cache_init      pgd_cache_init
 658
 659 /*
 660  * On AArch64, the cache coherency is handled via the set_pte_at() function.
 661  */
 662 static inline void update_mmu_cache(struct vm_area_struct *vma,
 663                                     unsigned long addr, pte_t *ptep)
 664 {
 665         /*
 666          * We don't do anything here, so there's a very small chance of
 667          * us retaking a user fault which we just fixed up. The alternative
 668          * is doing a dsb(ishst), but that penalises the fastpath.
 669          */
 670 }
 671
 672 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 673
 674 #define kc_vaddr_to_offset(v)   ((v) & ~VA_START)
 675 #define kc_offset_to_vaddr(o)   ((o) | VA_START)
 676
 677 #endif /* !__ASSEMBLY__ */
 678
 679 #endif /* __ASM_PGTABLE_H */