arch/arm64/kernel/process.c

   1 /*
   2  * Based on arch/arm/kernel/process.c
   3  *
   4  * Original Copyright (C) 1995  Linus Torvalds
   5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
   6  * Copyright (C) 2012 ARM Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdarg.h>
  22
  23 #include <linux/compat.h>
  24 #include <linux/efi.h>
  25 #include <linux/export.h>
  26 #include <linux/sched.h>
  27 #include <linux/kernel.h>
  28 #include <linux/mm.h>
  29 #include <linux/stddef.h>
  30 #include <linux/unistd.h>
  31 #include <linux/user.h>
  32 #include <linux/delay.h>
  33 #include <linux/reboot.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kallsyms.h>
  36 #include <linux/init.h>
  37 #include <linux/cpu.h>
  38 #include <linux/elfcore.h>
  39 #include <linux/pm.h>
  40 #include <linux/tick.h>
  41 #include <linux/utsname.h>
  42 #include <linux/uaccess.h>
  43 #include <linux/random.h>
  44 #include <linux/hw_breakpoint.h>
  45 #include <linux/personality.h>
  46 #include <linux/notifier.h>
  47
  48 #include <asm/compat.h>
  49 #include <asm/cacheflush.h>
  50 #include <asm/fpsimd.h>
  51 #include <asm/mmu_context.h>
  52 #include <asm/processor.h>
  53 #include <asm/stacktrace.h>
  54
  55 #ifdef CONFIG_CC_STACKPROTECTOR
  56 #include <linux/stackprotector.h>
  57 unsigned long __stack_chk_guard __read_mostly;
  58 EXPORT_SYMBOL(__stack_chk_guard);
  59 #endif
  60
  61 /*
  62  * Function pointers to optional machine specific functions
  63  */
  64 void (*pm_power_off)(void);
  65 EXPORT_SYMBOL_GPL(pm_power_off);
  66
  67 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
  68
  69 /*
  70  * This is our default idle handler.
  71  */
  72 void arch_cpu_idle(void)
  73 {
  74         /*
  75          * This should do all the clock switching and wait for interrupt
  76          * tricks
  77          */
  78         cpu_do_idle();
  79         local_irq_enable();
  80 }
  81
  82 #ifdef CONFIG_HOTPLUG_CPU
  83 void arch_cpu_idle_dead(void)
  84 {
  85        cpu_die();
  86 }
  87 #endif
  88
  89 /*
  90  * Called by kexec, immediately prior to machine_kexec().
  91  *
  92  * This must completely disable all secondary CPUs; simply causing those CPUs
  93  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
  94  * kexec'd kernel to use any and all RAM as it sees fit, without having to
  95  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
  96  * functionality embodied in disable_nonboot_cpus() to achieve this.
  97  */
  98 void machine_shutdown(void)
  99 {
 100         disable_nonboot_cpus();
 101 }
 102
 103 /*
 104  * Halting simply requires that the secondary CPUs stop performing any
 105  * activity (executing tasks, handling interrupts). smp_send_stop()
 106  * achieves this.
 107  */
 108 void machine_halt(void)
 109 {
 110         local_irq_disable();
 111         smp_send_stop();
 112         while (1);
 113 }
 114
 115 /*
 116  * Power-off simply requires that the secondary CPUs stop performing any
 117  * activity (executing tasks, handling interrupts). smp_send_stop()
 118  * achieves this. When the system power is turned off, it will take all CPUs
 119  * with it.
 120  */
 121 void machine_power_off(void)
 122 {
 123         local_irq_disable();
 124         smp_send_stop();
 125         if (pm_power_off)
 126                 pm_power_off();
 127 }
 128
 129 /*
 130  * Restart requires that the secondary CPUs stop performing any activity
 131  * while the primary CPU resets the system. Systems with multiple CPUs must
 132  * provide a HW restart implementation, to ensure that all CPUs reset at once.
 133  * This is required so that any code running after reset on the primary CPU
 134  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 135  * executing pre-reset code, and using RAM that the primary CPU's code wishes
 136  * to use. Implementing such co-ordination would be essentially impossible.
 137  */
 138 void machine_restart(char *cmd)
 139 {
 140         /* Disable interrupts first */
 141         local_irq_disable();
 142         smp_send_stop();
 143
 144         /*
 145          * UpdateCapsule() depends on the system being reset via
 146          * ResetSystem().
 147          */
 148         if (efi_enabled(EFI_RUNTIME_SERVICES))
 149                 efi_reboot(reboot_mode, NULL);
 150
 151         /* Now call the architecture specific reboot code. */
 152         if (arm_pm_restart)
 153                 arm_pm_restart(reboot_mode, cmd);
 154         else
 155                 do_kernel_restart(cmd);
 156
 157         /*
 158          * Whoops - the architecture was unable to reboot.
 159          */
 160         printk("Reboot failed -- System halted\n");
 161         while (1);
 162 }
 163
 164 void __show_regs(struct pt_regs *regs)
 165 {
 166         int i, top_reg;
 167         u64 lr, sp;
 168
 169         if (compat_user_mode(regs)) {
 170                 lr = regs->compat_lr;
 171                 sp = regs->compat_sp;
 172                 top_reg = 12;
 173         } else {
 174                 lr = regs->regs[30];
 175                 sp = regs->sp;
 176                 top_reg = 29;
 177         }
 178
 179         show_regs_print_info(KERN_DEFAULT);
 180         print_symbol("PC is at %s\n", instruction_pointer(regs));
 181         print_symbol("LR is at %s\n", lr);
 182         printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
 183                regs->pc, lr, regs->pstate);
 184         printk("sp : %016llx\n", sp);
 185         for (i = top_reg; i >= 0; i--) {
 186                 printk("x%-2d: %016llx ", i, regs->regs[i]);
 187                 if (i % 2 == 0)
 188                         printk("\n");
 189         }
 190         printk("\n");
 191 }
 192
 193 void show_regs(struct pt_regs * regs)
 194 {
 195         printk("\n");
 196         __show_regs(regs);
 197 }
 198
 199 /*
 200  * Free current thread data structures etc..
 201  */
 202 void exit_thread(void)
 203 {
 204 }
 205
 206 static void tls_thread_flush(void)
 207 {
 208         asm ("msr tpidr_el0, xzr");
 209
 210         if (is_compat_task()) {
 211                 current->thread.tp_value = 0;
 212
 213                 /*
 214                  * We need to ensure ordering between the shadow state and the
 215                  * hardware state, so that we don't corrupt the hardware state
 216                  * with a stale shadow state during context switch.
 217                  */
 218                 barrier();
 219                 asm ("msr tpidrro_el0, xzr");
 220         }
 221 }
 222
 223 void flush_thread(void)
 224 {
 225         fpsimd_flush_thread();
 226         tls_thread_flush();
 227         flush_ptrace_hw_breakpoint(current);
 228 }
 229
 230 void release_thread(struct task_struct *dead_task)
 231 {
 232 }
 233
 234 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 235 {
 236         if (current->mm)
 237                 fpsimd_preserve_current_state();
 238         *dst = *src;
 239         return 0;
 240 }
 241
 242 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
 243
 244 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
 245                 unsigned long stk_sz, struct task_struct *p)
 246 {
 247         struct pt_regs *childregs = task_pt_regs(p);
 248
 249         memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
 250
 251         if (likely(!(p->flags & PF_KTHREAD))) {
 252                 *childregs = *current_pt_regs();
 253                 childregs->regs[0] = 0;
 254
 255                 /*
 256                  * Read the current TLS pointer from tpidr_el0 as it may be
 257                  * out-of-sync with the saved value.
 258                  */
 259                 asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p)));
 260
 261                 if (stack_start) {
 262                         if (is_compat_thread(task_thread_info(p)))
 263                                 childregs->compat_sp = stack_start;
 264                         /* 16-byte aligned stack mandatory on AArch64 */
 265                         else if (stack_start & 15)
 266                                 return -EINVAL;
 267                         else
 268                                 childregs->sp = stack_start;
 269                 }
 270
 271                 /*
 272                  * If a TLS pointer was passed to clone (4th argument), use it
 273                  * for the new thread.
 274                  */
 275                 if (clone_flags & CLONE_SETTLS)
 276                         p->thread.tp_value = childregs->regs[3];
 277         } else {
 278                 memset(childregs, 0, sizeof(struct pt_regs));
 279                 childregs->pstate = PSR_MODE_EL1h;
 280                 p->thread.cpu_context.x19 = stack_start;
 281                 p->thread.cpu_context.x20 = stk_sz;
 282         }
 283         p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
 284         p->thread.cpu_context.sp = (unsigned long)childregs;
 285
 286         ptrace_hw_copy_thread(p);
 287
 288         return 0;
 289 }
 290
 291 static void tls_thread_switch(struct task_struct *next)
 292 {
 293         unsigned long tpidr, tpidrro;
 294
 295         asm("mrs %0, tpidr_el0" : "=r" (tpidr));
 296         *task_user_tls(current) = tpidr;
 297
 298         tpidr = *task_user_tls(next);
 299         tpidrro = is_compat_thread(task_thread_info(next)) ?
 300                   next->thread.tp_value : 0;
 301
 302         asm(
 303         "       msr     tpidr_el0, %0\n"
 304         "       msr     tpidrro_el0, %1"
 305         : : "r" (tpidr), "r" (tpidrro));
 306 }
 307
 308 /*
 309  * Thread switching.
 310  */
 311 struct task_struct *__switch_to(struct task_struct *prev,
 312                                 struct task_struct *next)
 313 {
 314         struct task_struct *last;
 315
 316         fpsimd_thread_switch(next);
 317         tls_thread_switch(next);
 318         hw_breakpoint_thread_switch(next);
 319         contextidr_thread_switch(next);
 320
 321         /*
 322          * Complete any pending TLB or cache maintenance on this CPU in case
 323          * the thread migrates to a different CPU.
 324          */
 325         dsb(ish);
 326
 327         /* the actual thread switch */
 328         last = cpu_switch_to(prev, next);
 329
 330         return last;
 331 }
 332
 333 unsigned long get_wchan(struct task_struct *p)
 334 {
 335         struct stackframe frame;
 336         unsigned long stack_page;
 337         int count = 0;
 338         if (!p || p == current || p->state == TASK_RUNNING)
 339                 return 0;
 340
 341         frame.fp = thread_saved_fp(p);
 342         frame.sp = thread_saved_sp(p);
 343         frame.pc = thread_saved_pc(p);
 344         stack_page = (unsigned long)task_stack_page(p);
 345         do {
 346                 if (frame.sp < stack_page ||
 347                     frame.sp >= stack_page + THREAD_SIZE ||
 348                     unwind_frame(&frame))
 349                         return 0;
 350                 if (!in_sched_functions(frame.pc))
 351                         return frame.pc;
 352         } while (count ++ < 16);
 353         return 0;
 354 }
 355
 356 unsigned long arch_align_stack(unsigned long sp)
 357 {
 358         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 359                 sp -= get_random_int() & ~PAGE_MASK;
 360         return sp & ~0xf;
 361 }
 362
 363 static unsigned long randomize_base(unsigned long base)
 364 {
 365         unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
 366         return randomize_range(base, range_end, 0) ? : base;
 367 }
 368
 369 unsigned long arch_randomize_brk(struct mm_struct *mm)
 370 {
 371         return randomize_base(mm->brk);
 372 }