arch/arm64/kernel/smp.c

   1 /*
   2  * SMP initialisation and IPI support
   3  * Based on arch/arm/kernel/smp.c
   4  *
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/init.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/sched.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/cache.h>
  26 #include <linux/profile.h>
  27 #include <linux/errno.h>
  28 #include <linux/mm.h>
  29 #include <linux/err.h>
  30 #include <linux/cpu.h>
  31 #include <linux/smp.h>
  32 #include <linux/seq_file.h>
  33 #include <linux/irq.h>
  34 #include <linux/percpu.h>
  35 #include <linux/clockchips.h>
  36 #include <linux/completion.h>
  37 #include <linux/of.h>
  38
  39 #include <asm/atomic.h>
  40 #include <asm/cacheflush.h>
  41 #include <asm/cputype.h>
  42 #include <asm/cpu_ops.h>
  43 #include <asm/mmu_context.h>
  44 #include <asm/pgtable.h>
  45 #include <asm/pgalloc.h>
  46 #include <asm/processor.h>
  47 #include <asm/smp_plat.h>
  48 #include <asm/sections.h>
  49 #include <asm/tlbflush.h>
  50 #include <asm/ptrace.h>
  51
  52 /*
  53  * as from 2.5, kernels no longer have an init_tasks structure
  54  * so we need some other way of telling a new secondary core
  55  * where to place its SVC stack
  56  */
  57 struct secondary_data secondary_data;
  58
  59 enum ipi_msg_type {
  60         IPI_RESCHEDULE,
  61         IPI_CALL_FUNC,
  62         IPI_CALL_FUNC_SINGLE,
  63         IPI_CPU_STOP,
  64         IPI_TIMER,
  65 };
  66
  67 /*
  68  * Boot a secondary CPU, and assign it the specified idle task.
  69  * This also gives us the initial stack to use for this CPU.
  70  */
  71 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  72 {
  73         if (cpu_ops[cpu]->cpu_boot)
  74                 return cpu_ops[cpu]->cpu_boot(cpu);
  75
  76         return -EOPNOTSUPP;
  77 }
  78
  79 static DECLARE_COMPLETION(cpu_running);
  80
  81 int __cpu_up(unsigned int cpu, struct task_struct *idle)
  82 {
  83         int ret;
  84
  85         /*
  86          * We need to tell the secondary core where to find its stack and the
  87          * page tables.
  88          */
  89         secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  90         __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  91
  92         /*
  93          * Now bring the CPU into our world.
  94          */
  95         ret = boot_secondary(cpu, idle);
  96         if (ret == 0) {
  97                 /*
  98                  * CPU was successfully started, wait for it to come online or
  99                  * time out.
 100                  */
 101                 wait_for_completion_timeout(&cpu_running,
 102                                             msecs_to_jiffies(1000));
 103
 104                 if (!cpu_online(cpu)) {
 105                         pr_crit("CPU%u: failed to come online\n", cpu);
 106                         ret = -EIO;
 107                 }
 108         } else {
 109                 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
 110         }
 111
 112         secondary_data.stack = NULL;
 113
 114         return ret;
 115 }
 116
 117 /*
 118  * This is the secondary CPU boot entry.  We're using this CPUs
 119  * idle thread stack, but a set of temporary page tables.
 120  */
 121 asmlinkage void secondary_start_kernel(void)
 122 {
 123         struct mm_struct *mm = &init_mm;
 124         unsigned int cpu = smp_processor_id();
 125
 126         /*
 127          * All kernel threads share the same mm context; grab a
 128          * reference and switch to it.
 129          */
 130         atomic_inc(&mm->mm_count);
 131         current->active_mm = mm;
 132         cpumask_set_cpu(cpu, mm_cpumask(mm));
 133
 134         set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
 135         printk("CPU%u: Booted secondary processor\n", cpu);
 136
 137         /*
 138          * TTBR0 is only used for the identity mapping at this stage. Make it
 139          * point to zero page to avoid speculatively fetching new entries.
 140          */
 141         cpu_set_reserved_ttbr0();
 142         flush_tlb_all();
 143
 144         preempt_disable();
 145         trace_hardirqs_off();
 146
 147         if (cpu_ops[cpu]->cpu_postboot)
 148                 cpu_ops[cpu]->cpu_postboot();
 149
 150         /*
 151          * Enable GIC and timers.
 152          */
 153         notify_cpu_starting(cpu);
 154
 155         /*
 156          * OK, now it's safe to let the boot CPU continue.  Wait for
 157          * the CPU migration code to notice that the CPU is online
 158          * before we continue.
 159          */
 160         set_cpu_online(cpu, true);
 161         complete(&cpu_running);
 162
 163         local_dbg_enable();
 164         local_irq_enable();
 165         local_async_enable();
 166
 167         /*
 168          * OK, it's off to the idle thread for us
 169          */
 170         cpu_startup_entry(CPUHP_ONLINE);
 171 }
 172
 173 #ifdef CONFIG_HOTPLUG_CPU
 174 static int op_cpu_disable(unsigned int cpu)
 175 {
 176         /*
 177          * If we don't have a cpu_die method, abort before we reach the point
 178          * of no return. CPU0 may not have an cpu_ops, so test for it.
 179          */
 180         if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
 181                 return -EOPNOTSUPP;
 182
 183         /*
 184          * We may need to abort a hot unplug for some other mechanism-specific
 185          * reason.
 186          */
 187         if (cpu_ops[cpu]->cpu_disable)
 188                 return cpu_ops[cpu]->cpu_disable(cpu);
 189
 190         return 0;
 191 }
 192
 193 /*
 194  * __cpu_disable runs on the processor to be shutdown.
 195  */
 196 int __cpu_disable(void)
 197 {
 198         unsigned int cpu = smp_processor_id();
 199         int ret;
 200
 201         ret = op_cpu_disable(cpu);
 202         if (ret)
 203                 return ret;
 204
 205         /*
 206          * Take this CPU offline.  Once we clear this, we can't return,
 207          * and we must not schedule until we're ready to give up the cpu.
 208          */
 209         set_cpu_online(cpu, false);
 210
 211         /*
 212          * OK - migrate IRQs away from this CPU
 213          */
 214         migrate_irqs();
 215
 216         /*
 217          * Remove this CPU from the vm mask set of all processes.
 218          */
 219         clear_tasks_mm_cpumask(cpu);
 220
 221         return 0;
 222 }
 223
 224 static DECLARE_COMPLETION(cpu_died);
 225
 226 /*
 227  * called on the thread which is asking for a CPU to be shutdown -
 228  * waits until shutdown has completed, or it is timed out.
 229  */
 230 void __cpu_die(unsigned int cpu)
 231 {
 232         if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
 233                 pr_crit("CPU%u: cpu didn't die\n", cpu);
 234                 return;
 235         }
 236         pr_notice("CPU%u: shutdown\n", cpu);
 237 }
 238
 239 /*
 240  * Called from the idle thread for the CPU which has been shutdown.
 241  *
 242  * Note that we disable IRQs here, but do not re-enable them
 243  * before returning to the caller. This is also the behaviour
 244  * of the other hotplug-cpu capable cores, so presumably coming
 245  * out of idle fixes this.
 246  */
 247 void cpu_die(void)
 248 {
 249         unsigned int cpu = smp_processor_id();
 250
 251         idle_task_exit();
 252
 253         local_irq_disable();
 254
 255         /* Tell __cpu_die() that this CPU is now safe to dispose of */
 256         complete(&cpu_died);
 257
 258         /*
 259          * Actually shutdown the CPU. This must never fail. The specific hotplug
 260          * mechanism must perform all required cache maintenance to ensure that
 261          * no dirty lines are lost in the process of shutting down the CPU.
 262          */
 263         cpu_ops[cpu]->cpu_die(cpu);
 264
 265         BUG();
 266 }
 267 #endif
 268
 269 void __init smp_cpus_done(unsigned int max_cpus)
 270 {
 271         pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
 272 }
 273
 274 void __init smp_prepare_boot_cpu(void)
 275 {
 276         set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
 277 }
 278
 279 static void (*smp_cross_call)(const struct cpumask *, unsigned int);
 280
 281 /*
 282  * Enumerate the possible CPU set from the device tree and build the
 283  * cpu logical map array containing MPIDR values related to logical
 284  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
 285  */
 286 void __init smp_init_cpus(void)
 287 {
 288         struct device_node *dn = NULL;
 289         unsigned int i, cpu = 1;
 290         bool bootcpu_valid = false;
 291
 292         while ((dn = of_find_node_by_type(dn, "cpu"))) {
 293                 const u32 *cell;
 294                 u64 hwid;
 295
 296                 /*
 297                  * A cpu node with missing "reg" property is
 298                  * considered invalid to build a cpu_logical_map
 299                  * entry.
 300                  */
 301                 cell = of_get_property(dn, "reg", NULL);
 302                 if (!cell) {
 303                         pr_err("%s: missing reg property\n", dn->full_name);
 304                         goto next;
 305                 }
 306                 hwid = of_read_number(cell, of_n_addr_cells(dn));
 307
 308                 /*
 309                  * Non affinity bits must be set to 0 in the DT
 310                  */
 311                 if (hwid & ~MPIDR_HWID_BITMASK) {
 312                         pr_err("%s: invalid reg property\n", dn->full_name);
 313                         goto next;
 314                 }
 315
 316                 /*
 317                  * Duplicate MPIDRs are a recipe for disaster. Scan
 318                  * all initialized entries and check for
 319                  * duplicates. If any is found just ignore the cpu.
 320                  * cpu_logical_map was initialized to INVALID_HWID to
 321                  * avoid matching valid MPIDR values.
 322                  */
 323                 for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
 324                         if (cpu_logical_map(i) == hwid) {
 325                                 pr_err("%s: duplicate cpu reg properties in the DT\n",
 326                                         dn->full_name);
 327                                 goto next;
 328                         }
 329                 }
 330
 331                 /*
 332                  * The numbering scheme requires that the boot CPU
 333                  * must be assigned logical id 0. Record it so that
 334                  * the logical map built from DT is validated and can
 335                  * be used.
 336                  */
 337                 if (hwid == cpu_logical_map(0)) {
 338                         if (bootcpu_valid) {
 339                                 pr_err("%s: duplicate boot cpu reg property in DT\n",
 340                                         dn->full_name);
 341                                 goto next;
 342                         }
 343
 344                         bootcpu_valid = true;
 345
 346                         /*
 347                          * cpu_logical_map has already been
 348                          * initialized and the boot cpu doesn't need
 349                          * the enable-method so continue without
 350                          * incrementing cpu.
 351                          */
 352                         continue;
 353                 }
 354
 355                 if (cpu >= NR_CPUS)
 356                         goto next;
 357
 358                 if (cpu_read_ops(dn, cpu) != 0)
 359                         goto next;
 360
 361                 if (cpu_ops[cpu]->cpu_init(dn, cpu))
 362                         goto next;
 363
 364                 pr_debug("cpu logical map 0x%llx\n", hwid);
 365                 cpu_logical_map(cpu) = hwid;
 366 next:
 367                 cpu++;
 368         }
 369
 370         /* sanity check */
 371         if (cpu > NR_CPUS)
 372                 pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
 373                            cpu, NR_CPUS);
 374
 375         if (!bootcpu_valid) {
 376                 pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
 377                 return;
 378         }
 379
 380         /*
 381          * All the cpus that made it to the cpu_logical_map have been
 382          * validated so set them as possible cpus.
 383          */
 384         for (i = 0; i < NR_CPUS; i++)
 385                 if (cpu_logical_map(i) != INVALID_HWID)
 386                         set_cpu_possible(i, true);
 387 }
 388
 389 void __init smp_prepare_cpus(unsigned int max_cpus)
 390 {
 391         int err;
 392         unsigned int cpu, ncores = num_possible_cpus();
 393
 394         /*
 395          * are we trying to boot more cores than exist?
 396          */
 397         if (max_cpus > ncores)
 398                 max_cpus = ncores;
 399
 400         /* Don't bother if we're effectively UP */
 401         if (max_cpus <= 1)
 402                 return;
 403
 404         /*
 405          * Initialise the present map (which describes the set of CPUs
 406          * actually populated at the present time) and release the
 407          * secondaries from the bootloader.
 408          *
 409          * Make sure we online at most (max_cpus - 1) additional CPUs.
 410          */
 411         max_cpus--;
 412         for_each_possible_cpu(cpu) {
 413                 if (max_cpus == 0)
 414                         break;
 415
 416                 if (cpu == smp_processor_id())
 417                         continue;
 418
 419                 if (!cpu_ops[cpu])
 420                         continue;
 421
 422                 err = cpu_ops[cpu]->cpu_prepare(cpu);
 423                 if (err)
 424                         continue;
 425
 426                 set_cpu_present(cpu, true);
 427                 max_cpus--;
 428         }
 429 }
 430
 431
 432 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
 433 {
 434         smp_cross_call = fn;
 435 }
 436
 437 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 438 {
 439         smp_cross_call(mask, IPI_CALL_FUNC);
 440 }
 441
 442 void arch_send_call_function_single_ipi(int cpu)
 443 {
 444         smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
 445 }
 446
 447 static const char *ipi_types[NR_IPI] = {
 448 #define S(x,s)  [x - IPI_RESCHEDULE] = s
 449         S(IPI_RESCHEDULE, "Rescheduling interrupts"),
 450         S(IPI_CALL_FUNC, "Function call interrupts"),
 451         S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
 452         S(IPI_CPU_STOP, "CPU stop interrupts"),
 453         S(IPI_TIMER, "Timer broadcast interrupts"),
 454 };
 455
 456 void show_ipi_list(struct seq_file *p, int prec)
 457 {
 458         unsigned int cpu, i;
 459
 460         for (i = 0; i < NR_IPI; i++) {
 461                 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
 462                            prec >= 4 ? " " : "");
 463                 for_each_online_cpu(cpu)
 464                         seq_printf(p, "%10u ",
 465                                    __get_irq_stat(cpu, ipi_irqs[i]));
 466                 seq_printf(p, "      %s\n", ipi_types[i]);
 467         }
 468 }
 469
 470 u64 smp_irq_stat_cpu(unsigned int cpu)
 471 {
 472         u64 sum = 0;
 473         int i;
 474
 475         for (i = 0; i < NR_IPI; i++)
 476                 sum += __get_irq_stat(cpu, ipi_irqs[i]);
 477
 478         return sum;
 479 }
 480
 481 static DEFINE_RAW_SPINLOCK(stop_lock);
 482
 483 /*
 484  * ipi_cpu_stop - handle IPI from smp_send_stop()
 485  */
 486 static void ipi_cpu_stop(unsigned int cpu)
 487 {
 488         if (system_state == SYSTEM_BOOTING ||
 489             system_state == SYSTEM_RUNNING) {
 490                 raw_spin_lock(&stop_lock);
 491                 pr_crit("CPU%u: stopping\n", cpu);
 492                 dump_stack();
 493                 raw_spin_unlock(&stop_lock);
 494         }
 495
 496         set_cpu_online(cpu, false);
 497
 498         local_irq_disable();
 499
 500         while (1)
 501                 cpu_relax();
 502 }
 503
 504 /*
 505  * Main handler for inter-processor interrupts
 506  */
 507 void handle_IPI(int ipinr, struct pt_regs *regs)
 508 {
 509         unsigned int cpu = smp_processor_id();
 510         struct pt_regs *old_regs = set_irq_regs(regs);
 511
 512         if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
 513                 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
 514
 515         switch (ipinr) {
 516         case IPI_RESCHEDULE:
 517                 scheduler_ipi();
 518                 break;
 519
 520         case IPI_CALL_FUNC:
 521                 irq_enter();
 522                 generic_smp_call_function_interrupt();
 523                 irq_exit();
 524                 break;
 525
 526         case IPI_CALL_FUNC_SINGLE:
 527                 irq_enter();
 528                 generic_smp_call_function_single_interrupt();
 529                 irq_exit();
 530                 break;
 531
 532         case IPI_CPU_STOP:
 533                 irq_enter();
 534                 ipi_cpu_stop(cpu);
 535                 irq_exit();
 536                 break;
 537
 538 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 539         case IPI_TIMER:
 540                 irq_enter();
 541                 tick_receive_broadcast();
 542                 irq_exit();
 543                 break;
 544 #endif
 545
 546         default:
 547                 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
 548                 break;
 549         }
 550         set_irq_regs(old_regs);
 551 }
 552
 553 void smp_send_reschedule(int cpu)
 554 {
 555         smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
 556 }
 557
 558 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 559 void tick_broadcast(const struct cpumask *mask)
 560 {
 561         smp_cross_call(mask, IPI_TIMER);
 562 }
 563 #endif
 564
 565 void smp_send_stop(void)
 566 {
 567         unsigned long timeout;
 568
 569         if (num_online_cpus() > 1) {
 570                 cpumask_t mask;
 571
 572                 cpumask_copy(&mask, cpu_online_mask);
 573                 cpu_clear(smp_processor_id(), mask);
 574
 575                 smp_cross_call(&mask, IPI_CPU_STOP);
 576         }
 577
 578         /* Wait up to one second for other CPUs to stop */
 579         timeout = USEC_PER_SEC;
 580         while (num_online_cpus() > 1 && timeout--)
 581                 udelay(1);
 582
 583         if (num_online_cpus() > 1)
 584                 pr_warning("SMP: failed to stop secondary CPUs\n");
 585 }
 586
 587 /*
 588  * not supported here
 589  */
 590 int setup_profiling_timer(unsigned int multiplier)
 591 {
 592         return -EINVAL;
 593 }