arch/arm64/kernel/smp.c

   1 /*
   2  * SMP initialisation and IPI support
   3  * Based on arch/arm/kernel/smp.c
   4  *
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/init.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/sched.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/cache.h>
  26 #include <linux/profile.h>
  27 #include <linux/errno.h>
  28 #include <linux/mm.h>
  29 #include <linux/err.h>
  30 #include <linux/cpu.h>
  31 #include <linux/smp.h>
  32 #include <linux/seq_file.h>
  33 #include <linux/irq.h>
  34 #include <linux/percpu.h>
  35 #include <linux/clockchips.h>
  36 #include <linux/completion.h>
  37 #include <linux/of.h>
  38 #include <linux/irq_work.h>
  39
  40 #include <asm/alternative.h>
  41 #include <asm/atomic.h>
  42 #include <asm/cacheflush.h>
  43 #include <asm/cpu.h>
  44 #include <asm/cputype.h>
  45 #include <asm/cpu_ops.h>
  46 #include <asm/mmu_context.h>
  47 #include <asm/pgtable.h>
  48 #include <asm/pgalloc.h>
  49 #include <asm/processor.h>
  50 #include <asm/smp_plat.h>
  51 #include <asm/sections.h>
  52 #include <asm/tlbflush.h>
  53 #include <asm/ptrace.h>
  54
  55 #define CREATE_TRACE_POINTS
  56 #include <trace/events/ipi.h>
  57
  58 /*
  59  * as from 2.5, kernels no longer have an init_tasks structure
  60  * so we need some other way of telling a new secondary core
  61  * where to place its SVC stack
  62  */
  63 struct secondary_data secondary_data;
  64
  65 enum ipi_msg_type {
  66         IPI_RESCHEDULE,
  67         IPI_CALL_FUNC,
  68         IPI_CALL_FUNC_SINGLE,
  69         IPI_CPU_STOP,
  70         IPI_TIMER,
  71         IPI_IRQ_WORK,
  72 };
  73
  74 /*
  75  * Boot a secondary CPU, and assign it the specified idle task.
  76  * This also gives us the initial stack to use for this CPU.
  77  */
  78 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  79 {
  80         if (cpu_ops[cpu]->cpu_boot)
  81                 return cpu_ops[cpu]->cpu_boot(cpu);
  82
  83         return -EOPNOTSUPP;
  84 }
  85
  86 static DECLARE_COMPLETION(cpu_running);
  87
  88 int __cpu_up(unsigned int cpu, struct task_struct *idle)
  89 {
  90         int ret;
  91
  92         /*
  93          * We need to tell the secondary core where to find its stack and the
  94          * page tables.
  95          */
  96         secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  97         __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  98
  99         /*
 100          * Now bring the CPU into our world.
 101          */
 102         ret = boot_secondary(cpu, idle);
 103         if (ret == 0) {
 104                 /*
 105                  * CPU was successfully started, wait for it to come online or
 106                  * time out.
 107                  */
 108                 wait_for_completion_timeout(&cpu_running,
 109                                             msecs_to_jiffies(1000));
 110
 111                 if (!cpu_online(cpu)) {
 112                         pr_crit("CPU%u: failed to come online\n", cpu);
 113                         ret = -EIO;
 114                 }
 115         } else {
 116                 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
 117         }
 118
 119         secondary_data.stack = NULL;
 120
 121         return ret;
 122 }
 123
 124 static void smp_store_cpu_info(unsigned int cpuid)
 125 {
 126         store_cpu_topology(cpuid);
 127 }
 128
 129 /*
 130  * This is the secondary CPU boot entry.  We're using this CPUs
 131  * idle thread stack, but a set of temporary page tables.
 132  */
 133 asmlinkage void secondary_start_kernel(void)
 134 {
 135         struct mm_struct *mm = &init_mm;
 136         unsigned int cpu = smp_processor_id();
 137
 138         /*
 139          * All kernel threads share the same mm context; grab a
 140          * reference and switch to it.
 141          */
 142         atomic_inc(&mm->mm_count);
 143         current->active_mm = mm;
 144         cpumask_set_cpu(cpu, mm_cpumask(mm));
 145
 146         set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
 147         printk("CPU%u: Booted secondary processor\n", cpu);
 148
 149         /*
 150          * TTBR0 is only used for the identity mapping at this stage. Make it
 151          * point to zero page to avoid speculatively fetching new entries.
 152          */
 153         cpu_set_reserved_ttbr0();
 154         flush_tlb_all();
 155
 156         preempt_disable();
 157         trace_hardirqs_off();
 158
 159         if (cpu_ops[cpu]->cpu_postboot)
 160                 cpu_ops[cpu]->cpu_postboot();
 161
 162         /*
 163          * Log the CPU info before it is marked online and might get read.
 164          */
 165         cpuinfo_store_cpu();
 166
 167         /*
 168          * Enable GIC and timers.
 169          */
 170         notify_cpu_starting(cpu);
 171
 172         smp_store_cpu_info(cpu);
 173
 174         /*
 175          * OK, now it's safe to let the boot CPU continue.  Wait for
 176          * the CPU migration code to notice that the CPU is online
 177          * before we continue.
 178          */
 179         set_cpu_online(cpu, true);
 180         complete(&cpu_running);
 181
 182         local_dbg_enable();
 183         local_irq_enable();
 184         local_async_enable();
 185
 186         /*
 187          * OK, it's off to the idle thread for us
 188          */
 189         cpu_startup_entry(CPUHP_ONLINE);
 190 }
 191
 192 #ifdef CONFIG_HOTPLUG_CPU
 193 static int op_cpu_disable(unsigned int cpu)
 194 {
 195         /*
 196          * If we don't have a cpu_die method, abort before we reach the point
 197          * of no return. CPU0 may not have an cpu_ops, so test for it.
 198          */
 199         if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
 200                 return -EOPNOTSUPP;
 201
 202         /*
 203          * We may need to abort a hot unplug for some other mechanism-specific
 204          * reason.
 205          */
 206         if (cpu_ops[cpu]->cpu_disable)
 207                 return cpu_ops[cpu]->cpu_disable(cpu);
 208
 209         return 0;
 210 }
 211
 212 /*
 213  * __cpu_disable runs on the processor to be shutdown.
 214  */
 215 int __cpu_disable(void)
 216 {
 217         unsigned int cpu = smp_processor_id();
 218         int ret;
 219
 220         ret = op_cpu_disable(cpu);
 221         if (ret)
 222                 return ret;
 223
 224         /*
 225          * Take this CPU offline.  Once we clear this, we can't return,
 226          * and we must not schedule until we're ready to give up the cpu.
 227          */
 228         set_cpu_online(cpu, false);
 229
 230         /*
 231          * OK - migrate IRQs away from this CPU
 232          */
 233         migrate_irqs();
 234
 235         /*
 236          * Remove this CPU from the vm mask set of all processes.
 237          */
 238         clear_tasks_mm_cpumask(cpu);
 239
 240         return 0;
 241 }
 242
 243 static int op_cpu_kill(unsigned int cpu)
 244 {
 245         /*
 246          * If we have no means of synchronising with the dying CPU, then assume
 247          * that it is really dead. We can only wait for an arbitrary length of
 248          * time and hope that it's dead, so let's skip the wait and just hope.
 249          */
 250         if (!cpu_ops[cpu]->cpu_kill)
 251                 return 1;
 252
 253         return cpu_ops[cpu]->cpu_kill(cpu);
 254 }
 255
 256 static DECLARE_COMPLETION(cpu_died);
 257
 258 /*
 259  * called on the thread which is asking for a CPU to be shutdown -
 260  * waits until shutdown has completed, or it is timed out.
 261  */
 262 void __cpu_die(unsigned int cpu)
 263 {
 264         if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
 265                 pr_crit("CPU%u: cpu didn't die\n", cpu);
 266                 return;
 267         }
 268         pr_notice("CPU%u: shutdown\n", cpu);
 269
 270         /*
 271          * Now that the dying CPU is beyond the point of no return w.r.t.
 272          * in-kernel synchronisation, try to get the firwmare to help us to
 273          * verify that it has really left the kernel before we consider
 274          * clobbering anything it might still be using.
 275          */
 276         if (!op_cpu_kill(cpu))
 277                 pr_warn("CPU%d may not have shut down cleanly\n", cpu);
 278 }
 279
 280 /*
 281  * Called from the idle thread for the CPU which has been shutdown.
 282  *
 283  * Note that we disable IRQs here, but do not re-enable them
 284  * before returning to the caller. This is also the behaviour
 285  * of the other hotplug-cpu capable cores, so presumably coming
 286  * out of idle fixes this.
 287  */
 288 void cpu_die(void)
 289 {
 290         unsigned int cpu = smp_processor_id();
 291
 292         idle_task_exit();
 293
 294         local_irq_disable();
 295
 296         /* Tell __cpu_die() that this CPU is now safe to dispose of */
 297         complete(&cpu_died);
 298
 299         /*
 300          * Actually shutdown the CPU. This must never fail. The specific hotplug
 301          * mechanism must perform all required cache maintenance to ensure that
 302          * no dirty lines are lost in the process of shutting down the CPU.
 303          */
 304         cpu_ops[cpu]->cpu_die(cpu);
 305
 306         BUG();
 307 }
 308 #endif
 309
 310 void __init smp_cpus_done(unsigned int max_cpus)
 311 {
 312         pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
 313         apply_alternatives_all();
 314 }
 315
 316 void __init smp_prepare_boot_cpu(void)
 317 {
 318         set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
 319 }
 320
 321 /*
 322  * Enumerate the possible CPU set from the device tree and build the
 323  * cpu logical map array containing MPIDR values related to logical
 324  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
 325  */
 326 void __init smp_init_cpus(void)
 327 {
 328         struct device_node *dn = NULL;
 329         unsigned int i, cpu = 1;
 330         bool bootcpu_valid = false;
 331
 332         while ((dn = of_find_node_by_type(dn, "cpu"))) {
 333                 const u32 *cell;
 334                 u64 hwid;
 335
 336                 /*
 337                  * A cpu node with missing "reg" property is
 338                  * considered invalid to build a cpu_logical_map
 339                  * entry.
 340                  */
 341                 cell = of_get_property(dn, "reg", NULL);
 342                 if (!cell) {
 343                         pr_err("%s: missing reg property\n", dn->full_name);
 344                         goto next;
 345                 }
 346                 hwid = of_read_number(cell, of_n_addr_cells(dn));
 347
 348                 /*
 349                  * Non affinity bits must be set to 0 in the DT
 350                  */
 351                 if (hwid & ~MPIDR_HWID_BITMASK) {
 352                         pr_err("%s: invalid reg property\n", dn->full_name);
 353                         goto next;
 354                 }
 355
 356                 /*
 357                  * Duplicate MPIDRs are a recipe for disaster. Scan
 358                  * all initialized entries and check for
 359                  * duplicates. If any is found just ignore the cpu.
 360                  * cpu_logical_map was initialized to INVALID_HWID to
 361                  * avoid matching valid MPIDR values.
 362                  */
 363                 for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
 364                         if (cpu_logical_map(i) == hwid) {
 365                                 pr_err("%s: duplicate cpu reg properties in the DT\n",
 366                                         dn->full_name);
 367                                 goto next;
 368                         }
 369                 }
 370
 371                 /*
 372                  * The numbering scheme requires that the boot CPU
 373                  * must be assigned logical id 0. Record it so that
 374                  * the logical map built from DT is validated and can
 375                  * be used.
 376                  */
 377                 if (hwid == cpu_logical_map(0)) {
 378                         if (bootcpu_valid) {
 379                                 pr_err("%s: duplicate boot cpu reg property in DT\n",
 380                                         dn->full_name);
 381                                 goto next;
 382                         }
 383
 384                         bootcpu_valid = true;
 385
 386                         /*
 387                          * cpu_logical_map has already been
 388                          * initialized and the boot cpu doesn't need
 389                          * the enable-method so continue without
 390                          * incrementing cpu.
 391                          */
 392                         continue;
 393                 }
 394
 395                 if (cpu >= NR_CPUS)
 396                         goto next;
 397
 398                 if (cpu_read_ops(dn, cpu) != 0)
 399                         goto next;
 400
 401                 if (cpu_ops[cpu]->cpu_init(dn, cpu))
 402                         goto next;
 403
 404                 pr_debug("cpu logical map 0x%llx\n", hwid);
 405                 cpu_logical_map(cpu) = hwid;
 406 next:
 407                 cpu++;
 408         }
 409
 410         /* sanity check */
 411         if (cpu > NR_CPUS)
 412                 pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
 413                            cpu, NR_CPUS);
 414
 415         if (!bootcpu_valid) {
 416                 pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
 417                 return;
 418         }
 419
 420         /*
 421          * All the cpus that made it to the cpu_logical_map have been
 422          * validated so set them as possible cpus.
 423          */
 424         for (i = 0; i < NR_CPUS; i++)
 425                 if (cpu_logical_map(i) != INVALID_HWID)
 426                         set_cpu_possible(i, true);
 427 }
 428
 429 void __init smp_prepare_cpus(unsigned int max_cpus)
 430 {
 431         int err;
 432         unsigned int cpu, ncores = num_possible_cpus();
 433
 434         init_cpu_topology();
 435
 436         smp_store_cpu_info(smp_processor_id());
 437
 438         /*
 439          * are we trying to boot more cores than exist?
 440          */
 441         if (max_cpus > ncores)
 442                 max_cpus = ncores;
 443
 444         /* Don't bother if we're effectively UP */
 445         if (max_cpus <= 1)
 446                 return;
 447
 448         /*
 449          * Initialise the present map (which describes the set of CPUs
 450          * actually populated at the present time) and release the
 451          * secondaries from the bootloader.
 452          *
 453          * Make sure we online at most (max_cpus - 1) additional CPUs.
 454          */
 455         max_cpus--;
 456         for_each_possible_cpu(cpu) {
 457                 if (max_cpus == 0)
 458                         break;
 459
 460                 if (cpu == smp_processor_id())
 461                         continue;
 462
 463                 if (!cpu_ops[cpu])
 464                         continue;
 465
 466                 err = cpu_ops[cpu]->cpu_prepare(cpu);
 467                 if (err)
 468                         continue;
 469
 470                 set_cpu_present(cpu, true);
 471                 max_cpus--;
 472         }
 473 }
 474
 475 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
 476
 477 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
 478 {
 479         __smp_cross_call = fn;
 480 }
 481
 482 static const char *ipi_types[NR_IPI] __tracepoint_string = {
 483 #define S(x,s)  [x] = s
 484         S(IPI_RESCHEDULE, "Rescheduling interrupts"),
 485         S(IPI_CALL_FUNC, "Function call interrupts"),
 486         S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
 487         S(IPI_CPU_STOP, "CPU stop interrupts"),
 488         S(IPI_TIMER, "Timer broadcast interrupts"),
 489         S(IPI_IRQ_WORK, "IRQ work interrupts"),
 490 };
 491
 492 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
 493 {
 494         trace_ipi_raise(target, ipi_types[ipinr]);
 495         __smp_cross_call(target, ipinr);
 496 }
 497
 498 void show_ipi_list(struct seq_file *p, int prec)
 499 {
 500         unsigned int cpu, i;
 501
 502         for (i = 0; i < NR_IPI; i++) {
 503                 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
 504                            prec >= 4 ? " " : "");
 505                 for_each_online_cpu(cpu)
 506                         seq_printf(p, "%10u ",
 507                                    __get_irq_stat(cpu, ipi_irqs[i]));
 508                 seq_printf(p, "      %s\n", ipi_types[i]);
 509         }
 510 }
 511
 512 u64 smp_irq_stat_cpu(unsigned int cpu)
 513 {
 514         u64 sum = 0;
 515         int i;
 516
 517         for (i = 0; i < NR_IPI; i++)
 518                 sum += __get_irq_stat(cpu, ipi_irqs[i]);
 519
 520         return sum;
 521 }
 522
 523 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 524 {
 525         smp_cross_call(mask, IPI_CALL_FUNC);
 526 }
 527
 528 void arch_send_call_function_single_ipi(int cpu)
 529 {
 530         smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
 531 }
 532
 533 #ifdef CONFIG_IRQ_WORK
 534 void arch_irq_work_raise(void)
 535 {
 536         if (__smp_cross_call)
 537                 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
 538 }
 539 #endif
 540
 541 static DEFINE_RAW_SPINLOCK(stop_lock);
 542
 543 /*
 544  * ipi_cpu_stop - handle IPI from smp_send_stop()
 545  */
 546 static void ipi_cpu_stop(unsigned int cpu)
 547 {
 548         if (system_state == SYSTEM_BOOTING ||
 549             system_state == SYSTEM_RUNNING) {
 550                 raw_spin_lock(&stop_lock);
 551                 pr_crit("CPU%u: stopping\n", cpu);
 552                 dump_stack();
 553                 raw_spin_unlock(&stop_lock);
 554         }
 555
 556         set_cpu_online(cpu, false);
 557
 558         local_irq_disable();
 559
 560         while (1)
 561                 cpu_relax();
 562 }
 563
 564 /*
 565  * Main handler for inter-processor interrupts
 566  */
 567 void handle_IPI(int ipinr, struct pt_regs *regs)
 568 {
 569         unsigned int cpu = smp_processor_id();
 570         struct pt_regs *old_regs = set_irq_regs(regs);
 571
 572         if ((unsigned)ipinr < NR_IPI) {
 573                 trace_ipi_entry(ipi_types[ipinr]);
 574                 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
 575         }
 576
 577         switch (ipinr) {
 578         case IPI_RESCHEDULE:
 579                 scheduler_ipi();
 580                 break;
 581
 582         case IPI_CALL_FUNC:
 583                 irq_enter();
 584                 generic_smp_call_function_interrupt();
 585                 irq_exit();
 586                 break;
 587
 588         case IPI_CALL_FUNC_SINGLE:
 589                 irq_enter();
 590                 generic_smp_call_function_single_interrupt();
 591                 irq_exit();
 592                 break;
 593
 594         case IPI_CPU_STOP:
 595                 irq_enter();
 596                 ipi_cpu_stop(cpu);
 597                 irq_exit();
 598                 break;
 599
 600 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 601         case IPI_TIMER:
 602                 irq_enter();
 603                 tick_receive_broadcast();
 604                 irq_exit();
 605                 break;
 606 #endif
 607
 608 #ifdef CONFIG_IRQ_WORK
 609         case IPI_IRQ_WORK:
 610                 irq_enter();
 611                 irq_work_run();
 612                 irq_exit();
 613                 break;
 614 #endif
 615
 616         default:
 617                 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
 618                 break;
 619         }
 620
 621         if ((unsigned)ipinr < NR_IPI)
 622                 trace_ipi_exit(ipi_types[ipinr]);
 623         set_irq_regs(old_regs);
 624 }
 625
 626 void smp_send_reschedule(int cpu)
 627 {
 628         smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
 629 }
 630
 631 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 632 void tick_broadcast(const struct cpumask *mask)
 633 {
 634         smp_cross_call(mask, IPI_TIMER);
 635 }
 636 #endif
 637
 638 void smp_send_stop(void)
 639 {
 640         unsigned long timeout;
 641
 642         if (num_online_cpus() > 1) {
 643                 cpumask_t mask;
 644
 645                 cpumask_copy(&mask, cpu_online_mask);
 646                 cpu_clear(smp_processor_id(), mask);
 647
 648                 smp_cross_call(&mask, IPI_CPU_STOP);
 649         }
 650
 651         /* Wait up to one second for other CPUs to stop */
 652         timeout = USEC_PER_SEC;
 653         while (num_online_cpus() > 1 && timeout--)
 654                 udelay(1);
 655
 656         if (num_online_cpus() > 1)
 657                 pr_warning("SMP: failed to stop secondary CPUs\n");
 658 }
 659
 660 /*
 661  * not supported here
 662  */
 663 int setup_profiling_timer(unsigned int multiplier)
 664 {
 665         return -EINVAL;
 666 }