arm64: Use static keys for CPU features
[deliverable/linux.git] / arch / arm64 / kernel / smp.c
1 /*
2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
4 *
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched.h>
25 #include <linux/interrupt.h>
26 #include <linux/cache.h>
27 #include <linux/profile.h>
28 #include <linux/errno.h>
29 #include <linux/mm.h>
30 #include <linux/err.h>
31 #include <linux/cpu.h>
32 #include <linux/smp.h>
33 #include <linux/seq_file.h>
34 #include <linux/irq.h>
35 #include <linux/percpu.h>
36 #include <linux/clockchips.h>
37 #include <linux/completion.h>
38 #include <linux/of.h>
39 #include <linux/irq_work.h>
40
41 #include <asm/alternative.h>
42 #include <asm/atomic.h>
43 #include <asm/cacheflush.h>
44 #include <asm/cpu.h>
45 #include <asm/cputype.h>
46 #include <asm/cpu_ops.h>
47 #include <asm/mmu_context.h>
48 #include <asm/numa.h>
49 #include <asm/pgtable.h>
50 #include <asm/pgalloc.h>
51 #include <asm/processor.h>
52 #include <asm/smp_plat.h>
53 #include <asm/sections.h>
54 #include <asm/tlbflush.h>
55 #include <asm/ptrace.h>
56 #include <asm/virt.h>
57
58 #define CREATE_TRACE_POINTS
59 #include <trace/events/ipi.h>
60
61 /*
62 * as from 2.5, kernels no longer have an init_tasks structure
63 * so we need some other way of telling a new secondary core
64 * where to place its SVC stack
65 */
66 struct secondary_data secondary_data;
67 /* Number of CPUs which aren't online, but looping in kernel text. */
68 int cpus_stuck_in_kernel;
69
70 enum ipi_msg_type {
71 IPI_RESCHEDULE,
72 IPI_CALL_FUNC,
73 IPI_CPU_STOP,
74 IPI_TIMER,
75 IPI_IRQ_WORK,
76 IPI_WAKEUP
77 };
78
79 #ifdef CONFIG_ARM64_VHE
80
81 /* Whether the boot CPU is running in HYP mode or not*/
82 static bool boot_cpu_hyp_mode;
83
84 static inline void save_boot_cpu_run_el(void)
85 {
86 boot_cpu_hyp_mode = is_kernel_in_hyp_mode();
87 }
88
89 static inline bool is_boot_cpu_in_hyp_mode(void)
90 {
91 return boot_cpu_hyp_mode;
92 }
93
94 /*
95 * Verify that a secondary CPU is running the kernel at the same
96 * EL as that of the boot CPU.
97 */
98 void verify_cpu_run_el(void)
99 {
100 bool in_el2 = is_kernel_in_hyp_mode();
101 bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode();
102
103 if (in_el2 ^ boot_cpu_el2) {
104 pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n",
105 smp_processor_id(),
106 in_el2 ? 2 : 1,
107 boot_cpu_el2 ? 2 : 1);
108 cpu_panic_kernel();
109 }
110 }
111
112 #else
113 static inline void save_boot_cpu_run_el(void) {}
114 #endif
115
116 #ifdef CONFIG_HOTPLUG_CPU
117 static int op_cpu_kill(unsigned int cpu);
118 #else
119 static inline int op_cpu_kill(unsigned int cpu)
120 {
121 return -ENOSYS;
122 }
123 #endif
124
125
126 /*
127 * Boot a secondary CPU, and assign it the specified idle task.
128 * This also gives us the initial stack to use for this CPU.
129 */
130 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
131 {
132 if (cpu_ops[cpu]->cpu_boot)
133 return cpu_ops[cpu]->cpu_boot(cpu);
134
135 return -EOPNOTSUPP;
136 }
137
138 static DECLARE_COMPLETION(cpu_running);
139
140 int __cpu_up(unsigned int cpu, struct task_struct *idle)
141 {
142 int ret;
143 long status;
144
145 /*
146 * We need to tell the secondary core where to find its stack and the
147 * page tables.
148 */
149 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
150 update_cpu_boot_status(CPU_MMU_OFF);
151 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
152
153 /*
154 * Now bring the CPU into our world.
155 */
156 ret = boot_secondary(cpu, idle);
157 if (ret == 0) {
158 /*
159 * CPU was successfully started, wait for it to come online or
160 * time out.
161 */
162 wait_for_completion_timeout(&cpu_running,
163 msecs_to_jiffies(1000));
164
165 if (!cpu_online(cpu)) {
166 pr_crit("CPU%u: failed to come online\n", cpu);
167 ret = -EIO;
168 }
169 } else {
170 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
171 }
172
173 secondary_data.stack = NULL;
174 status = READ_ONCE(secondary_data.status);
175 if (ret && status) {
176
177 if (status == CPU_MMU_OFF)
178 status = READ_ONCE(__early_cpu_boot_status);
179
180 switch (status) {
181 default:
182 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
183 cpu, status);
184 break;
185 case CPU_KILL_ME:
186 if (!op_cpu_kill(cpu)) {
187 pr_crit("CPU%u: died during early boot\n", cpu);
188 break;
189 }
190 /* Fall through */
191 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
192 case CPU_STUCK_IN_KERNEL:
193 pr_crit("CPU%u: is stuck in kernel\n", cpu);
194 cpus_stuck_in_kernel++;
195 break;
196 case CPU_PANIC_KERNEL:
197 panic("CPU%u detected unsupported configuration\n", cpu);
198 }
199 }
200
201 return ret;
202 }
203
204 static void smp_store_cpu_info(unsigned int cpuid)
205 {
206 store_cpu_topology(cpuid);
207 numa_store_cpu_info(cpuid);
208 }
209
210 /*
211 * This is the secondary CPU boot entry. We're using this CPUs
212 * idle thread stack, but a set of temporary page tables.
213 */
214 asmlinkage void secondary_start_kernel(void)
215 {
216 struct mm_struct *mm = &init_mm;
217 unsigned int cpu = smp_processor_id();
218
219 /*
220 * All kernel threads share the same mm context; grab a
221 * reference and switch to it.
222 */
223 atomic_inc(&mm->mm_count);
224 current->active_mm = mm;
225
226 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
227
228 /*
229 * TTBR0 is only used for the identity mapping at this stage. Make it
230 * point to zero page to avoid speculatively fetching new entries.
231 */
232 cpu_uninstall_idmap();
233
234 preempt_disable();
235 trace_hardirqs_off();
236
237 /*
238 * If the system has established the capabilities, make sure
239 * this CPU ticks all of those. If it doesn't, the CPU will
240 * fail to come online.
241 */
242 verify_local_cpu_capabilities();
243
244 if (cpu_ops[cpu]->cpu_postboot)
245 cpu_ops[cpu]->cpu_postboot();
246
247 /*
248 * Log the CPU info before it is marked online and might get read.
249 */
250 cpuinfo_store_cpu();
251
252 /*
253 * Enable GIC and timers.
254 */
255 notify_cpu_starting(cpu);
256
257 smp_store_cpu_info(cpu);
258
259 /*
260 * OK, now it's safe to let the boot CPU continue. Wait for
261 * the CPU migration code to notice that the CPU is online
262 * before we continue.
263 */
264 pr_info("CPU%u: Booted secondary processor [%08x]\n",
265 cpu, read_cpuid_id());
266 update_cpu_boot_status(CPU_BOOT_SUCCESS);
267 set_cpu_online(cpu, true);
268 complete(&cpu_running);
269
270 local_irq_enable();
271 local_async_enable();
272
273 /*
274 * OK, it's off to the idle thread for us
275 */
276 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
277 }
278
279 #ifdef CONFIG_HOTPLUG_CPU
280 static int op_cpu_disable(unsigned int cpu)
281 {
282 /*
283 * If we don't have a cpu_die method, abort before we reach the point
284 * of no return. CPU0 may not have an cpu_ops, so test for it.
285 */
286 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
287 return -EOPNOTSUPP;
288
289 /*
290 * We may need to abort a hot unplug for some other mechanism-specific
291 * reason.
292 */
293 if (cpu_ops[cpu]->cpu_disable)
294 return cpu_ops[cpu]->cpu_disable(cpu);
295
296 return 0;
297 }
298
299 /*
300 * __cpu_disable runs on the processor to be shutdown.
301 */
302 int __cpu_disable(void)
303 {
304 unsigned int cpu = smp_processor_id();
305 int ret;
306
307 ret = op_cpu_disable(cpu);
308 if (ret)
309 return ret;
310
311 /*
312 * Take this CPU offline. Once we clear this, we can't return,
313 * and we must not schedule until we're ready to give up the cpu.
314 */
315 set_cpu_online(cpu, false);
316
317 /*
318 * OK - migrate IRQs away from this CPU
319 */
320 irq_migrate_all_off_this_cpu();
321
322 return 0;
323 }
324
325 static int op_cpu_kill(unsigned int cpu)
326 {
327 /*
328 * If we have no means of synchronising with the dying CPU, then assume
329 * that it is really dead. We can only wait for an arbitrary length of
330 * time and hope that it's dead, so let's skip the wait and just hope.
331 */
332 if (!cpu_ops[cpu]->cpu_kill)
333 return 0;
334
335 return cpu_ops[cpu]->cpu_kill(cpu);
336 }
337
338 /*
339 * called on the thread which is asking for a CPU to be shutdown -
340 * waits until shutdown has completed, or it is timed out.
341 */
342 void __cpu_die(unsigned int cpu)
343 {
344 int err;
345
346 if (!cpu_wait_death(cpu, 5)) {
347 pr_crit("CPU%u: cpu didn't die\n", cpu);
348 return;
349 }
350 pr_notice("CPU%u: shutdown\n", cpu);
351
352 /*
353 * Now that the dying CPU is beyond the point of no return w.r.t.
354 * in-kernel synchronisation, try to get the firwmare to help us to
355 * verify that it has really left the kernel before we consider
356 * clobbering anything it might still be using.
357 */
358 err = op_cpu_kill(cpu);
359 if (err)
360 pr_warn("CPU%d may not have shut down cleanly: %d\n",
361 cpu, err);
362 }
363
364 /*
365 * Called from the idle thread for the CPU which has been shutdown.
366 *
367 * Note that we disable IRQs here, but do not re-enable them
368 * before returning to the caller. This is also the behaviour
369 * of the other hotplug-cpu capable cores, so presumably coming
370 * out of idle fixes this.
371 */
372 void cpu_die(void)
373 {
374 unsigned int cpu = smp_processor_id();
375
376 idle_task_exit();
377
378 local_irq_disable();
379
380 /* Tell __cpu_die() that this CPU is now safe to dispose of */
381 (void)cpu_report_death();
382
383 /*
384 * Actually shutdown the CPU. This must never fail. The specific hotplug
385 * mechanism must perform all required cache maintenance to ensure that
386 * no dirty lines are lost in the process of shutting down the CPU.
387 */
388 cpu_ops[cpu]->cpu_die(cpu);
389
390 BUG();
391 }
392 #endif
393
394 /*
395 * Kill the calling secondary CPU, early in bringup before it is turned
396 * online.
397 */
398 void cpu_die_early(void)
399 {
400 int cpu = smp_processor_id();
401
402 pr_crit("CPU%d: will not boot\n", cpu);
403
404 /* Mark this CPU absent */
405 set_cpu_present(cpu, 0);
406
407 #ifdef CONFIG_HOTPLUG_CPU
408 update_cpu_boot_status(CPU_KILL_ME);
409 /* Check if we can park ourselves */
410 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
411 cpu_ops[cpu]->cpu_die(cpu);
412 #endif
413 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
414
415 cpu_park_loop();
416 }
417
418 static void __init hyp_mode_check(void)
419 {
420 if (is_hyp_mode_available())
421 pr_info("CPU: All CPU(s) started at EL2\n");
422 else if (is_hyp_mode_mismatched())
423 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
424 "CPU: CPUs started in inconsistent modes");
425 else
426 pr_info("CPU: All CPU(s) started at EL1\n");
427 }
428
429 void __init smp_cpus_done(unsigned int max_cpus)
430 {
431 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
432 setup_cpu_features();
433 hyp_mode_check();
434 apply_alternatives_all();
435 }
436
437 void __init smp_prepare_boot_cpu(void)
438 {
439 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
440 /*
441 * Initialise the static keys early as they may be enabled by the
442 * cpufeature code.
443 */
444 jump_label_init();
445 cpuinfo_store_boot_cpu();
446 save_boot_cpu_run_el();
447 }
448
449 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
450 {
451 const __be32 *cell;
452 u64 hwid;
453
454 /*
455 * A cpu node with missing "reg" property is
456 * considered invalid to build a cpu_logical_map
457 * entry.
458 */
459 cell = of_get_property(dn, "reg", NULL);
460 if (!cell) {
461 pr_err("%s: missing reg property\n", dn->full_name);
462 return INVALID_HWID;
463 }
464
465 hwid = of_read_number(cell, of_n_addr_cells(dn));
466 /*
467 * Non affinity bits must be set to 0 in the DT
468 */
469 if (hwid & ~MPIDR_HWID_BITMASK) {
470 pr_err("%s: invalid reg property\n", dn->full_name);
471 return INVALID_HWID;
472 }
473 return hwid;
474 }
475
476 /*
477 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
478 * entries and check for duplicates. If any is found just ignore the
479 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
480 * matching valid MPIDR values.
481 */
482 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
483 {
484 unsigned int i;
485
486 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
487 if (cpu_logical_map(i) == hwid)
488 return true;
489 return false;
490 }
491
492 /*
493 * Initialize cpu operations for a logical cpu and
494 * set it in the possible mask on success
495 */
496 static int __init smp_cpu_setup(int cpu)
497 {
498 if (cpu_read_ops(cpu))
499 return -ENODEV;
500
501 if (cpu_ops[cpu]->cpu_init(cpu))
502 return -ENODEV;
503
504 set_cpu_possible(cpu, true);
505
506 return 0;
507 }
508
509 static bool bootcpu_valid __initdata;
510 static unsigned int cpu_count = 1;
511
512 #ifdef CONFIG_ACPI
513 /*
514 * acpi_map_gic_cpu_interface - parse processor MADT entry
515 *
516 * Carry out sanity checks on MADT processor entry and initialize
517 * cpu_logical_map on success
518 */
519 static void __init
520 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
521 {
522 u64 hwid = processor->arm_mpidr;
523
524 if (!(processor->flags & ACPI_MADT_ENABLED)) {
525 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
526 return;
527 }
528
529 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
530 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
531 return;
532 }
533
534 if (is_mpidr_duplicate(cpu_count, hwid)) {
535 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
536 return;
537 }
538
539 /* Check if GICC structure of boot CPU is available in the MADT */
540 if (cpu_logical_map(0) == hwid) {
541 if (bootcpu_valid) {
542 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
543 hwid);
544 return;
545 }
546 bootcpu_valid = true;
547 return;
548 }
549
550 if (cpu_count >= NR_CPUS)
551 return;
552
553 /* map the logical cpu id to cpu MPIDR */
554 cpu_logical_map(cpu_count) = hwid;
555
556 /*
557 * Set-up the ACPI parking protocol cpu entries
558 * while initializing the cpu_logical_map to
559 * avoid parsing MADT entries multiple times for
560 * nothing (ie a valid cpu_logical_map entry should
561 * contain a valid parking protocol data set to
562 * initialize the cpu if the parking protocol is
563 * the only available enable method).
564 */
565 acpi_set_mailbox_entry(cpu_count, processor);
566
567 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
568
569 cpu_count++;
570 }
571
572 static int __init
573 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
574 const unsigned long end)
575 {
576 struct acpi_madt_generic_interrupt *processor;
577
578 processor = (struct acpi_madt_generic_interrupt *)header;
579 if (BAD_MADT_GICC_ENTRY(processor, end))
580 return -EINVAL;
581
582 acpi_table_print_madt_entry(header);
583
584 acpi_map_gic_cpu_interface(processor);
585
586 return 0;
587 }
588 #else
589 #define acpi_table_parse_madt(...) do { } while (0)
590 #endif
591
592 /*
593 * Enumerate the possible CPU set from the device tree and build the
594 * cpu logical map array containing MPIDR values related to logical
595 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
596 */
597 static void __init of_parse_and_init_cpus(void)
598 {
599 struct device_node *dn = NULL;
600
601 while ((dn = of_find_node_by_type(dn, "cpu"))) {
602 u64 hwid = of_get_cpu_mpidr(dn);
603
604 if (hwid == INVALID_HWID)
605 goto next;
606
607 if (is_mpidr_duplicate(cpu_count, hwid)) {
608 pr_err("%s: duplicate cpu reg properties in the DT\n",
609 dn->full_name);
610 goto next;
611 }
612
613 /*
614 * The numbering scheme requires that the boot CPU
615 * must be assigned logical id 0. Record it so that
616 * the logical map built from DT is validated and can
617 * be used.
618 */
619 if (hwid == cpu_logical_map(0)) {
620 if (bootcpu_valid) {
621 pr_err("%s: duplicate boot cpu reg property in DT\n",
622 dn->full_name);
623 goto next;
624 }
625
626 bootcpu_valid = true;
627
628 /*
629 * cpu_logical_map has already been
630 * initialized and the boot cpu doesn't need
631 * the enable-method so continue without
632 * incrementing cpu.
633 */
634 continue;
635 }
636
637 if (cpu_count >= NR_CPUS)
638 goto next;
639
640 pr_debug("cpu logical map 0x%llx\n", hwid);
641 cpu_logical_map(cpu_count) = hwid;
642
643 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
644 next:
645 cpu_count++;
646 }
647 }
648
649 /*
650 * Enumerate the possible CPU set from the device tree or ACPI and build the
651 * cpu logical map array containing MPIDR values related to logical
652 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
653 */
654 void __init smp_init_cpus(void)
655 {
656 int i;
657
658 if (acpi_disabled)
659 of_parse_and_init_cpus();
660 else
661 /*
662 * do a walk of MADT to determine how many CPUs
663 * we have including disabled CPUs, and get information
664 * we need for SMP init
665 */
666 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
667 acpi_parse_gic_cpu_interface, 0);
668
669 if (cpu_count > nr_cpu_ids)
670 pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n",
671 cpu_count, nr_cpu_ids);
672
673 if (!bootcpu_valid) {
674 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
675 return;
676 }
677
678 /*
679 * We need to set the cpu_logical_map entries before enabling
680 * the cpus so that cpu processor description entries (DT cpu nodes
681 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
682 * with entries in cpu_logical_map while initializing the cpus.
683 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
684 */
685 for (i = 1; i < nr_cpu_ids; i++) {
686 if (cpu_logical_map(i) != INVALID_HWID) {
687 if (smp_cpu_setup(i))
688 cpu_logical_map(i) = INVALID_HWID;
689 }
690 }
691 }
692
693 void __init smp_prepare_cpus(unsigned int max_cpus)
694 {
695 int err;
696 unsigned int cpu;
697
698 init_cpu_topology();
699
700 smp_store_cpu_info(smp_processor_id());
701
702 /*
703 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
704 * secondary CPUs present.
705 */
706 if (max_cpus == 0)
707 return;
708
709 /*
710 * Initialise the present map (which describes the set of CPUs
711 * actually populated at the present time) and release the
712 * secondaries from the bootloader.
713 */
714 for_each_possible_cpu(cpu) {
715
716 if (cpu == smp_processor_id())
717 continue;
718
719 if (!cpu_ops[cpu])
720 continue;
721
722 err = cpu_ops[cpu]->cpu_prepare(cpu);
723 if (err)
724 continue;
725
726 set_cpu_present(cpu, true);
727 }
728 }
729
730 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
731
732 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
733 {
734 __smp_cross_call = fn;
735 }
736
737 static const char *ipi_types[NR_IPI] __tracepoint_string = {
738 #define S(x,s) [x] = s
739 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
740 S(IPI_CALL_FUNC, "Function call interrupts"),
741 S(IPI_CPU_STOP, "CPU stop interrupts"),
742 S(IPI_TIMER, "Timer broadcast interrupts"),
743 S(IPI_IRQ_WORK, "IRQ work interrupts"),
744 S(IPI_WAKEUP, "CPU wake-up interrupts"),
745 };
746
747 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
748 {
749 trace_ipi_raise(target, ipi_types[ipinr]);
750 __smp_cross_call(target, ipinr);
751 }
752
753 void show_ipi_list(struct seq_file *p, int prec)
754 {
755 unsigned int cpu, i;
756
757 for (i = 0; i < NR_IPI; i++) {
758 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
759 prec >= 4 ? " " : "");
760 for_each_online_cpu(cpu)
761 seq_printf(p, "%10u ",
762 __get_irq_stat(cpu, ipi_irqs[i]));
763 seq_printf(p, " %s\n", ipi_types[i]);
764 }
765 }
766
767 u64 smp_irq_stat_cpu(unsigned int cpu)
768 {
769 u64 sum = 0;
770 int i;
771
772 for (i = 0; i < NR_IPI; i++)
773 sum += __get_irq_stat(cpu, ipi_irqs[i]);
774
775 return sum;
776 }
777
778 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
779 {
780 smp_cross_call(mask, IPI_CALL_FUNC);
781 }
782
783 void arch_send_call_function_single_ipi(int cpu)
784 {
785 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
786 }
787
788 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
789 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
790 {
791 smp_cross_call(mask, IPI_WAKEUP);
792 }
793 #endif
794
795 #ifdef CONFIG_IRQ_WORK
796 void arch_irq_work_raise(void)
797 {
798 if (__smp_cross_call)
799 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
800 }
801 #endif
802
803 /*
804 * ipi_cpu_stop - handle IPI from smp_send_stop()
805 */
806 static void ipi_cpu_stop(unsigned int cpu)
807 {
808 set_cpu_online(cpu, false);
809
810 local_irq_disable();
811
812 while (1)
813 cpu_relax();
814 }
815
816 /*
817 * Main handler for inter-processor interrupts
818 */
819 void handle_IPI(int ipinr, struct pt_regs *regs)
820 {
821 unsigned int cpu = smp_processor_id();
822 struct pt_regs *old_regs = set_irq_regs(regs);
823
824 if ((unsigned)ipinr < NR_IPI) {
825 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
826 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
827 }
828
829 switch (ipinr) {
830 case IPI_RESCHEDULE:
831 scheduler_ipi();
832 break;
833
834 case IPI_CALL_FUNC:
835 irq_enter();
836 generic_smp_call_function_interrupt();
837 irq_exit();
838 break;
839
840 case IPI_CPU_STOP:
841 irq_enter();
842 ipi_cpu_stop(cpu);
843 irq_exit();
844 break;
845
846 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
847 case IPI_TIMER:
848 irq_enter();
849 tick_receive_broadcast();
850 irq_exit();
851 break;
852 #endif
853
854 #ifdef CONFIG_IRQ_WORK
855 case IPI_IRQ_WORK:
856 irq_enter();
857 irq_work_run();
858 irq_exit();
859 break;
860 #endif
861
862 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
863 case IPI_WAKEUP:
864 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
865 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
866 cpu);
867 break;
868 #endif
869
870 default:
871 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
872 break;
873 }
874
875 if ((unsigned)ipinr < NR_IPI)
876 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
877 set_irq_regs(old_regs);
878 }
879
880 void smp_send_reschedule(int cpu)
881 {
882 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
883 }
884
885 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
886 void tick_broadcast(const struct cpumask *mask)
887 {
888 smp_cross_call(mask, IPI_TIMER);
889 }
890 #endif
891
892 void smp_send_stop(void)
893 {
894 unsigned long timeout;
895
896 if (num_online_cpus() > 1) {
897 cpumask_t mask;
898
899 cpumask_copy(&mask, cpu_online_mask);
900 cpumask_clear_cpu(smp_processor_id(), &mask);
901
902 if (system_state == SYSTEM_BOOTING ||
903 system_state == SYSTEM_RUNNING)
904 pr_crit("SMP: stopping secondary CPUs\n");
905 smp_cross_call(&mask, IPI_CPU_STOP);
906 }
907
908 /* Wait up to one second for other CPUs to stop */
909 timeout = USEC_PER_SEC;
910 while (num_online_cpus() > 1 && timeout--)
911 udelay(1);
912
913 if (num_online_cpus() > 1)
914 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
915 cpumask_pr_args(cpu_online_mask));
916 }
917
918 /*
919 * not supported here
920 */
921 int setup_profiling_timer(unsigned int multiplier)
922 {
923 return -EINVAL;
924 }
925
926 static bool have_cpu_die(void)
927 {
928 #ifdef CONFIG_HOTPLUG_CPU
929 int any_cpu = raw_smp_processor_id();
930
931 if (cpu_ops[any_cpu]->cpu_die)
932 return true;
933 #endif
934 return false;
935 }
936
937 bool cpus_are_stuck_in_kernel(void)
938 {
939 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
940
941 return !!cpus_stuck_in_kernel || smp_spin_tables;
942 }
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