arch/blackfin/include/asm/bfin_twi.h

   1 /*
   2  * bfin_twi.h - interface to Blackfin TWIs
   3  *
   4  * Copyright 2005-2010 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #ifndef __ASM_BFIN_TWI_H__
  10 #define __ASM_BFIN_TWI_H__
  11
  12 #include <asm/blackfin.h>
  13
  14 #define DEFINE_TWI_REG(reg_name, reg) \
  15 static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \
  16         { return bfin_read16(&iface->regs_base->reg); } \
  17 static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \
  18         { bfin_write16(&iface->regs_base->reg, v); }
  19
  20 DEFINE_TWI_REG(CLKDIV, clkdiv)
  21 DEFINE_TWI_REG(CONTROL, control)
  22 DEFINE_TWI_REG(SLAVE_CTL, slave_ctl)
  23 DEFINE_TWI_REG(SLAVE_STAT, slave_stat)
  24 DEFINE_TWI_REG(SLAVE_ADDR, slave_addr)
  25 DEFINE_TWI_REG(MASTER_CTL, master_ctl)
  26 DEFINE_TWI_REG(MASTER_STAT, master_stat)
  27 DEFINE_TWI_REG(MASTER_ADDR, master_addr)
  28 DEFINE_TWI_REG(INT_STAT, int_stat)
  29 DEFINE_TWI_REG(INT_MASK, int_mask)
  30 DEFINE_TWI_REG(FIFO_CTL, fifo_ctl)
  31 DEFINE_TWI_REG(FIFO_STAT, fifo_stat)
  32 DEFINE_TWI_REG(XMT_DATA8, xmt_data8)
  33 DEFINE_TWI_REG(XMT_DATA16, xmt_data16)
  34 #if !ANOMALY_16000030
  35 DEFINE_TWI_REG(RCV_DATA8, rcv_data8)
  36 DEFINE_TWI_REG(RCV_DATA16, rcv_data16)
  37 #else
  38 static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface)
  39 {
  40         u16 ret;
  41         unsigned long flags;
  42
  43         flags = hard_local_irq_save();
  44         ret = bfin_read16(&iface->regs_base->rcv_data8);
  45         hard_local_irq_restore(flags);
  46
  47         return ret;
  48 }
  49
  50 static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface)
  51 {
  52         u16 ret;
  53         unsigned long flags;
  54
  55         flags = hard_local_irq_save();
  56         ret = bfin_read16(&iface->regs_base->rcv_data16);
  57         hard_local_irq_restore(flags);
  58
  59         return ret;
  60 }
  61 #endif
  62
  63 #endif