arch/blackfin/kernel/bfin_gpio.c

   1 /*
   2  * File:         arch/blackfin/kernel/bfin_gpio.c
   3  * Based on:
   4  * Author:       Michael Hennerich (hennerich@blackfin.uclinux.org)
   5  *
   6  * Created:
   7  * Description:  GPIO Abstraction Layer
   8  *
   9  * Modified:
  10  *               Copyright 2008 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #include <linux/delay.h>
  31 #include <linux/module.h>
  32 #include <linux/err.h>
  33 #include <linux/proc_fs.h>
  34 #include <asm/blackfin.h>
  35 #include <asm/gpio.h>
  36 #include <asm/portmux.h>
  37 #include <linux/irq.h>
  38
  39 #if ANOMALY_05000311 || ANOMALY_05000323
  40 enum {
  41         AWA_data = SYSCR,
  42         AWA_data_clear = SYSCR,
  43         AWA_data_set = SYSCR,
  44         AWA_toggle = SYSCR,
  45         AWA_maska = BFIN_UART_SCR,
  46         AWA_maska_clear = BFIN_UART_SCR,
  47         AWA_maska_set = BFIN_UART_SCR,
  48         AWA_maska_toggle = BFIN_UART_SCR,
  49         AWA_maskb = BFIN_UART_GCTL,
  50         AWA_maskb_clear = BFIN_UART_GCTL,
  51         AWA_maskb_set = BFIN_UART_GCTL,
  52         AWA_maskb_toggle = BFIN_UART_GCTL,
  53         AWA_dir = SPORT1_STAT,
  54         AWA_polar = SPORT1_STAT,
  55         AWA_edge = SPORT1_STAT,
  56         AWA_both = SPORT1_STAT,
  57 #if ANOMALY_05000311
  58         AWA_inen = TIMER_ENABLE,
  59 #elif ANOMALY_05000323
  60         AWA_inen = DMA1_1_CONFIG,
  61 #endif
  62 };
  63         /* Anomaly Workaround */
  64 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  65 #else
  66 #define AWA_DUMMY_READ(...)  do { } while (0)
  67 #endif
  68
  69 static struct gpio_port_t * const gpio_array[] = {
  70 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  71         (struct gpio_port_t *) FIO_FLAG_D,
  72 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  73         (struct gpio_port_t *) PORTFIO,
  74         (struct gpio_port_t *) PORTGIO,
  75         (struct gpio_port_t *) PORTHIO,
  76 #elif defined(BF561_FAMILY)
  77         (struct gpio_port_t *) FIO0_FLAG_D,
  78         (struct gpio_port_t *) FIO1_FLAG_D,
  79         (struct gpio_port_t *) FIO2_FLAG_D,
  80 #elif defined(CONFIG_BF54x)
  81         (struct gpio_port_t *)PORTA_FER,
  82         (struct gpio_port_t *)PORTB_FER,
  83         (struct gpio_port_t *)PORTC_FER,
  84         (struct gpio_port_t *)PORTD_FER,
  85         (struct gpio_port_t *)PORTE_FER,
  86         (struct gpio_port_t *)PORTF_FER,
  87         (struct gpio_port_t *)PORTG_FER,
  88         (struct gpio_port_t *)PORTH_FER,
  89         (struct gpio_port_t *)PORTI_FER,
  90         (struct gpio_port_t *)PORTJ_FER,
  91 #else
  92 # error no gpio arrays defined
  93 #endif
  94 };
  95
  96 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  97 static unsigned short * const port_fer[] = {
  98         (unsigned short *) PORTF_FER,
  99         (unsigned short *) PORTG_FER,
 100         (unsigned short *) PORTH_FER,
 101 };
 102
 103 # if !defined(BF537_FAMILY)
 104 static unsigned short * const port_mux[] = {
 105         (unsigned short *) PORTF_MUX,
 106         (unsigned short *) PORTG_MUX,
 107         (unsigned short *) PORTH_MUX,
 108 };
 109
 110 static const
 111 u8 pmux_offset[][16] = {
 112 #  if defined(CONFIG_BF52x)
 113         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
 114         { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
 115         { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
 116 #  elif defined(CONFIG_BF51x)
 117         { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
 118         { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
 119         { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
 120 #  endif
 121 };
 122 # endif
 123
 124 #endif
 125
 126 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
 127 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
 128 static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
 129
 130 #define RESOURCE_LABEL_SIZE     16
 131
 132 static struct str_ident {
 133         char name[RESOURCE_LABEL_SIZE];
 134 } str_ident[MAX_RESOURCES];
 135
 136 #if defined(CONFIG_PM)
 137 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
 138 #endif
 139
 140 inline int check_gpio(unsigned gpio)
 141 {
 142 #if defined(CONFIG_BF54x)
 143         if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
 144             || gpio == GPIO_PH14 || gpio == GPIO_PH15
 145             || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
 146                 return -EINVAL;
 147 #endif
 148         if (gpio >= MAX_BLACKFIN_GPIOS)
 149                 return -EINVAL;
 150         return 0;
 151 }
 152
 153 static void gpio_error(unsigned gpio)
 154 {
 155         printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
 156 }
 157
 158 static void set_label(unsigned short ident, const char *label)
 159 {
 160         if (label) {
 161                 strncpy(str_ident[ident].name, label,
 162                          RESOURCE_LABEL_SIZE);
 163                 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
 164         }
 165 }
 166
 167 static char *get_label(unsigned short ident)
 168 {
 169         return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
 170 }
 171
 172 static int cmp_label(unsigned short ident, const char *label)
 173 {
 174         if (label == NULL) {
 175                 dump_stack();
 176                 printk(KERN_ERR "Please provide none-null label\n");
 177         }
 178
 179         if (label)
 180                 return strcmp(str_ident[ident].name, label);
 181         else
 182                 return -EINVAL;
 183 }
 184
 185 static void port_setup(unsigned gpio, unsigned short usage)
 186 {
 187         if (check_gpio(gpio))
 188                 return;
 189
 190 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 191         if (usage == GPIO_USAGE)
 192                 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 193         else
 194                 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
 195         SSYNC();
 196 #elif defined(CONFIG_BF54x)
 197         if (usage == GPIO_USAGE)
 198                 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
 199         else
 200                 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
 201         SSYNC();
 202 #endif
 203 }
 204
 205 #ifdef BF537_FAMILY
 206 static struct {
 207         unsigned short res;
 208         unsigned short offset;
 209 } port_mux_lut[] = {
 210         {.res = P_PPI0_D13, .offset = 11},
 211         {.res = P_PPI0_D14, .offset = 11},
 212         {.res = P_PPI0_D15, .offset = 11},
 213         {.res = P_SPORT1_TFS, .offset = 11},
 214         {.res = P_SPORT1_TSCLK, .offset = 11},
 215         {.res = P_SPORT1_DTPRI, .offset = 11},
 216         {.res = P_PPI0_D10, .offset = 10},
 217         {.res = P_PPI0_D11, .offset = 10},
 218         {.res = P_PPI0_D12, .offset = 10},
 219         {.res = P_SPORT1_RSCLK, .offset = 10},
 220         {.res = P_SPORT1_RFS, .offset = 10},
 221         {.res = P_SPORT1_DRPRI, .offset = 10},
 222         {.res = P_PPI0_D8, .offset = 9},
 223         {.res = P_PPI0_D9, .offset = 9},
 224         {.res = P_SPORT1_DRSEC, .offset = 9},
 225         {.res = P_SPORT1_DTSEC, .offset = 9},
 226         {.res = P_TMR2, .offset = 8},
 227         {.res = P_PPI0_FS3, .offset = 8},
 228         {.res = P_TMR3, .offset = 7},
 229         {.res = P_SPI0_SSEL4, .offset = 7},
 230         {.res = P_TMR4, .offset = 6},
 231         {.res = P_SPI0_SSEL5, .offset = 6},
 232         {.res = P_TMR5, .offset = 5},
 233         {.res = P_SPI0_SSEL6, .offset = 5},
 234         {.res = P_UART1_RX, .offset = 4},
 235         {.res = P_UART1_TX, .offset = 4},
 236         {.res = P_TMR6, .offset = 4},
 237         {.res = P_TMR7, .offset = 4},
 238         {.res = P_UART0_RX, .offset = 3},
 239         {.res = P_UART0_TX, .offset = 3},
 240         {.res = P_DMAR0, .offset = 3},
 241         {.res = P_DMAR1, .offset = 3},
 242         {.res = P_SPORT0_DTSEC, .offset = 1},
 243         {.res = P_SPORT0_DRSEC, .offset = 1},
 244         {.res = P_CAN0_RX, .offset = 1},
 245         {.res = P_CAN0_TX, .offset = 1},
 246         {.res = P_SPI0_SSEL7, .offset = 1},
 247         {.res = P_SPORT0_TFS, .offset = 0},
 248         {.res = P_SPORT0_DTPRI, .offset = 0},
 249         {.res = P_SPI0_SSEL2, .offset = 0},
 250         {.res = P_SPI0_SSEL3, .offset = 0},
 251 };
 252
 253 static void portmux_setup(unsigned short per)
 254 {
 255         u16 y, offset, muxreg;
 256         u16 function = P_FUNCT2MUX(per);
 257
 258         for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
 259                 if (port_mux_lut[y].res == per) {
 260
 261                         /* SET PORTMUX REG */
 262
 263                         offset = port_mux_lut[y].offset;
 264                         muxreg = bfin_read_PORT_MUX();
 265
 266                         if (offset != 1)
 267                                 muxreg &= ~(1 << offset);
 268                         else
 269                                 muxreg &= ~(3 << 1);
 270
 271                         muxreg |= (function << offset);
 272                         bfin_write_PORT_MUX(muxreg);
 273                 }
 274         }
 275 }
 276 #elif defined(CONFIG_BF54x)
 277 inline void portmux_setup(unsigned short per)
 278 {
 279         u32 pmux;
 280         u16 ident = P_IDENT(per);
 281         u16 function = P_FUNCT2MUX(per);
 282
 283         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 284
 285         pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
 286         pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
 287
 288         gpio_array[gpio_bank(ident)]->port_mux = pmux;
 289 }
 290
 291 inline u16 get_portmux(unsigned short per)
 292 {
 293         u32 pmux;
 294         u16 ident = P_IDENT(per);
 295
 296         pmux = gpio_array[gpio_bank(ident)]->port_mux;
 297
 298         return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
 299 }
 300 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 301 inline void portmux_setup(unsigned short per)
 302 {
 303         u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
 304         u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
 305
 306         pmux = *port_mux[gpio_bank(ident)];
 307         pmux &= ~(3 << offset);
 308         pmux |= (function & 3) << offset;
 309         *port_mux[gpio_bank(ident)] = pmux;
 310         SSYNC();
 311 }
 312 #else
 313 # define portmux_setup(...)  do { } while (0)
 314 #endif
 315
 316 #ifndef CONFIG_BF54x
 317 /***********************************************************
 318 *
 319 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
 320 *
 321 * INPUTS/OUTPUTS:
 322 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 323 *
 324 *
 325 * DESCRIPTION: These functions abstract direct register access
 326 *              to Blackfin processor General Purpose
 327 *              Ports Regsiters
 328 *
 329 * CAUTION: These functions do not belong to the GPIO Driver API
 330 *************************************************************
 331 * MODIFICATION HISTORY :
 332 **************************************************************/
 333
 334 /* Set a specific bit */
 335
 336 #define SET_GPIO(name) \
 337 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 338 { \
 339         unsigned long flags; \
 340         local_irq_save_hw(flags); \
 341         if (arg) \
 342                 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
 343         else \
 344                 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
 345         AWA_DUMMY_READ(name); \
 346         local_irq_restore_hw(flags); \
 347 } \
 348 EXPORT_SYMBOL(set_gpio_ ## name);
 349
 350 SET_GPIO(dir)   /* set_gpio_dir() */
 351 SET_GPIO(inen)  /* set_gpio_inen() */
 352 SET_GPIO(polar) /* set_gpio_polar() */
 353 SET_GPIO(edge)  /* set_gpio_edge() */
 354 SET_GPIO(both)  /* set_gpio_both() */
 355
 356
 357 #define SET_GPIO_SC(name) \
 358 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 359 { \
 360         unsigned long flags; \
 361         if (ANOMALY_05000311 || ANOMALY_05000323) \
 362                 local_irq_save_hw(flags); \
 363         if (arg) \
 364                 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
 365         else \
 366                 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
 367         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 368                 AWA_DUMMY_READ(name); \
 369                 local_irq_restore_hw(flags); \
 370         } \
 371 } \
 372 EXPORT_SYMBOL(set_gpio_ ## name);
 373
 374 SET_GPIO_SC(maska)
 375 SET_GPIO_SC(maskb)
 376 SET_GPIO_SC(data)
 377
 378 void set_gpio_toggle(unsigned gpio)
 379 {
 380         unsigned long flags;
 381         if (ANOMALY_05000311 || ANOMALY_05000323)
 382                 local_irq_save_hw(flags);
 383         gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
 384         if (ANOMALY_05000311 || ANOMALY_05000323) {
 385                 AWA_DUMMY_READ(toggle);
 386                 local_irq_restore_hw(flags);
 387         }
 388 }
 389 EXPORT_SYMBOL(set_gpio_toggle);
 390
 391
 392 /*Set current PORT date (16-bit word)*/
 393
 394 #define SET_GPIO_P(name) \
 395 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
 396 { \
 397         unsigned long flags; \
 398         if (ANOMALY_05000311 || ANOMALY_05000323) \
 399                 local_irq_save_hw(flags); \
 400         gpio_array[gpio_bank(gpio)]->name = arg; \
 401         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 402                 AWA_DUMMY_READ(name); \
 403                 local_irq_restore_hw(flags); \
 404         } \
 405 } \
 406 EXPORT_SYMBOL(set_gpiop_ ## name);
 407
 408 SET_GPIO_P(data)
 409 SET_GPIO_P(dir)
 410 SET_GPIO_P(inen)
 411 SET_GPIO_P(polar)
 412 SET_GPIO_P(edge)
 413 SET_GPIO_P(both)
 414 SET_GPIO_P(maska)
 415 SET_GPIO_P(maskb)
 416
 417 /* Get a specific bit */
 418 #define GET_GPIO(name) \
 419 unsigned short get_gpio_ ## name(unsigned gpio) \
 420 { \
 421         unsigned long flags; \
 422         unsigned short ret; \
 423         if (ANOMALY_05000311 || ANOMALY_05000323) \
 424                 local_irq_save_hw(flags); \
 425         ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
 426         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 427                 AWA_DUMMY_READ(name); \
 428                 local_irq_restore_hw(flags); \
 429         } \
 430         return ret; \
 431 } \
 432 EXPORT_SYMBOL(get_gpio_ ## name);
 433
 434 GET_GPIO(data)
 435 GET_GPIO(dir)
 436 GET_GPIO(inen)
 437 GET_GPIO(polar)
 438 GET_GPIO(edge)
 439 GET_GPIO(both)
 440 GET_GPIO(maska)
 441 GET_GPIO(maskb)
 442
 443 /*Get current PORT date (16-bit word)*/
 444
 445 #define GET_GPIO_P(name) \
 446 unsigned short get_gpiop_ ## name(unsigned gpio) \
 447 { \
 448         unsigned long flags; \
 449         unsigned short ret; \
 450         if (ANOMALY_05000311 || ANOMALY_05000323) \
 451                 local_irq_save_hw(flags); \
 452         ret = (gpio_array[gpio_bank(gpio)]->name); \
 453         if (ANOMALY_05000311 || ANOMALY_05000323) { \
 454                 AWA_DUMMY_READ(name); \
 455                 local_irq_restore_hw(flags); \
 456         } \
 457         return ret; \
 458 } \
 459 EXPORT_SYMBOL(get_gpiop_ ## name);
 460
 461 GET_GPIO_P(data)
 462 GET_GPIO_P(dir)
 463 GET_GPIO_P(inen)
 464 GET_GPIO_P(polar)
 465 GET_GPIO_P(edge)
 466 GET_GPIO_P(both)
 467 GET_GPIO_P(maska)
 468 GET_GPIO_P(maskb)
 469
 470
 471 #ifdef CONFIG_PM
 472
 473 static unsigned short wakeup_map[GPIO_BANK_NUM];
 474 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
 475
 476 static const unsigned int sic_iwr_irqs[] = {
 477 #if defined(BF533_FAMILY)
 478         IRQ_PROG_INTB
 479 #elif defined(BF537_FAMILY)
 480         IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
 481 #elif defined(BF538_FAMILY)
 482         IRQ_PORTF_INTB
 483 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 484         IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
 485 #elif defined(BF561_FAMILY)
 486         IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
 487 #else
 488 # error no SIC_IWR defined
 489 #endif
 490 };
 491
 492 /***********************************************************
 493 *
 494 * FUNCTIONS: Blackfin PM Setup API
 495 *
 496 * INPUTS/OUTPUTS:
 497 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
 498 * type -
 499 *       PM_WAKE_RISING
 500 *       PM_WAKE_FALLING
 501 *       PM_WAKE_HIGH
 502 *       PM_WAKE_LOW
 503 *       PM_WAKE_BOTH_EDGES
 504 *
 505 * DESCRIPTION: Blackfin PM Driver API
 506 *
 507 * CAUTION:
 508 *************************************************************
 509 * MODIFICATION HISTORY :
 510 **************************************************************/
 511 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
 512 {
 513         unsigned long flags;
 514
 515         if ((check_gpio(gpio) < 0) || !type)
 516                 return -EINVAL;
 517
 518         local_irq_save_hw(flags);
 519         wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 520         wakeup_flags_map[gpio] = type;
 521         local_irq_restore_hw(flags);
 522
 523         return 0;
 524 }
 525 EXPORT_SYMBOL(gpio_pm_wakeup_request);
 526
 527 void gpio_pm_wakeup_free(unsigned gpio)
 528 {
 529         unsigned long flags;
 530
 531         if (check_gpio(gpio) < 0)
 532                 return;
 533
 534         local_irq_save_hw(flags);
 535
 536         wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 537
 538         local_irq_restore_hw(flags);
 539 }
 540 EXPORT_SYMBOL(gpio_pm_wakeup_free);
 541
 542 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
 543 {
 544         port_setup(gpio, GPIO_USAGE);
 545         set_gpio_dir(gpio, 0);
 546         set_gpio_inen(gpio, 1);
 547
 548         if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
 549                 set_gpio_edge(gpio, 1);
 550          else
 551                 set_gpio_edge(gpio, 0);
 552
 553         if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
 554                 set_gpio_both(gpio, 1);
 555         else
 556                 set_gpio_both(gpio, 0);
 557
 558         if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
 559                 set_gpio_polar(gpio, 1);
 560         else
 561                 set_gpio_polar(gpio, 0);
 562
 563         SSYNC();
 564
 565         return 0;
 566 }
 567
 568 u32 bfin_pm_standby_setup(void)
 569 {
 570         u16 bank, mask, i, gpio;
 571
 572         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 573                 mask = wakeup_map[gpio_bank(i)];
 574                 bank = gpio_bank(i);
 575
 576                 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
 577                 gpio_array[bank]->maskb = 0;
 578
 579                 if (mask) {
 580 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 581                         gpio_bank_saved[bank].fer   = *port_fer[bank];
 582 #endif
 583                         gpio_bank_saved[bank].inen  = gpio_array[bank]->inen;
 584                         gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
 585                         gpio_bank_saved[bank].dir   = gpio_array[bank]->dir;
 586                         gpio_bank_saved[bank].edge  = gpio_array[bank]->edge;
 587                         gpio_bank_saved[bank].both  = gpio_array[bank]->both;
 588                         gpio_bank_saved[bank].reserved =
 589                                                 reserved_gpio_map[bank];
 590
 591                         gpio = i;
 592
 593                         while (mask) {
 594                                 if ((mask & 1) && (wakeup_flags_map[gpio] !=
 595                                         PM_WAKE_IGNORE)) {
 596                                         reserved_gpio_map[gpio_bank(gpio)] |=
 597                                                         gpio_bit(gpio);
 598                                         bfin_gpio_wakeup_type(gpio,
 599                                                 wakeup_flags_map[gpio]);
 600                                         set_gpio_data(gpio, 0); /*Clear*/
 601                                 }
 602                                 gpio++;
 603                                 mask >>= 1;
 604                         }
 605
 606                         bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
 607                         gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
 608                 }
 609         }
 610
 611         AWA_DUMMY_READ(maskb_set);
 612
 613         return 0;
 614 }
 615
 616 void bfin_pm_standby_restore(void)
 617 {
 618         u16 bank, mask, i;
 619
 620         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 621                 mask = wakeup_map[gpio_bank(i)];
 622                 bank = gpio_bank(i);
 623
 624                 if (mask) {
 625 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 626                         *port_fer[bank]         = gpio_bank_saved[bank].fer;
 627 #endif
 628                         gpio_array[bank]->inen  = gpio_bank_saved[bank].inen;
 629                         gpio_array[bank]->dir   = gpio_bank_saved[bank].dir;
 630                         gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
 631                         gpio_array[bank]->edge  = gpio_bank_saved[bank].edge;
 632                         gpio_array[bank]->both  = gpio_bank_saved[bank].both;
 633
 634                         reserved_gpio_map[bank] =
 635                                         gpio_bank_saved[bank].reserved;
 636                         bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
 637                 }
 638
 639                 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
 640         }
 641         AWA_DUMMY_READ(maskb);
 642 }
 643
 644 void bfin_gpio_pm_hibernate_suspend(void)
 645 {
 646         int i, bank;
 647
 648         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 649                 bank = gpio_bank(i);
 650
 651 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 652                 gpio_bank_saved[bank].fer = *port_fer[bank];
 653 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 654                 gpio_bank_saved[bank].mux = *port_mux[bank];
 655 #else
 656                 if (bank == 0)
 657                         gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
 658 #endif
 659 #endif
 660                 gpio_bank_saved[bank].data  = gpio_array[bank]->data;
 661                 gpio_bank_saved[bank].inen  = gpio_array[bank]->inen;
 662                 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
 663                 gpio_bank_saved[bank].dir   = gpio_array[bank]->dir;
 664                 gpio_bank_saved[bank].edge  = gpio_array[bank]->edge;
 665                 gpio_bank_saved[bank].both  = gpio_array[bank]->both;
 666                 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
 667         }
 668
 669         AWA_DUMMY_READ(maska);
 670 }
 671
 672 void bfin_gpio_pm_hibernate_restore(void)
 673 {
 674         int i, bank;
 675
 676         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 677                 bank = gpio_bank(i);
 678
 679 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
 680 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
 681                 *port_mux[bank] = gpio_bank_saved[bank].mux;
 682 #else
 683                 if (bank == 0)
 684                         bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
 685 #endif
 686                 *port_fer[bank] = gpio_bank_saved[bank].fer;
 687 #endif
 688                 gpio_array[bank]->inen  = gpio_bank_saved[bank].inen;
 689                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 690                                                 & gpio_bank_saved[bank].dir;
 691                 gpio_array[bank]->dir   = gpio_bank_saved[bank].dir;
 692                 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
 693                 gpio_array[bank]->edge  = gpio_bank_saved[bank].edge;
 694                 gpio_array[bank]->both  = gpio_bank_saved[bank].both;
 695                 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
 696         }
 697         AWA_DUMMY_READ(maska);
 698 }
 699
 700
 701 #endif
 702 #else /* CONFIG_BF54x */
 703 #ifdef CONFIG_PM
 704
 705 u32 bfin_pm_standby_setup(void)
 706 {
 707         return 0;
 708 }
 709
 710 void bfin_pm_standby_restore(void)
 711 {
 712
 713 }
 714
 715 void bfin_gpio_pm_hibernate_suspend(void)
 716 {
 717         int i, bank;
 718
 719         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 720                 bank = gpio_bank(i);
 721
 722                 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
 723                 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
 724                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
 725                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
 726                 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
 727                 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
 728         }
 729 }
 730
 731 void bfin_gpio_pm_hibernate_restore(void)
 732 {
 733         int i, bank;
 734
 735         for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
 736                 bank = gpio_bank(i);
 737
 738                 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
 739                 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
 740                 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
 741                 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
 742                 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
 743                                                 | gpio_bank_saved[bank].dir;
 744         }
 745 }
 746 #endif
 747
 748 unsigned short get_gpio_dir(unsigned gpio)
 749 {
 750         return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
 751 }
 752 EXPORT_SYMBOL(get_gpio_dir);
 753
 754 #endif /* CONFIG_BF54x */
 755
 756 /***********************************************************
 757 *
 758 * FUNCTIONS:    Blackfin Peripheral Resource Allocation
 759 *               and PortMux Setup
 760 *
 761 * INPUTS/OUTPUTS:
 762 * per   Peripheral Identifier
 763 * label String
 764 *
 765 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
 766 *
 767 * CAUTION:
 768 *************************************************************
 769 * MODIFICATION HISTORY :
 770 **************************************************************/
 771
 772 int peripheral_request(unsigned short per, const char *label)
 773 {
 774         unsigned long flags;
 775         unsigned short ident = P_IDENT(per);
 776
 777         /*
 778          * Don't cares are pins with only one dedicated function
 779          */
 780
 781         if (per & P_DONTCARE)
 782                 return 0;
 783
 784         if (!(per & P_DEFINED))
 785                 return -ENODEV;
 786
 787         local_irq_save_hw(flags);
 788
 789         /* If a pin can be muxed as either GPIO or peripheral, make
 790          * sure it is not already a GPIO pin when we request it.
 791          */
 792         if (unlikely(!check_gpio(ident) &&
 793             reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
 794                 if (system_state == SYSTEM_BOOTING)
 795                         dump_stack();
 796                 printk(KERN_ERR
 797                        "%s: Peripheral %d is already reserved as GPIO by %s !\n",
 798                        __func__, ident, get_label(ident));
 799                 local_irq_restore_hw(flags);
 800                 return -EBUSY;
 801         }
 802
 803         if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
 804
 805                 /*
 806                  * Pin functions like AMC address strobes my
 807                  * be requested and used by several drivers
 808                  */
 809
 810 #ifdef CONFIG_BF54x
 811                 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
 812 #else
 813                 if (!(per & P_MAYSHARE)) {
 814 #endif
 815                         /*
 816                          * Allow that the identical pin function can
 817                          * be requested from the same driver twice
 818                          */
 819
 820                         if (cmp_label(ident, label) == 0)
 821                                 goto anyway;
 822
 823                         if (system_state == SYSTEM_BOOTING)
 824                                 dump_stack();
 825                         printk(KERN_ERR
 826                                "%s: Peripheral %d function %d is already reserved by %s !\n",
 827                                __func__, ident, P_FUNCT2MUX(per), get_label(ident));
 828                         local_irq_restore_hw(flags);
 829                         return -EBUSY;
 830                 }
 831         }
 832
 833  anyway:
 834         reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
 835
 836         portmux_setup(per);
 837         port_setup(ident, PERIPHERAL_USAGE);
 838
 839         local_irq_restore_hw(flags);
 840         set_label(ident, label);
 841
 842         return 0;
 843 }
 844 EXPORT_SYMBOL(peripheral_request);
 845
 846 int peripheral_request_list(const unsigned short per[], const char *label)
 847 {
 848         u16 cnt;
 849         int ret;
 850
 851         for (cnt = 0; per[cnt] != 0; cnt++) {
 852
 853                 ret = peripheral_request(per[cnt], label);
 854
 855                 if (ret < 0) {
 856                         for ( ; cnt > 0; cnt--)
 857                                 peripheral_free(per[cnt - 1]);
 858
 859                         return ret;
 860                 }
 861         }
 862
 863         return 0;
 864 }
 865 EXPORT_SYMBOL(peripheral_request_list);
 866
 867 void peripheral_free(unsigned short per)
 868 {
 869         unsigned long flags;
 870         unsigned short ident = P_IDENT(per);
 871
 872         if (per & P_DONTCARE)
 873                 return;
 874
 875         if (!(per & P_DEFINED))
 876                 return;
 877
 878         local_irq_save_hw(flags);
 879
 880         if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
 881                 local_irq_restore_hw(flags);
 882                 return;
 883         }
 884
 885         if (!(per & P_MAYSHARE))
 886                 port_setup(ident, GPIO_USAGE);
 887
 888         reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
 889
 890         set_label(ident, "free");
 891
 892         local_irq_restore_hw(flags);
 893 }
 894 EXPORT_SYMBOL(peripheral_free);
 895
 896 void peripheral_free_list(const unsigned short per[])
 897 {
 898         u16 cnt;
 899         for (cnt = 0; per[cnt] != 0; cnt++)
 900                 peripheral_free(per[cnt]);
 901 }
 902 EXPORT_SYMBOL(peripheral_free_list);
 903
 904 /***********************************************************
 905 *
 906 * FUNCTIONS: Blackfin GPIO Driver
 907 *
 908 * INPUTS/OUTPUTS:
 909 * gpio  PIO Number between 0 and MAX_BLACKFIN_GPIOS
 910 * label String
 911 *
 912 * DESCRIPTION: Blackfin GPIO Driver API
 913 *
 914 * CAUTION:
 915 *************************************************************
 916 * MODIFICATION HISTORY :
 917 **************************************************************/
 918
 919 int bfin_gpio_request(unsigned gpio, const char *label)
 920 {
 921         unsigned long flags;
 922
 923         if (check_gpio(gpio) < 0)
 924                 return -EINVAL;
 925
 926         local_irq_save_hw(flags);
 927
 928         /*
 929          * Allow that the identical GPIO can
 930          * be requested from the same driver twice
 931          * Do nothing and return -
 932          */
 933
 934         if (cmp_label(gpio, label) == 0) {
 935                 local_irq_restore_hw(flags);
 936                 return 0;
 937         }
 938
 939         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 940                 if (system_state == SYSTEM_BOOTING)
 941                         dump_stack();
 942                 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
 943                        gpio, get_label(gpio));
 944                 local_irq_restore_hw(flags);
 945                 return -EBUSY;
 946         }
 947         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 948                 if (system_state == SYSTEM_BOOTING)
 949                         dump_stack();
 950                 printk(KERN_ERR
 951                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
 952                        gpio, get_label(gpio));
 953                 local_irq_restore_hw(flags);
 954                 return -EBUSY;
 955         }
 956         if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
 957                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
 958                        " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
 959         }
 960 #ifndef CONFIG_BF54x
 961         else {  /* Reset POLAR setting when acquiring a gpio for the first time */
 962                 set_gpio_polar(gpio, 0);
 963         }
 964 #endif
 965
 966         reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
 967         set_label(gpio, label);
 968
 969         local_irq_restore_hw(flags);
 970
 971         port_setup(gpio, GPIO_USAGE);
 972
 973         return 0;
 974 }
 975 EXPORT_SYMBOL(bfin_gpio_request);
 976
 977 void bfin_gpio_free(unsigned gpio)
 978 {
 979         unsigned long flags;
 980
 981         if (check_gpio(gpio) < 0)
 982                 return;
 983
 984         might_sleep();
 985
 986         local_irq_save_hw(flags);
 987
 988         if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
 989                 if (system_state == SYSTEM_BOOTING)
 990                         dump_stack();
 991                 gpio_error(gpio);
 992                 local_irq_restore_hw(flags);
 993                 return;
 994         }
 995
 996         reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
 997
 998         set_label(gpio, "free");
 999
1000         local_irq_restore_hw(flags);
1001 }
1002 EXPORT_SYMBOL(bfin_gpio_free);
1003
1004 int bfin_gpio_irq_request(unsigned gpio, const char *label)
1005 {
1006         unsigned long flags;
1007
1008         if (check_gpio(gpio) < 0)
1009                 return -EINVAL;
1010
1011         local_irq_save_hw(flags);
1012
1013         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1014                 if (system_state == SYSTEM_BOOTING)
1015                         dump_stack();
1016                 printk(KERN_ERR
1017                        "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1018                        gpio, get_label(gpio));
1019                 local_irq_restore_hw(flags);
1020                 return -EBUSY;
1021         }
1022         if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
1023                 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1024                        "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1025                        gpio, get_label(gpio));
1026
1027         reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1028         set_label(gpio, label);
1029
1030         local_irq_restore_hw(flags);
1031
1032         port_setup(gpio, GPIO_USAGE);
1033
1034         return 0;
1035 }
1036
1037 void bfin_gpio_irq_free(unsigned gpio)
1038 {
1039         unsigned long flags;
1040
1041         if (check_gpio(gpio) < 0)
1042                 return;
1043
1044         local_irq_save_hw(flags);
1045
1046         if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1047                 if (system_state == SYSTEM_BOOTING)
1048                         dump_stack();
1049                 gpio_error(gpio);
1050                 local_irq_restore_hw(flags);
1051                 return;
1052         }
1053
1054         reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1055
1056         set_label(gpio, "free");
1057
1058         local_irq_restore_hw(flags);
1059 }
1060
1061 static inline void __bfin_gpio_direction_input(unsigned gpio)
1062 {
1063 #ifdef CONFIG_BF54x
1064         gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1065 #else
1066         gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1067 #endif
1068         gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1069 }
1070
1071 int bfin_gpio_direction_input(unsigned gpio)
1072 {
1073         unsigned long flags;
1074
1075         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1076                 gpio_error(gpio);
1077                 return -EINVAL;
1078         }
1079
1080         local_irq_save_hw(flags);
1081         __bfin_gpio_direction_input(gpio);
1082         AWA_DUMMY_READ(inen);
1083         local_irq_restore_hw(flags);
1084
1085         return 0;
1086 }
1087 EXPORT_SYMBOL(bfin_gpio_direction_input);
1088
1089 void bfin_gpio_irq_prepare(unsigned gpio)
1090 {
1091 #ifdef CONFIG_BF54x
1092         unsigned long flags;
1093 #endif
1094
1095         port_setup(gpio, GPIO_USAGE);
1096
1097 #ifdef CONFIG_BF54x
1098         local_irq_save_hw(flags);
1099         __bfin_gpio_direction_input(gpio);
1100         local_irq_restore_hw(flags);
1101 #endif
1102 }
1103
1104 void bfin_gpio_set_value(unsigned gpio, int arg)
1105 {
1106         if (arg)
1107                 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1108         else
1109                 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1110 }
1111 EXPORT_SYMBOL(bfin_gpio_set_value);
1112
1113 int bfin_gpio_direction_output(unsigned gpio, int value)
1114 {
1115         unsigned long flags;
1116
1117         if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1118                 gpio_error(gpio);
1119                 return -EINVAL;
1120         }
1121
1122         local_irq_save_hw(flags);
1123
1124         gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1125         gpio_set_value(gpio, value);
1126 #ifdef CONFIG_BF54x
1127         gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1128 #else
1129         gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1130 #endif
1131
1132         AWA_DUMMY_READ(dir);
1133         local_irq_restore_hw(flags);
1134
1135         return 0;
1136 }
1137 EXPORT_SYMBOL(bfin_gpio_direction_output);
1138
1139 int bfin_gpio_get_value(unsigned gpio)
1140 {
1141 #ifdef CONFIG_BF54x
1142         return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1143 #else
1144         unsigned long flags;
1145
1146         if (unlikely(get_gpio_edge(gpio))) {
1147                 int ret;
1148                 local_irq_save_hw(flags);
1149                 set_gpio_edge(gpio, 0);
1150                 ret = get_gpio_data(gpio);
1151                 set_gpio_edge(gpio, 1);
1152                 local_irq_restore_hw(flags);
1153                 return ret;
1154         } else
1155                 return get_gpio_data(gpio);
1156 #endif
1157 }
1158 EXPORT_SYMBOL(bfin_gpio_get_value);
1159
1160 /* If we are booting from SPI and our board lacks a strong enough pull up,
1161  * the core can reset and execute the bootrom faster than the resistor can
1162  * pull the signal logically high.  To work around this (common) error in
1163  * board design, we explicitly set the pin back to GPIO mode, force /CS
1164  * high, and wait for the electrons to do their thing.
1165  *
1166  * This function only makes sense to be called from reset code, but it
1167  * lives here as we need to force all the GPIO states w/out going through
1168  * BUG() checks and such.
1169  */
1170 void bfin_reset_boot_spi_cs(unsigned short pin)
1171 {
1172         unsigned short gpio = P_IDENT(pin);
1173         port_setup(gpio, GPIO_USAGE);
1174         gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1175         AWA_DUMMY_READ(data_set);
1176         udelay(1);
1177 }
1178
1179 #if defined(CONFIG_PROC_FS)
1180 static int gpio_proc_read(char *buf, char **start, off_t offset,
1181                           int len, int *unused_i, void *unused_v)
1182 {
1183         int c, irq, gpio, outlen = 0;
1184
1185         for (c = 0; c < MAX_RESOURCES; c++) {
1186                 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1187                 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1188                 if (!check_gpio(c) && (gpio || irq))
1189                         len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1190                                  get_label(c), (gpio && irq) ? " *" : "",
1191                                  get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1192                 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1193                         len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1194                 else
1195                         continue;
1196                 buf += len;
1197                 outlen += len;
1198         }
1199         return outlen;
1200 }
1201
1202 static __init int gpio_register_proc(void)
1203 {
1204         struct proc_dir_entry *proc_gpio;
1205
1206         proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1207         if (proc_gpio)
1208                 proc_gpio->read_proc = gpio_proc_read;
1209         return proc_gpio != NULL;
1210 }
1211 __initcall(gpio_register_proc);
1212 #endif
1213
1214 #ifdef CONFIG_GPIOLIB
1215 int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1216 {
1217         return bfin_gpio_direction_input(gpio);
1218 }
1219
1220 int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1221 {
1222         return bfin_gpio_direction_output(gpio, level);
1223 }
1224
1225 int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1226 {
1227         return bfin_gpio_get_value(gpio);
1228 }
1229
1230 void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1231 {
1232         return bfin_gpio_set_value(gpio, value);
1233 }
1234
1235 int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1236 {
1237         return bfin_gpio_request(gpio, chip->label);
1238 }
1239
1240 void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1241 {
1242         return bfin_gpio_free(gpio);
1243 }
1244
1245 static struct gpio_chip bfin_chip = {
1246         .label                  = "Blackfin-GPIOlib",
1247         .direction_input        = bfin_gpiolib_direction_input,
1248         .get                    = bfin_gpiolib_get_value,
1249         .direction_output       = bfin_gpiolib_direction_output,
1250         .set                    = bfin_gpiolib_set_value,
1251         .request                = bfin_gpiolib_gpio_request,
1252         .free                   = bfin_gpiolib_gpio_free,
1253         .base                   = 0,
1254         .ngpio                  = MAX_BLACKFIN_GPIOS,
1255 };
1256
1257 static int __init bfin_gpiolib_setup(void)
1258 {
1259         return gpiochip_add(&bfin_chip);
1260 }
1261 arch_initcall(bfin_gpiolib_setup);
1262 #endif