c9d6dc88f0e680490c127856a5beb437ddf26479
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / cm_bf527.c
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/etherdevice.h>
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <linux/usb/musb.h>
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/reboot.h>
25 #include <asm/nand.h>
26 #include <asm/portmux.h>
27 #include <asm/dpmc.h>
28 #include <linux/spi/ad7877.h>
29
30 /*
31 * Name the Board for the /proc/cpuinfo
32 */
33 const char bfin_board_name[] = "Bluetechnix CM-BF527";
34
35 /*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
40 #include <linux/usb/isp1760.h>
41 static struct resource bfin_isp1760_resources[] = {
42 [0] = {
43 .start = 0x203C0000,
44 .end = 0x203C0000 + 0x000fffff,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = IRQ_PF7,
49 .end = IRQ_PF7,
50 .flags = IORESOURCE_IRQ,
51 },
52 };
53
54 static struct isp1760_platform_data isp1760_priv = {
55 .is_isp1761 = 0,
56 .bus_width_16 = 1,
57 .port1_otg = 0,
58 .analog_oc = 0,
59 .dack_polarity_high = 0,
60 .dreq_polarity_high = 0,
61 };
62
63 static struct platform_device bfin_isp1760_device = {
64 .name = "isp1760",
65 .id = 0,
66 .dev = {
67 .platform_data = &isp1760_priv,
68 },
69 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
70 .resource = bfin_isp1760_resources,
71 };
72 #endif
73
74 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
75 static struct resource musb_resources[] = {
76 [0] = {
77 .start = 0xffc03800,
78 .end = 0xffc03cff,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = { /* general IRQ */
82 .start = IRQ_USB_INT0,
83 .end = IRQ_USB_INT0,
84 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
85 .name = "mc"
86 },
87 [2] = { /* DMA IRQ */
88 .start = IRQ_USB_DMA,
89 .end = IRQ_USB_DMA,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
91 .name = "dma"
92 },
93 };
94
95 static struct musb_hdrc_config musb_config = {
96 .multipoint = 0,
97 .dyn_fifo = 0,
98 .soft_con = 1,
99 .dma = 1,
100 .num_eps = 8,
101 .dma_channels = 8,
102 .gpio_vrsel = GPIO_PF11,
103 /* Some custom boards need to be active low, just set it to "0"
104 * if it is the case.
105 */
106 .gpio_vrsel_active = 1,
107 .clkin = 24, /* musb CLKIN in MHZ */
108 };
109
110 static struct musb_hdrc_platform_data musb_plat = {
111 #if defined(CONFIG_USB_MUSB_OTG)
112 .mode = MUSB_OTG,
113 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
114 .mode = MUSB_HOST,
115 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
116 .mode = MUSB_PERIPHERAL,
117 #endif
118 .config = &musb_config,
119 };
120
121 static u64 musb_dmamask = ~(u32)0;
122
123 static struct platform_device musb_device = {
124 .name = "musb-blackfin",
125 .id = 0,
126 .dev = {
127 .dma_mask = &musb_dmamask,
128 .coherent_dma_mask = 0xffffffff,
129 .platform_data = &musb_plat,
130 },
131 .num_resources = ARRAY_SIZE(musb_resources),
132 .resource = musb_resources,
133 };
134 #endif
135
136 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
137 static struct mtd_partition partition_info[] = {
138 {
139 .name = "linux kernel(nand)",
140 .offset = 0,
141 .size = 4 * 1024 * 1024,
142 },
143 {
144 .name = "file system(nand)",
145 .offset = MTDPART_OFS_APPEND,
146 .size = MTDPART_SIZ_FULL,
147 },
148 };
149
150 static struct bf5xx_nand_platform bf5xx_nand_platform = {
151 .data_width = NFC_NWIDTH_8,
152 .partitions = partition_info,
153 .nr_partitions = ARRAY_SIZE(partition_info),
154 .rd_dly = 3,
155 .wr_dly = 3,
156 };
157
158 static struct resource bf5xx_nand_resources[] = {
159 {
160 .start = NFC_CTL,
161 .end = NFC_DATA_RD + 2,
162 .flags = IORESOURCE_MEM,
163 },
164 {
165 .start = CH_NFC,
166 .end = CH_NFC,
167 .flags = IORESOURCE_IRQ,
168 },
169 };
170
171 static struct platform_device bf5xx_nand_device = {
172 .name = "bf5xx-nand",
173 .id = 0,
174 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
175 .resource = bf5xx_nand_resources,
176 .dev = {
177 .platform_data = &bf5xx_nand_platform,
178 },
179 };
180 #endif
181
182 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
183 static struct resource bfin_pcmcia_cf_resources[] = {
184 {
185 .start = 0x20310000, /* IO PORT */
186 .end = 0x20312000,
187 .flags = IORESOURCE_MEM,
188 }, {
189 .start = 0x20311000, /* Attribute Memory */
190 .end = 0x20311FFF,
191 .flags = IORESOURCE_MEM,
192 }, {
193 .start = IRQ_PF4,
194 .end = IRQ_PF4,
195 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
196 }, {
197 .start = 6, /* Card Detect PF6 */
198 .end = 6,
199 .flags = IORESOURCE_IRQ,
200 },
201 };
202
203 static struct platform_device bfin_pcmcia_cf_device = {
204 .name = "bfin_cf_pcmcia",
205 .id = -1,
206 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
207 .resource = bfin_pcmcia_cf_resources,
208 };
209 #endif
210
211 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
212 static struct platform_device rtc_device = {
213 .name = "rtc-bfin",
214 .id = -1,
215 };
216 #endif
217
218 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
219 #include <linux/smc91x.h>
220
221 static struct smc91x_platdata smc91x_info = {
222 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
223 .leda = RPC_LED_100_10,
224 .ledb = RPC_LED_TX_RX,
225 };
226
227 static struct resource smc91x_resources[] = {
228 {
229 .name = "smc91x-regs",
230 .start = 0x20300300,
231 .end = 0x20300300 + 16,
232 .flags = IORESOURCE_MEM,
233 }, {
234
235 .start = IRQ_PF7,
236 .end = IRQ_PF7,
237 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
238 },
239 };
240 static struct platform_device smc91x_device = {
241 .name = "smc91x",
242 .id = 0,
243 .num_resources = ARRAY_SIZE(smc91x_resources),
244 .resource = smc91x_resources,
245 .dev = {
246 .platform_data = &smc91x_info,
247 },
248 };
249 #endif
250
251 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
252 static struct resource dm9000_resources[] = {
253 [0] = {
254 .start = 0x203FB800,
255 .end = 0x203FB800 + 1,
256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = 0x203FB804,
260 .end = 0x203FB804 + 1,
261 .flags = IORESOURCE_MEM,
262 },
263 [2] = {
264 .start = IRQ_PF9,
265 .end = IRQ_PF9,
266 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
267 },
268 };
269
270 static struct platform_device dm9000_device = {
271 .name = "dm9000",
272 .id = -1,
273 .num_resources = ARRAY_SIZE(dm9000_resources),
274 .resource = dm9000_resources,
275 };
276 #endif
277
278 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
279 #include <linux/bfin_mac.h>
280 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
281
282 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
283 {
284 .addr = 1,
285 .irq = IRQ_MAC_PHYINT,
286 },
287 };
288
289 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
290 .phydev_number = 1,
291 .phydev_data = bfin_phydev_data,
292 .phy_mode = PHY_INTERFACE_MODE_RMII,
293 .mac_peripherals = bfin_mac_peripherals,
294 };
295
296 static struct platform_device bfin_mii_bus = {
297 .name = "bfin_mii_bus",
298 .dev = {
299 .platform_data = &bfin_mii_bus_data,
300 }
301 };
302
303 static struct platform_device bfin_mac_device = {
304 .name = "bfin_mac",
305 .dev = {
306 .platform_data = &bfin_mii_bus,
307 }
308 };
309 #endif
310
311 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
312 static struct resource net2272_bfin_resources[] = {
313 {
314 .start = 0x20300000,
315 .end = 0x20300000 + 0x100,
316 .flags = IORESOURCE_MEM,
317 }, {
318 .start = IRQ_PF7,
319 .end = IRQ_PF7,
320 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
321 },
322 };
323
324 static struct platform_device net2272_bfin_device = {
325 .name = "net2272",
326 .id = -1,
327 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
328 .resource = net2272_bfin_resources,
329 };
330 #endif
331
332 #if defined(CONFIG_MTD_M25P80) \
333 || defined(CONFIG_MTD_M25P80_MODULE)
334 static struct mtd_partition bfin_spi_flash_partitions[] = {
335 {
336 .name = "bootloader(spi)",
337 .size = 0x00040000,
338 .offset = 0,
339 .mask_flags = MTD_CAP_ROM
340 }, {
341 .name = "linux kernel(spi)",
342 .size = MTDPART_SIZ_FULL,
343 .offset = MTDPART_OFS_APPEND,
344 }
345 };
346
347 static struct flash_platform_data bfin_spi_flash_data = {
348 .name = "m25p80",
349 .parts = bfin_spi_flash_partitions,
350 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
351 .type = "m25p16",
352 };
353
354 /* SPI flash chip (m25p64) */
355 static struct bfin5xx_spi_chip spi_flash_chip_info = {
356 .enable_dma = 0, /* use dma transfer with this chip*/
357 .bits_per_word = 8,
358 };
359 #endif
360
361 #if defined(CONFIG_BFIN_SPI_ADC) \
362 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
363 /* SPI ADC chip */
364 static struct bfin5xx_spi_chip spi_adc_chip_info = {
365 .enable_dma = 1, /* use dma transfer with this chip*/
366 .bits_per_word = 16,
367 };
368 #endif
369
370 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
371 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
372 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
373 .enable_dma = 0,
374 .bits_per_word = 16,
375 };
376 #endif
377
378 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
379 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
380 .enable_dma = 0,
381 .bits_per_word = 8,
382 };
383 #endif
384
385 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
386 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
387 .enable_dma = 0,
388 .bits_per_word = 16,
389 };
390
391 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
392 .model = 7877,
393 .vref_delay_usecs = 50, /* internal, no capacitor */
394 .x_plate_ohms = 419,
395 .y_plate_ohms = 486,
396 .pressure_max = 1000,
397 .pressure_min = 0,
398 .stopacq_polarity = 1,
399 .first_conversion_delay = 3,
400 .acquisition_time = 1,
401 .averaging = 1,
402 .pen_down_acc_interval = 1,
403 };
404 #endif
405
406 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
407 && defined(CONFIG_SND_SOC_WM8731_SPI)
408 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
409 .enable_dma = 0,
410 .bits_per_word = 16,
411 };
412 #endif
413
414 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
415 static struct bfin5xx_spi_chip spidev_chip_info = {
416 .enable_dma = 0,
417 .bits_per_word = 8,
418 };
419 #endif
420
421 static struct spi_board_info bfin_spi_board_info[] __initdata = {
422 #if defined(CONFIG_MTD_M25P80) \
423 || defined(CONFIG_MTD_M25P80_MODULE)
424 {
425 /* the modalias must be the same as spi device driver name */
426 .modalias = "m25p80", /* Name of spi_driver for this device */
427 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
428 .bus_num = 0, /* Framework bus number */
429 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
430 .platform_data = &bfin_spi_flash_data,
431 .controller_data = &spi_flash_chip_info,
432 .mode = SPI_MODE_3,
433 },
434 #endif
435
436 #if defined(CONFIG_BFIN_SPI_ADC) \
437 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
438 {
439 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
440 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
441 .bus_num = 0, /* Framework bus number */
442 .chip_select = 1, /* Framework chip select. */
443 .platform_data = NULL, /* No spi_driver specific config */
444 .controller_data = &spi_adc_chip_info,
445 },
446 #endif
447
448 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
449 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
450 {
451 .modalias = "ad183x",
452 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
453 .bus_num = 0,
454 .chip_select = 4,
455 .controller_data = &ad1836_spi_chip_info,
456 },
457 #endif
458 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
459 {
460 .modalias = "mmc_spi",
461 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
462 .bus_num = 0,
463 .chip_select = 5,
464 .controller_data = &mmc_spi_chip_info,
465 .mode = SPI_MODE_3,
466 },
467 #endif
468 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
469 {
470 .modalias = "ad7877",
471 .platform_data = &bfin_ad7877_ts_info,
472 .irq = IRQ_PF8,
473 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
474 .bus_num = 0,
475 .chip_select = 2,
476 .controller_data = &spi_ad7877_chip_info,
477 },
478 #endif
479 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
480 && defined(CONFIG_SND_SOC_WM8731_SPI)
481 {
482 .modalias = "wm8731",
483 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
484 .bus_num = 0,
485 .chip_select = 5,
486 .controller_data = &spi_wm8731_chip_info,
487 .mode = SPI_MODE_0,
488 },
489 #endif
490 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
491 {
492 .modalias = "spidev",
493 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
494 .bus_num = 0,
495 .chip_select = 1,
496 .controller_data = &spidev_chip_info,
497 },
498 #endif
499 };
500
501 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
502 /* SPI controller data */
503 static struct bfin5xx_spi_master bfin_spi0_info = {
504 .num_chipselect = 8,
505 .enable_dma = 1, /* master has the ability to do dma transfer */
506 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
507 };
508
509 /* SPI (0) */
510 static struct resource bfin_spi0_resource[] = {
511 [0] = {
512 .start = SPI0_REGBASE,
513 .end = SPI0_REGBASE + 0xFF,
514 .flags = IORESOURCE_MEM,
515 },
516 [1] = {
517 .start = CH_SPI,
518 .end = CH_SPI,
519 .flags = IORESOURCE_DMA,
520 },
521 [2] = {
522 .start = IRQ_SPI,
523 .end = IRQ_SPI,
524 .flags = IORESOURCE_IRQ,
525 },
526 };
527
528 static struct platform_device bfin_spi0_device = {
529 .name = "bfin-spi",
530 .id = 0, /* Bus number */
531 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
532 .resource = bfin_spi0_resource,
533 .dev = {
534 .platform_data = &bfin_spi0_info, /* Passed to driver */
535 },
536 };
537 #endif /* spi master and devices */
538
539 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
540 static struct mtd_partition cm_partitions[] = {
541 {
542 .name = "bootloader(nor)",
543 .size = 0x40000,
544 .offset = 0,
545 }, {
546 .name = "linux kernel(nor)",
547 .size = 0x100000,
548 .offset = MTDPART_OFS_APPEND,
549 }, {
550 .name = "file system(nor)",
551 .size = MTDPART_SIZ_FULL,
552 .offset = MTDPART_OFS_APPEND,
553 }
554 };
555
556 static struct physmap_flash_data cm_flash_data = {
557 .width = 2,
558 .parts = cm_partitions,
559 .nr_parts = ARRAY_SIZE(cm_partitions),
560 };
561
562 static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
563
564 static struct resource cm_flash_resource[] = {
565 {
566 .name = "cfi_probe",
567 .start = 0x20000000,
568 .end = 0x201fffff,
569 .flags = IORESOURCE_MEM,
570 }, {
571 .start = (unsigned long)cm_flash_gpios,
572 .end = ARRAY_SIZE(cm_flash_gpios),
573 .flags = IORESOURCE_IRQ,
574 }
575 };
576
577 static struct platform_device cm_flash_device = {
578 .name = "gpio-addr-flash",
579 .id = 0,
580 .dev = {
581 .platform_data = &cm_flash_data,
582 },
583 .num_resources = ARRAY_SIZE(cm_flash_resource),
584 .resource = cm_flash_resource,
585 };
586 #endif
587
588 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
589 #ifdef CONFIG_SERIAL_BFIN_UART0
590 static struct resource bfin_uart0_resources[] = {
591 {
592 .start = UART0_THR,
593 .end = UART0_GCTL+2,
594 .flags = IORESOURCE_MEM,
595 },
596 {
597 .start = IRQ_UART0_RX,
598 .end = IRQ_UART0_RX+1,
599 .flags = IORESOURCE_IRQ,
600 },
601 {
602 .start = IRQ_UART0_ERROR,
603 .end = IRQ_UART0_ERROR,
604 .flags = IORESOURCE_IRQ,
605 },
606 {
607 .start = CH_UART0_TX,
608 .end = CH_UART0_TX,
609 .flags = IORESOURCE_DMA,
610 },
611 {
612 .start = CH_UART0_RX,
613 .end = CH_UART0_RX,
614 .flags = IORESOURCE_DMA,
615 },
616 };
617
618 static unsigned short bfin_uart0_peripherals[] = {
619 P_UART0_TX, P_UART0_RX, 0
620 };
621
622 static struct platform_device bfin_uart0_device = {
623 .name = "bfin-uart",
624 .id = 0,
625 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
626 .resource = bfin_uart0_resources,
627 .dev = {
628 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
629 },
630 };
631 #endif
632 #ifdef CONFIG_SERIAL_BFIN_UART1
633 static struct resource bfin_uart1_resources[] = {
634 {
635 .start = UART1_THR,
636 .end = UART1_GCTL+2,
637 .flags = IORESOURCE_MEM,
638 },
639 {
640 .start = IRQ_UART1_RX,
641 .end = IRQ_UART1_RX+1,
642 .flags = IORESOURCE_IRQ,
643 },
644 {
645 .start = IRQ_UART1_ERROR,
646 .end = IRQ_UART1_ERROR,
647 .flags = IORESOURCE_IRQ,
648 },
649 {
650 .start = CH_UART1_TX,
651 .end = CH_UART1_TX,
652 .flags = IORESOURCE_DMA,
653 },
654 {
655 .start = CH_UART1_RX,
656 .end = CH_UART1_RX,
657 .flags = IORESOURCE_DMA,
658 },
659 #ifdef CONFIG_BFIN_UART1_CTSRTS
660 { /* CTS pin */
661 .start = GPIO_PF9,
662 .end = GPIO_PF9,
663 .flags = IORESOURCE_IO,
664 },
665 { /* RTS pin */
666 .start = GPIO_PF10,
667 .end = GPIO_PF10,
668 .flags = IORESOURCE_IO,
669 },
670 #endif
671 };
672
673 static unsigned short bfin_uart1_peripherals[] = {
674 P_UART1_TX, P_UART1_RX, 0
675 };
676
677 static struct platform_device bfin_uart1_device = {
678 .name = "bfin-uart",
679 .id = 1,
680 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
681 .resource = bfin_uart1_resources,
682 .dev = {
683 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
684 },
685 };
686 #endif
687 #endif
688
689 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
690 #ifdef CONFIG_BFIN_SIR0
691 static struct resource bfin_sir0_resources[] = {
692 {
693 .start = 0xFFC00400,
694 .end = 0xFFC004FF,
695 .flags = IORESOURCE_MEM,
696 },
697 {
698 .start = IRQ_UART0_RX,
699 .end = IRQ_UART0_RX+1,
700 .flags = IORESOURCE_IRQ,
701 },
702 {
703 .start = CH_UART0_RX,
704 .end = CH_UART0_RX+1,
705 .flags = IORESOURCE_DMA,
706 },
707 };
708
709 static struct platform_device bfin_sir0_device = {
710 .name = "bfin_sir",
711 .id = 0,
712 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
713 .resource = bfin_sir0_resources,
714 };
715 #endif
716 #ifdef CONFIG_BFIN_SIR1
717 static struct resource bfin_sir1_resources[] = {
718 {
719 .start = 0xFFC02000,
720 .end = 0xFFC020FF,
721 .flags = IORESOURCE_MEM,
722 },
723 {
724 .start = IRQ_UART1_RX,
725 .end = IRQ_UART1_RX+1,
726 .flags = IORESOURCE_IRQ,
727 },
728 {
729 .start = CH_UART1_RX,
730 .end = CH_UART1_RX+1,
731 .flags = IORESOURCE_DMA,
732 },
733 };
734
735 static struct platform_device bfin_sir1_device = {
736 .name = "bfin_sir",
737 .id = 1,
738 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
739 .resource = bfin_sir1_resources,
740 };
741 #endif
742 #endif
743
744 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
745 static struct resource bfin_twi0_resource[] = {
746 [0] = {
747 .start = TWI0_REGBASE,
748 .end = TWI0_REGBASE,
749 .flags = IORESOURCE_MEM,
750 },
751 [1] = {
752 .start = IRQ_TWI,
753 .end = IRQ_TWI,
754 .flags = IORESOURCE_IRQ,
755 },
756 };
757
758 static struct platform_device i2c_bfin_twi_device = {
759 .name = "i2c-bfin-twi",
760 .id = 0,
761 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
762 .resource = bfin_twi0_resource,
763 };
764 #endif
765
766 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
767 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
768 {
769 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
770 },
771 #endif
772 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
773 {
774 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
775 .irq = IRQ_PF8,
776 },
777 #endif
778 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
779 {
780 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
781 },
782 #endif
783 };
784
785 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
786 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
787 static struct resource bfin_sport0_uart_resources[] = {
788 {
789 .start = SPORT0_TCR1,
790 .end = SPORT0_MRCS3+4,
791 .flags = IORESOURCE_MEM,
792 },
793 {
794 .start = IRQ_SPORT0_RX,
795 .end = IRQ_SPORT0_RX+1,
796 .flags = IORESOURCE_IRQ,
797 },
798 {
799 .start = IRQ_SPORT0_ERROR,
800 .end = IRQ_SPORT0_ERROR,
801 .flags = IORESOURCE_IRQ,
802 },
803 };
804
805 static unsigned short bfin_sport0_peripherals[] = {
806 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
807 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
808 };
809
810 static struct platform_device bfin_sport0_uart_device = {
811 .name = "bfin-sport-uart",
812 .id = 0,
813 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
814 .resource = bfin_sport0_uart_resources,
815 .dev = {
816 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
817 },
818 };
819 #endif
820 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
821 static struct resource bfin_sport1_uart_resources[] = {
822 {
823 .start = SPORT1_TCR1,
824 .end = SPORT1_MRCS3+4,
825 .flags = IORESOURCE_MEM,
826 },
827 {
828 .start = IRQ_SPORT1_RX,
829 .end = IRQ_SPORT1_RX+1,
830 .flags = IORESOURCE_IRQ,
831 },
832 {
833 .start = IRQ_SPORT1_ERROR,
834 .end = IRQ_SPORT1_ERROR,
835 .flags = IORESOURCE_IRQ,
836 },
837 };
838
839 static unsigned short bfin_sport1_peripherals[] = {
840 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
841 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
842 };
843
844 static struct platform_device bfin_sport1_uart_device = {
845 .name = "bfin-sport-uart",
846 .id = 1,
847 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
848 .resource = bfin_sport1_uart_resources,
849 .dev = {
850 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
851 },
852 };
853 #endif
854 #endif
855
856 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
857 #include <linux/input.h>
858 #include <linux/gpio_keys.h>
859
860 static struct gpio_keys_button bfin_gpio_keys_table[] = {
861 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
862 };
863
864 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
865 .buttons = bfin_gpio_keys_table,
866 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
867 };
868
869 static struct platform_device bfin_device_gpiokeys = {
870 .name = "gpio-keys",
871 .dev = {
872 .platform_data = &bfin_gpio_keys_data,
873 },
874 };
875 #endif
876
877 static const unsigned int cclk_vlev_datasheet[] =
878 {
879 VRPAIR(VLEV_100, 400000000),
880 VRPAIR(VLEV_105, 426000000),
881 VRPAIR(VLEV_110, 500000000),
882 VRPAIR(VLEV_115, 533000000),
883 VRPAIR(VLEV_120, 600000000),
884 };
885
886 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
887 .tuple_tab = cclk_vlev_datasheet,
888 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
889 .vr_settling_time = 25 /* us */,
890 };
891
892 static struct platform_device bfin_dpmc = {
893 .name = "bfin dpmc",
894 .dev = {
895 .platform_data = &bfin_dmpc_vreg_data,
896 },
897 };
898
899 static struct platform_device *cmbf527_devices[] __initdata = {
900
901 &bfin_dpmc,
902
903 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
904 &bf5xx_nand_device,
905 #endif
906
907 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
908 &bfin_pcmcia_cf_device,
909 #endif
910
911 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
912 &rtc_device,
913 #endif
914
915 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
916 &bfin_isp1760_device,
917 #endif
918
919 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
920 &musb_device,
921 #endif
922
923 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
924 &smc91x_device,
925 #endif
926
927 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
928 &dm9000_device,
929 #endif
930
931 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
932 &bfin_mii_bus,
933 &bfin_mac_device,
934 #endif
935
936 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
937 &net2272_bfin_device,
938 #endif
939
940 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
941 &bfin_spi0_device,
942 #endif
943
944 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
945 #ifdef CONFIG_SERIAL_BFIN_UART0
946 &bfin_uart0_device,
947 #endif
948 #ifdef CONFIG_SERIAL_BFIN_UART1
949 &bfin_uart1_device,
950 #endif
951 #endif
952
953 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
954 #ifdef CONFIG_BFIN_SIR0
955 &bfin_sir0_device,
956 #endif
957 #ifdef CONFIG_BFIN_SIR1
958 &bfin_sir1_device,
959 #endif
960 #endif
961
962 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
963 &i2c_bfin_twi_device,
964 #endif
965
966 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
967 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
968 &bfin_sport0_uart_device,
969 #endif
970 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
971 &bfin_sport1_uart_device,
972 #endif
973 #endif
974
975 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
976 &bfin_device_gpiokeys,
977 #endif
978
979 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
980 &cm_flash_device,
981 #endif
982 };
983
984 static int __init cm_init(void)
985 {
986 printk(KERN_INFO "%s(): registering device resources\n", __func__);
987 i2c_register_board_info(0, bfin_i2c_board_info,
988 ARRAY_SIZE(bfin_i2c_board_info));
989 platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
990 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
991 return 0;
992 }
993
994 arch_initcall(cm_init);
995
996 static struct platform_device *cmbf527_early_devices[] __initdata = {
997 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
998 #ifdef CONFIG_SERIAL_BFIN_UART0
999 &bfin_uart0_device,
1000 #endif
1001 #ifdef CONFIG_SERIAL_BFIN_UART1
1002 &bfin_uart1_device,
1003 #endif
1004 #endif
1005
1006 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1007 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1008 &bfin_sport0_uart_device,
1009 #endif
1010 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1011 &bfin_sport1_uart_device,
1012 #endif
1013 #endif
1014 };
1015
1016 void __init native_machine_early_platform_add_devices(void)
1017 {
1018 printk(KERN_INFO "register early platform devices\n");
1019 early_platform_add_devices(cmbf527_early_devices,
1020 ARRAY_SIZE(cmbf527_early_devices));
1021 }
1022
1023 void native_machine_restart(char *cmd)
1024 {
1025 /* workaround reboot hang when booting from SPI */
1026 if ((bfin_read_SYSCR() & 0x7) == 0x3)
1027 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
1028 }
1029
1030 void bfin_get_ether_addr(char *addr)
1031 {
1032 random_ether_addr(addr);
1033 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
1034 }
1035 EXPORT_SYMBOL(bfin_get_ether_addr);
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